From e05801fba72f7cd3a60e2c496f53c62763b14e66 Mon Sep 17 00:00:00 2001
From: Deepak Kumar <dkumar@qti.qualcomm.com>
Date: Fri, 5 Aug 2022 14:13:56 +0530
Subject: [PATCH] ARM: dts: msm: Remove SVS_L1 corner for Ukee's GPU

Remove SVS_L1 for GPU as per latest recommendation.

Change-Id: I4b3f24b9626a31d5d84556298ce0350e3a9b2114
---
 qcom/ukee.dtsi | 43 +++++++++++++++----------------------------
 1 file changed, 15 insertions(+), 28 deletions(-)

diff --git a/qcom/ukee.dtsi b/qcom/ukee.dtsi
index 9dfd2a8d..fc9de33d 100644
--- a/qcom/ukee.dtsi
+++ b/qcom/ukee.dtsi
@@ -7,7 +7,7 @@
 };
 
 &msm_gpu {
-	qcom,initial-pwrlevel = <6>;
+	qcom,initial-pwrlevel = <5>;
 
 	/delete-node/qcom,gpu-pwrlevels;
 
@@ -20,32 +20,19 @@
 
 		qcom,gpu-pwrlevel@0 {
 			reg = <0>;
-			qcom,gpu-freq = <645000000>;
-			qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
-
-			qcom,bus-freq = <11>;
-			qcom,bus-min = <8>;
-			qcom,bus-max = <11>;
-
-			qcom,acd-level = <0x882d5ffd>;
-			qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
-		};
-
-		qcom,gpu-pwrlevel@1 {
-			reg = <1>;
 			qcom,gpu-freq = <580000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
 
-			qcom,bus-freq = <8>;
-			qcom,bus-min = <6>;
+			qcom,bus-freq = <11>;
+			qcom,bus-min = <7>;
 			qcom,bus-max = <11>;
 
 			qcom,acd-level = <0x882e5ffd>;
 			qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
 		};
 
-		qcom,gpu-pwrlevel@2 {
-			reg = <2>;
+		qcom,gpu-pwrlevel@1 {
+			reg = <1>;
 			qcom,gpu-freq = <515000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
 
@@ -57,8 +44,8 @@
 			qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS>;
 		};
 
-		qcom,gpu-pwrlevel@3 {
-			reg = <3>;
+		qcom,gpu-pwrlevel@2 {
+			reg = <2>;
 			qcom,gpu-freq = <439000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L2>;
 
@@ -70,8 +57,8 @@
 			qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS>;
 		};
 
-		qcom,gpu-pwrlevel@4 {
-			reg = <4>;
+		qcom,gpu-pwrlevel@3 {
+			reg = <3>;
 			qcom,gpu-freq = <364000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
 
@@ -83,8 +70,8 @@
 			qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS>;
 		};
 
-		qcom,gpu-pwrlevel@5 {
-			reg = <5>;
+		qcom,gpu-pwrlevel@4 {
+			reg = <4>;
 			qcom,gpu-freq = <324000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 
@@ -97,8 +84,8 @@
 			qcom,cx-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 		};
 
-		qcom,gpu-pwrlevel@6 {
-			reg = <6>;
+		qcom,gpu-pwrlevel@5 {
+			reg = <5>;
 			qcom,gpu-freq = <285000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
 
@@ -111,8 +98,8 @@
 			qcom,cx-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 		};
 
-		qcom,gpu-pwrlevel@7 {
-			reg = <7>;
+		qcom,gpu-pwrlevel@6 {
+			reg = <6>;
 			qcom,gpu-freq = <220000000>;
 			qcom,level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;