From e20b703ebbb87c25039bb145d8ee184bd7b71c37 Mon Sep 17 00:00:00 2001 From: Harshitha Sai Neelati Date: Wed, 2 Feb 2022 11:13:51 +0530 Subject: [PATCH] ARM: dts: msm: Add Low SVS D1 freq support for diwali gpu Add Low SVS D1 frequency corner support for diwali gpu. Change-Id: Ibe8f3fe714d8ba3a4d4f2836fdba2c80284c7a7c --- qcom/diwali-gpu.dtsi | 56 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 56 insertions(+) diff --git a/qcom/diwali-gpu.dtsi b/qcom/diwali-gpu.dtsi index dddbdad3..006026df 100644 --- a/qcom/diwali-gpu.dtsi +++ b/qcom/diwali-gpu.dtsi @@ -209,6 +209,20 @@ qcom,bus-min-ddr8 = <2>; qcom,bus-max-ddr8 = <6>; }; + + qcom,gpu-pwrlevel@6 { + reg = <6>; + qcom,gpu-freq = <230000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <3>; + qcom,bus-min-ddr7 = <2>; + qcom,bus-max-ddr7 = <8>; + + qcom,bus-freq-ddr8 = <3>; + qcom,bus-min-ddr8 = <2>; + qcom,bus-max-ddr8 = <6>; + }; }; qcom,gpu-pwrlevels-1 { @@ -302,6 +316,20 @@ qcom,bus-min-ddr8 = <2>; qcom,bus-max-ddr8 = <6>; }; + + qcom,gpu-pwrlevel@6 { + reg = <6>; + qcom,gpu-freq = <230000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <3>; + qcom,bus-min-ddr7 = <2>; + qcom,bus-max-ddr7 = <8>; + + qcom,bus-freq-ddr8 = <3>; + qcom,bus-min-ddr8 = <2>; + qcom,bus-max-ddr8 = <6>; + }; }; qcom,gpu-pwrlevels-2 { @@ -352,6 +380,20 @@ qcom,bus-min-ddr8 = <2>; qcom,bus-max-ddr8 = <6>; }; + + qcom,gpu-pwrlevel@3 { + reg = <3>; + qcom,gpu-freq = <230000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <3>; + qcom,bus-min-ddr7 = <2>; + qcom,bus-max-ddr7 = <8>; + + qcom,bus-freq-ddr8 = <3>; + qcom,bus-min-ddr8 = <2>; + qcom,bus-max-ddr8 = <6>; + }; }; qcom,gpu-pwrlevels-3 { @@ -388,6 +430,20 @@ qcom,bus-min-ddr8 = <2>; qcom,bus-max-ddr8 = <6>; }; + + qcom,gpu-pwrlevel@2 { + reg = <2>; + qcom,gpu-freq = <230000000>; + qcom,level = ; + + qcom,bus-freq-ddr7 = <3>; + qcom,bus-min-ddr7 = <2>; + qcom,bus-max-ddr7 = <8>; + + qcom,bus-freq-ddr8 = <3>; + qcom,bus-min-ddr8 = <2>; + qcom,bus-max-ddr8 = <6>; + }; }; }; };