From 46df7265961d978110dc07a38d847008fa9c46e5 Mon Sep 17 00:00:00 2001
From: Deepak Kumar <dkumar@qti.qualcomm.com>
Date: Fri, 3 Dec 2021 14:11:28 +0530
Subject: [PATCH] ARM: dts: msm: Remove TURBO_L1 and TURBO corner for Cape's
 GPU

Remove TURBO_L1 and TURBO for GPU as per latest recommendation.

Change-Id: I85642267302fe6477cf98d08a7187c14ab8713b2
---
 qcom/cape-gpu.dtsi | 62 ++++++++++++++++------------------------------
 1 file changed, 21 insertions(+), 41 deletions(-)

diff --git a/qcom/cape-gpu.dtsi b/qcom/cape-gpu.dtsi
index 49c8b041..93c80fa6 100644
--- a/qcom/cape-gpu.dtsi
+++ b/qcom/cape-gpu.dtsi
@@ -27,7 +27,7 @@
 
 		qcom,chipid = <0x07030002>;
 
-		qcom,initial-pwrlevel = <11>;
+		qcom,initial-pwrlevel = <9>;
 
 		qcom,no-nap;
 
@@ -73,26 +73,6 @@
 
 			qcom,gpu-pwrlevel@0 {
 				reg = <0>;
-				qcom,gpu-freq = <900000000>;
-				qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
-
-				qcom,bus-freq = <11>;
-				qcom,bus-min = <11>;
-				qcom,bus-max = <11>;
-			};
-
-			qcom,gpu-pwrlevel@1 {
-				reg = <1>;
-				qcom,gpu-freq = <862000000>;
-				qcom,level = <RPMH_REGULATOR_LEVEL_TURBO>;
-
-				qcom,bus-freq = <11>;
-				qcom,bus-min = <11>;
-				qcom,bus-max = <11>;
-			};
-
-			qcom,gpu-pwrlevel@2 {
-				reg = <2>;
 				qcom,gpu-freq = <815000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
 
@@ -101,8 +81,8 @@
 				qcom,bus-max = <11>;
 			};
 
-			qcom,gpu-pwrlevel@3 {
-				reg = <3>;
+			qcom,gpu-pwrlevel@1 {
+				reg = <1>;
 				qcom,gpu-freq = <765000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
 
@@ -111,8 +91,8 @@
 				qcom,bus-max = <11>;
 			};
 
-			qcom,gpu-pwrlevel@4 {
-				reg = <4>;
+			qcom,gpu-pwrlevel@2 {
+				reg = <2>;
 				qcom,gpu-freq = <710000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
 
@@ -121,8 +101,8 @@
 				qcom,bus-max = <11>;
 			};
 
-			qcom,gpu-pwrlevel@5 {
-				reg = <5>;
+			qcom,gpu-pwrlevel@3 {
+				reg = <3>;
 				qcom,gpu-freq = <645000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
 
@@ -131,8 +111,8 @@
 				qcom,bus-max = <9>;
 			};
 
-			qcom,gpu-pwrlevel@6 {
-				reg = <6>;
+			qcom,gpu-pwrlevel@4 {
+				reg = <4>;
 				qcom,gpu-freq = <580000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
 
@@ -141,8 +121,8 @@
 				qcom,bus-max = <9>;
 			};
 
-			qcom,gpu-pwrlevel@7 {
-				reg = <7>;
+			qcom,gpu-pwrlevel@5 {
+				reg = <5>;
 				qcom,gpu-freq = <515000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
 
@@ -151,8 +131,8 @@
 				qcom,bus-max = <8>;
 			};
 
-			qcom,gpu-pwrlevel@8 {
-				reg = <8>;
+			qcom,gpu-pwrlevel@6 {
+				reg = <6>;
 				qcom,gpu-freq = <439000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
 
@@ -161,8 +141,8 @@
 				qcom,bus-max = <8>;
 			};
 
-			qcom,gpu-pwrlevel@9 {
-				reg = <9>;
+			qcom,gpu-pwrlevel@7 {
+				reg = <7>;
 				qcom,gpu-freq = <364000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 
@@ -171,8 +151,8 @@
 				qcom,bus-max = <6>;
 			};
 
-			qcom,gpu-pwrlevel@10 {
-				reg = <10>;
+			qcom,gpu-pwrlevel@8 {
+				reg = <8>;
 				qcom,gpu-freq = <324000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
 
@@ -181,8 +161,8 @@
 				qcom,bus-max = <6>;
 			};
 
-			qcom,gpu-pwrlevel@11 {
-				reg = <11>;
+			qcom,gpu-pwrlevel@9 {
+				reg = <9>;
 				qcom,gpu-freq = <285000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
 
@@ -191,8 +171,8 @@
 				qcom,bus-max = <5>;
 			};
 
-			qcom,gpu-pwrlevel@12 {
-				reg = <12>;
+			qcom,gpu-pwrlevel@10 {
+				reg = <10>;
 				qcom,gpu-freq = <220000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;