From 4ce55200a9a3cce80569280feb95745f7a701cfc Mon Sep 17 00:00:00 2001 From: Amruth Naga Date: Thu, 17 Nov 2022 21:33:09 +0530 Subject: [PATCH] ARM: dts: msm: Add NFC device node for ravelin (SM4450) Device node changes required on ravelin (SM4450), describing the GPIO configuration for Nfc controller chip. Modified corresponding Nfc device node for ATP, IDP & QRD platforms. Change-Id: I5682fada78c9573e0f8697b2da1d62b855465404 --- qcom/ravelin-atp.dtsi | 24 ++++++++++++++++ qcom/ravelin-idp.dtsi | 24 ++++++++++++++++ qcom/ravelin-pinctrl.dtsi | 59 +++++++++++++++++++++++++++++++++++++++ qcom/ravelin-qrd.dtsi | 24 ++++++++++++++++ 4 files changed, 131 insertions(+) diff --git a/qcom/ravelin-atp.dtsi b/qcom/ravelin-atp.dtsi index d97e4d45..2f30b91f 100644 --- a/qcom/ravelin-atp.dtsi +++ b/qcom/ravelin-atp.dtsi @@ -64,3 +64,27 @@ cd-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; }; + +&qupv3_se0_i2c { + status = "ok"; + qcom,clk-freq-out = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + nq@28 { + compatible = "qcom,sn-nci"; + reg = <0x28>; + qcom,sn-irq = <&tlmm 9 0x00>; + qcom,sn-ven = <&tlmm 6 0x00>; + qcom,sn-firm = <&tlmm 8 0x00>; + qcom,sn-clkreq = <&tlmm 7 0x00>; + qcom,sn-vdd-1p8-supply = <&L21B>; + qcom,sn-vdd-1p8-voltage = <1800000 1800000>; + qcom,sn-vdd-1p8-current = <157000>; + interrupt-parent = <&tlmm>; + interrupts = <9 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; + }; +}; diff --git a/qcom/ravelin-idp.dtsi b/qcom/ravelin-idp.dtsi index 76ca171d..28088cce 100644 --- a/qcom/ravelin-idp.dtsi +++ b/qcom/ravelin-idp.dtsi @@ -107,3 +107,27 @@ cd-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; }; + +&qupv3_se0_i2c { + status = "ok"; + qcom,clk-freq-out = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + nq@28 { + compatible = "qcom,sn-nci"; + reg = <0x28>; + qcom,sn-irq = <&tlmm 9 0x00>; + qcom,sn-ven = <&tlmm 6 0x00>; + qcom,sn-firm = <&tlmm 8 0x00>; + qcom,sn-clkreq = <&tlmm 7 0x00>; + qcom,sn-vdd-1p8-supply = <&L21B>; + qcom,sn-vdd-1p8-voltage = <1800000 1800000>; + qcom,sn-vdd-1p8-current = <157000>; + interrupt-parent = <&tlmm>; + interrupts = <9 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; + }; +}; diff --git a/qcom/ravelin-pinctrl.dtsi b/qcom/ravelin-pinctrl.dtsi index 2df6577f..8fc64092 100644 --- a/qcom/ravelin-pinctrl.dtsi +++ b/qcom/ravelin-pinctrl.dtsi @@ -1312,5 +1312,64 @@ }; }; }; + + nfc { + nfc_int_active: nfc_int_active { + /* active state */ + mux { + /* NFC Read Interrupt */ + pins = "gpio9"; + function = "gpio"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 MA */ + bias-pull-down; + }; + }; + + nfc_int_suspend: nfc_int_suspend { + /* sleep state */ + mux { + /* NFC Read Interrupt */ + pins = "gpio9"; + function = "gpio"; + }; + + config { + pins = "gpio9"; + drive-strength = <2>; /* 2 MA */ + bias-pull-down; + }; + }; + + nfc_enable_active: nfc_enable_active { + mux { + /* Enable, Firmware and Clock request gpios */ + pins = "gpio6", "gpio8", "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio8", "gpio7"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + + nfc_enable_suspend: nfc_enable_suspend { + mux { + pins = "gpio6", "gpio8", "gpio7"; + function = "gpio"; + }; + + config { + pins = "gpio6", "gpio8", "gpio7"; + drive-strength = <2>; /* 2 MA */ + bias-disable; + }; + }; + }; }; }; diff --git a/qcom/ravelin-qrd.dtsi b/qcom/ravelin-qrd.dtsi index 83f6463a..c054bbbb 100644 --- a/qcom/ravelin-qrd.dtsi +++ b/qcom/ravelin-qrd.dtsi @@ -64,3 +64,27 @@ cd-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>; }; + +&qupv3_se0_i2c { + status = "ok"; + qcom,clk-freq-out = <1000000>; + #address-cells = <1>; + #size-cells = <0>; + nq@28 { + compatible = "qcom,sn-nci"; + reg = <0x28>; + qcom,sn-irq = <&tlmm 9 0x00>; + qcom,sn-ven = <&tlmm 6 0x00>; + qcom,sn-firm = <&tlmm 8 0x00>; + qcom,sn-clkreq = <&tlmm 7 0x00>; + qcom,sn-vdd-1p8-supply = <&L21B>; + qcom,sn-vdd-1p8-voltage = <1800000 1800000>; + qcom,sn-vdd-1p8-current = <157000>; + interrupt-parent = <&tlmm>; + interrupts = <9 0>; + interrupt-names = "nfc_irq"; + pinctrl-names = "nfc_active", "nfc_suspend"; + pinctrl-0 = <&nfc_int_active &nfc_enable_active>; + pinctrl-1 = <&nfc_int_suspend &nfc_enable_suspend>; + }; +};