From 6e18ee65c457ddc6fde228b906a355b89e055d6d Mon Sep 17 00:00:00 2001 From: Prudhvi Yarlagadda Date: Mon, 16 Dec 2019 19:04:36 +0530 Subject: [PATCH] dt-bindings: slim-msm-ngd: Add dt bindings for slimbus driver Add dt bindings for slimbus driver. Change-Id: I682b2316918855ba44efcfcd07c8e8b0d6555877 --- bindings/slimbus/slim-msm-ctrl.txt | 188 +++++++++++++++++++++++++++++ 1 file changed, 188 insertions(+) create mode 100644 bindings/slimbus/slim-msm-ctrl.txt diff --git a/bindings/slimbus/slim-msm-ctrl.txt b/bindings/slimbus/slim-msm-ctrl.txt new file mode 100644 index 00000000..a9f14e09 --- /dev/null +++ b/bindings/slimbus/slim-msm-ctrl.txt @@ -0,0 +1,188 @@ + Qualcomm Technologies,Inc. SLIMBUS controller + + Qualcomm Technologies,Inc implements 2 type of slimbus controllers: + + - compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,slim-msm": This controller is used if + applications processor driver is controlling + slimbus master component. This driver is responsible + for communicating with slave HW directly using + messaging interface, and doing data channel management. + Driver also communicates with satellite component + (driver implemented by other execution environment, + such as ADSP) to get its requirements for data channel + and bandwidth requirements. + "qcom,slim-ngd": This controller is used if applications + processor driver is controlling slimbus satellite + component (also known as Non-ported Generic Device, or + NGD). This is light-weight slimbus controller + responsible for communicating with slave HW directly + over bus messaging interface, and communicating with + master component (driver residing on other execution + environment, such as ADSP) for bandwidth and data + channel management. + + - reg: + Usage: required + Value type: + Definition: Offset and length of the register region(s) for the device + + - reg-names: + Usage: required + Value type: + Definition: Register region name(s) referenced in reg above + Required register resource entries are: + "slimbus_physical": Physical adderss of controller + register blocks + "slimbus_bam_physical": Physical address of Bus + Access Module (BAM) for this + controller + Optional register resource entries are: + "slimbus_lpass_mem": Physical address of LPASS + memory region to be used + "slimbus_slew_reg": Physical address for controller + slew rate + - cell-index: + Usage: required + Value type: + Definition: SLIMBUS number used for this controller + + - interrupts: + Usage: required + Value type: + Definition: Interrupt numbers used by this controller + + - interrupt-names: + Usage: required + Value type: + Definition: Interrupt name(s) referenced in reg above + Required interrupt resource entries are: + "slimbus_irq" : Interrupt for SLIMBUS core + "slimbus_bam_irq" : Interrupt for controller core's BAM + + - iommus : + Usage: optional + Value type: + Definition: A list of phandle and IOMMU specifier pairs that + describe the IOMMU master interfaces of the device. + + - qcom,iommu-dma-addr-pool : + Usage: optional + Value type: + Definition: Range of the DDR memory that can be used. + + - qcom,iommu-dma : + Usage: optional + Value type: + Definition: SMMU Attribute which is required when SMMU stage 1 is + enabled. + + - qcom,min-clk-gear : + Usage: optional + Value type: + Definition: Minimum clock gear at which this controller can be run + (range: 1-10). Default value will be 1 if this entry + is not specified. + - qcom,max-clk-gear: + Usage: optional + Value type: + Definition: Maximum clock gear at which this controller can be run + (range: 1-10). Default value will be 10 if this entry + is not specified + - qcom,rxreg-access: + Usage: optional + Value type: + Definition: This boolean indicates that slimbus RX should use direct + register access to receive data. This flag is only + needed if BAM pipe is not available to receive data + from slimbus + - qcom,apps-ch-pipes: + Usage: optional + Value type: + Definition: This value represents BAM pipe-mask used by application + processor for data channels. If this property is not + defined, default mask of 0 is used indicating that + application processor does not use BAM pipes for data + channels. + + - qcom,ea-pc: + Usage: optional + Value type: + Definition: This value represents product code (PC) field of + enumeration address (EA) for the QTI slimbus controller + hardware. This value is needed if data-channels + originating from apps are to be used, so that + application processor can query logical address of the + ported generic device to be used. Other than PC, fields + of EA are same across platforms. + + - qcom,slim-mdm: + Usage: optional + Value type: + Definition: This value provides the identifier of slimbus component on + external mdm. This property enables the slimbus driver + to register and receive subsytem restart notification + from mdm and follow appropriate steps to ensure + communication on the bus can be resumed after + mdm-restart. + + - qcom,subsys-name: + Usage: optional + Value type: + Definition: This value provides the subsystem name where slimbus master + is present. This property enables the slimbus driver to + register and receive subsytem restart notification from + subsystem and follow appropriate steps to ensure + communication on the bus can be resumed after subsytem + restart. By default slimbus driver register with ADSP + subsystem. + + - qcom,iommu-s1-bypass: + Usage: optional + Value type: + Definition: Boolean flag to bypass IOMMU stage 1 translation. + +SUBNODE: + +This subnode is optional and needs to be used in cases where SMMU S1 stage +needs to be bypassed. + +qcom,iommu_slim_ctrl_cb : + Usage: optional + Value type: + Definition: Child node representing the Slimbus controller + context bank. + +- compatible : + Usage: required + Value type: + Definition: Must be "qcom,slim-ctrl-cb" + +- iommus : + Usage: required + Value type: + Definition: A list of phandle and IOMMU specifier pairs that + describe the IOMMU master interfaces of the device. + +Example: + slim@fe12f000 { + cell-index = <1>; + compatible = "qcom,slim-msm"; + reg = <0xfe12f000 0x35000>, + <0xfe104000 0x20000>; + reg-names = "slimbus_physical", "slimbus_bam_physical"; + interrupts = <0 163 0 0 164 0>; + interrupt-names = "slimbus_irq", "slimbus_bam_irq"; + qcom,min-clk-gear = <10>; + qcom,rxreg-access; + qcom,apps-ch-pipes = <0x60000000>; + qcom,ea-pc = <0x30>; + + iommu_slim_ctrl_cb: qcom,iommu_slim_ctrl_cb { + compatible = "qcom,iommu-slim-ctrl-cb"; + iommus = <&apps_smmu 0x1 0x0>; + }; + };