From 7d9b58007deccf3aa52cfe3989cc3cc3fa36dfe6 Mon Sep 17 00:00:00 2001 From: Git User Date: Thu, 27 Aug 2020 05:37:29 -0700 Subject: [PATCH 01/66] Initial empty repository From 5358623a92a94bd00114ecab3ca3b59d27bde1ec Mon Sep 17 00:00:00 2001 From: Karthikeyan Periasamy Date: Wed, 2 Dec 2020 13:35:46 -0800 Subject: [PATCH 02/66] msm-vidc: Compile video component devicetree as overlay Moved devicetree of video component to VENDOR image. Change-Id: Iaa4323cfd9221b95fcc874c1c0ebb30415563f9c Signed-off-by: Karthikeyan Periasamy --- Kbuild | 6 +++ Makefile | 9 ++++ waipio-vidc.dts | 15 +++++++ waipio-vidc.dtsi | 104 +++++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 134 insertions(+) create mode 100644 Kbuild create mode 100644 Makefile create mode 100644 waipio-vidc.dts create mode 100644 waipio-vidc.dtsi diff --git a/Kbuild b/Kbuild new file mode 100644 index 00000000..640beddf --- /dev/null +++ b/Kbuild @@ -0,0 +1,6 @@ + +dtbo-y += waipio-vidc.dtbo + +always-y := $(dtb-y) $(dtbo-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb *.dtbo \ No newline at end of file diff --git a/Makefile b/Makefile new file mode 100644 index 00000000..b1e0dfe9 --- /dev/null +++ b/Makefile @@ -0,0 +1,9 @@ +KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=. + +all: dtbs + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean + +%: + $(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS) diff --git a/waipio-vidc.dts b/waipio-vidc.dts new file mode 100644 index 00000000..7bb074c0 --- /dev/null +++ b/waipio-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. waipio v1 SoC"; + compatible = "qcom,waipio"; + qcom,msm-id = <457 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi new file mode 100644 index 00000000..c14dfbd4 --- /dev/null +++ b/waipio-vidc.dtsi @@ -0,0 +1,104 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,waipio-vidc"; + status = "disable"; + reg = <0x0aa00000 0x00100000>; + interrupts = ; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk"; + clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>, + <&clock_videocc VIDEO_CC_MVS0C_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK>; + qcom,proxy-clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x1 0x1>; + qcom,allowed-clock-rates = <239999999 338000000 + 366000000 444000000>; + resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "video_axi_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_P0 + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 15000000 + 1000 15000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2100 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + buffer-types = <0xfff>; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent-hint-cached; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2104 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + buffer-types = <0x480>; + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2101 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + buffer-types = <0x241>; + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2103 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + buffer-types = <0x106>; + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; From 9c56ab35e9ed63efaf6f6254a22597c6bf17933c Mon Sep 17 00:00:00 2001 From: Akshay Chandrashekhar Kalghatgi Date: Tue, 15 Dec 2020 17:28:24 -0800 Subject: [PATCH 03/66] video: dts: remove secure context banks Remove secure context bank child nodes from Video device tree node since secure CBs are currently unsupported. Change-Id: Iad2647bdb690801577d40d8b68972f81c342d202 Signed-off-by: Akshay Chandrashekhar Kalghatgi --- waipio-vidc.dtsi | 39 --------------------------------------- 1 file changed, 39 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index c14dfbd4..0a9e3c9c 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -61,44 +61,5 @@ virtual-addr-pool = <0x25800000 0xba800000>; dma-coherent-hint-cached; }; - - secure_non_pixel_cb { - compatible = "qcom,msm-vidc,context-bank"; - label = "venus_sec_non_pixel"; - iommus = <&apps_smmu 0x2104 0x0400>; - qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; - qcom,iommu-faults = "non-fatal"; - qcom,iommu-pagetable = "LLC"; - qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ - buffer-types = <0x480>; - virtual-addr-pool = <0x01000000 0x24800000>; - qcom,secure-context-bank; - }; - - secure_bitstream_cb { - compatible = "qcom,msm-vidc,context-bank"; - label = "venus_sec_bitstream"; - iommus = <&apps_smmu 0x2101 0x0404>; - qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; - qcom,iommu-faults = "non-fatal"; - qcom,iommu-pagetable = "LLC"; - qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ - buffer-types = <0x241>; - virtual-addr-pool = <0x00500000 0xdfb00000>; - qcom,secure-context-bank; - }; - - secure_pixel_cb { - compatible = "qcom,msm-vidc,context-bank"; - label = "venus_sec_pixel"; - iommus = <&apps_smmu 0x2103 0x0400>; - qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; - qcom,iommu-faults = "non-fatal"; - qcom,iommu-pagetable = "LLC"; - qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ - buffer-types = <0x106>; - virtual-addr-pool = <0x00500000 0xdfb00000>; - qcom,secure-context-bank; - }; }; }; From 2ba25586cca8ef04889928ddf5062fee5956aa63 Mon Sep 17 00:00:00 2001 From: Akshay Chandrashekhar Kalghatgi Date: Tue, 15 Dec 2020 15:44:04 -0800 Subject: [PATCH 04/66] video: dts: add video firmware memory Add video firmware memory and pass-id. Change-Id: If1abbcd6bc9c6cd1cb12eecc56246af9d8b8f4fc Signed-off-by: Akshay Chandrashekhar Kalghatgi --- waipio-vidc.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 0a9e3c9c..dd83f660 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -5,6 +5,9 @@ reg = <0x0aa00000 0x00100000>; interrupts = ; + memory-region = <&video_mem>; + pas-id = <9>; + /* IOMMU Config */ #address-cells = <1>; #size-cells = <1>; From 14255f593b5274b75c99f7575ffe88c6f37086dc Mon Sep 17 00:00:00 2001 From: Akshay Chandrashekhar Kalghatgi Date: Thu, 14 Jan 2021 13:00:14 -0800 Subject: [PATCH 05/66] video: dts: add secure non-pixel context bank Add secure non-pixel context bank Change-Id: Ibe8d3181729f99fd06f9eac22b5d3512d7860b5b Signed-off-by: Akshay Chandrashekhar Kalghatgi --- waipio-vidc.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index dd83f660..fdb4f0ea 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -64,5 +64,18 @@ virtual-addr-pool = <0x25800000 0xba800000>; dma-coherent-hint-cached; }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2104 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + buffer-types = <0x480>; + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; }; }; From dd26a179105d71fb54d3ee33b0448eefb4c7c836 Mon Sep 17 00:00:00 2001 From: Chinmay Sawarkar Date: Wed, 27 Jan 2021 11:29:51 -0800 Subject: [PATCH 06/66] video: dts: Add lowsvs_d1 clock corner Add 192Mhz lowsvs_d1 clock corner for Waipio target. Change-Id: Ic274a3b2e0bc28dd0c103f17785f5f23e8f64504 Signed-off-by: Chinmay Sawarkar --- waipio-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index fdb4f0ea..ba40e80b 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -29,7 +29,7 @@ "core_clk", "vcodec_clk"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x1 0x1>; - qcom,allowed-clock-rates = <239999999 338000000 + qcom,allowed-clock-rates = <192000000 239999999 338000000 366000000 444000000>; resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names = "video_axi_reset"; From bccf2b104bc835abe0de400022b02eecf2057406 Mon Sep 17 00:00:00 2001 From: Akshay Chandrashekhar Kalghatgi Date: Mon, 1 Feb 2021 11:09:26 -0800 Subject: [PATCH 07/66] video: dts: update video SIDs for Waipio Video SIDs were changed for Waipio chipset and hence use the correct SIDs. Change-Id: I858e4bd06b41f85c13987e78edfd3c2210b4891f Signed-off-by: Akshay Chandrashekhar Kalghatgi --- waipio-vidc.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index ba40e80b..a8ae4547 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -56,7 +56,7 @@ non_secure_cb { compatible = "qcom,msm-vidc,context-bank"; label = "venus_ns"; - iommus = <&apps_smmu 0x2100 0x0400>; + iommus = <&apps_smmu 0x2180 0x0400>; qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; @@ -68,7 +68,7 @@ secure_non_pixel_cb { compatible = "qcom,msm-vidc,context-bank"; label = "venus_sec_non_pixel"; - iommus = <&apps_smmu 0x2104 0x0400>; + iommus = <&apps_smmu 0x2184 0x0400>; qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; From 4aab2b0249b9e610485da513d8275d6dd11bf756 Mon Sep 17 00:00:00 2001 From: Prabhakar Reddy Krishnappa Date: Mon, 7 Dec 2020 17:17:30 -0800 Subject: [PATCH 08/66] msm-vidc: Enable Video component Enabling Video probing. Change-Id: I53a060cf477effeba11e45f8a7177daa34263525 Signed-off-by: Prabhakar Reddy Krishnappa --- waipio-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index a8ae4547..0454f26f 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -1,7 +1,7 @@ &soc { msm_vidc: qcom,vidc@aa00000 { compatible = "qcom,msm-vidc", "qcom,waipio-vidc"; - status = "disable"; + status = "okay"; reg = <0x0aa00000 0x00100000>; interrupts = ; From f543b89c4eb331a0acb8c479adf8719dc507b453 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Mon, 8 Feb 2021 15:42:29 -0800 Subject: [PATCH 09/66] video: dts: update dma coherent to upstream string DMA coherent string is being used from upstream in waipio. Hence update dma coherent string accordingly. Change-Id: I9c6ee47cd826a385ff7c5e2a601d4872b95aba1f Signed-off-by: Maheshwar Ajja --- waipio-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 0454f26f..0be36d2b 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -62,7 +62,7 @@ qcom,iommu-pagetable = "LLC"; buffer-types = <0xfff>; virtual-addr-pool = <0x25800000 0xba800000>; - dma-coherent-hint-cached; + dma-coherent; }; secure_non_pixel_cb { From 769a86c3f08deb91e63b09a4a8aab121d9236c79 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Wed, 3 Feb 2021 14:48:09 -0800 Subject: [PATCH 10/66] video: dts: add video_cc_mvs0_clk_src to clock list Add the required clock source video_cc_mvs0_clk_src to video subsystem. Change-Id: I0377becc68f85e03ae999a458bee480c899ba4e3 Signed-off-by: Maheshwar Ajja --- waipio-vidc.dtsi | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 0be36d2b..faf4c3a2 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -21,14 +21,15 @@ /* Clocks */ clock-names = "gcc_video_axi0", - "core_clk", "vcodec_clk"; + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>, <&clock_videocc VIDEO_CC_MVS0C_CLK>, - <&clock_videocc VIDEO_CC_MVS0_CLK>; + <&clock_videocc VIDEO_CC_MVS0_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK_SRC>; qcom,proxy-clock-names = "gcc_video_axi0", - "core_clk", "vcodec_clk"; + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ - qcom,clock-configs = <0x0 0x1 0x1>; + qcom,clock-configs = <0x0 0x0 0x0 0x1>; qcom,allowed-clock-rates = <192000000 239999999 338000000 366000000 444000000>; resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>; From 10e35bfe6df84934751ea09b4d6db5247d0a7cc1 Mon Sep 17 00:00:00 2001 From: Akshay Chandrashekhar Kalghatgi Date: Sun, 31 Jan 2021 15:03:03 -0800 Subject: [PATCH 11/66] video: dts: add secure context banks Add secure bitstream and secure pixel context banks. Change-Id: Icf0845e2d8a1b448f9efeb3784e30839b41cc159 Signed-off-by: Akshay Chandrashekhar Kalghatgi --- waipio-vidc.dtsi | 26 ++++++++++++++++++++++++++ 1 file changed, 26 insertions(+) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index faf4c3a2..853e7811 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -78,5 +78,31 @@ virtual-addr-pool = <0x01000000 0x24800000>; qcom,secure-context-bank; }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + buffer-types = <0x241>; + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + buffer-types = <0x106>; + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; }; }; From 957d6ed5cf13d838be53aac021d3dea96b7a5a97 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 19 Feb 2021 14:43:15 +0530 Subject: [PATCH 12/66] video: dts: fix the register address space for video for waipio Register address space for video and clock controller for video is different. Exclude the video cc register space from video space. Change-Id: I62096ed46c8e89f0d1c3a3a8d0e3eddf0c937139 Signed-off-by: Vikash Garodia --- waipio-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 853e7811..3bf4744a 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -2,7 +2,7 @@ msm_vidc: qcom,vidc@aa00000 { compatible = "qcom,msm-vidc", "qcom,waipio-vidc"; status = "okay"; - reg = <0x0aa00000 0x00100000>; + reg = <0x0aa00000 0xF0000>; interrupts = ; memory-region = <&video_mem>; From 2dda4780b720b446892ef45d8a0642bc90bde2bb Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Sat, 13 Feb 2021 01:15:08 +0530 Subject: [PATCH 13/66] video: dts: add iommu_domain attributes Adding the attribute stall-disable would allow smmu to terminate faulty transaction instead of stalling the same. This would let the transaction reach to master early. Change-Id: I947f8d2b1753721cab39a6361ed153d9d3e67e7c Signed-off-by: Vikash Garodia --- waipio-vidc.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 3bf4744a..58c65101 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -59,7 +59,7 @@ label = "venus_ns"; iommus = <&apps_smmu 0x2180 0x0400>; qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; - qcom,iommu-faults = "non-fatal"; + qcom,iommu-faults = "non-fatal", "stall-disable"; qcom,iommu-pagetable = "LLC"; buffer-types = <0xfff>; virtual-addr-pool = <0x25800000 0xba800000>; @@ -71,7 +71,7 @@ label = "venus_sec_non_pixel"; iommus = <&apps_smmu 0x2184 0x0400>; qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; - qcom,iommu-faults = "non-fatal"; + qcom,iommu-faults = "non-fatal", "stall-disable"; qcom,iommu-pagetable = "LLC"; qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ buffer-types = <0x480>; From 00a4ce701ea464f873c2ff37e294498b5ead1e85 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 10 Mar 2021 10:58:26 -0800 Subject: [PATCH 14/66] video: dts: Add a new non-secure pix context bank Add entry for a new non-secure pix context bank. Change-Id: I34a8beca9938385291e87314e4f76cc0d48dbebb --- waipio-vidc.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 58c65101..da348f7e 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -66,6 +66,17 @@ dma-coherent; }; + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + secure_non_pixel_cb { compatible = "qcom,msm-vidc,context-bank"; label = "venus_sec_non_pixel"; From 827a7d83090f8990a9b8649c6b96586bee2a81db Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Wed, 10 Mar 2021 12:12:18 -0800 Subject: [PATCH 15/66] video: dts: Remove 'buffer-types' in context banks. - Remove usage of deprecated 'buffer-types' in context banks. Change-Id: I5625ac6034f6a3b04cc23ee3532d96d03a4e5aaf --- waipio-vidc.dtsi | 4 ---- 1 file changed, 4 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index da348f7e..c6cd5ebb 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -61,7 +61,6 @@ qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; qcom,iommu-faults = "non-fatal", "stall-disable"; qcom,iommu-pagetable = "LLC"; - buffer-types = <0xfff>; virtual-addr-pool = <0x25800000 0xba800000>; dma-coherent; }; @@ -85,7 +84,6 @@ qcom,iommu-faults = "non-fatal", "stall-disable"; qcom,iommu-pagetable = "LLC"; qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ - buffer-types = <0x480>; virtual-addr-pool = <0x01000000 0x24800000>; qcom,secure-context-bank; }; @@ -98,7 +96,6 @@ qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ - buffer-types = <0x241>; virtual-addr-pool = <0x00500000 0xdfb00000>; qcom,secure-context-bank; }; @@ -111,7 +108,6 @@ qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ - buffer-types = <0x106>; virtual-addr-pool = <0x00500000 0xdfb00000>; qcom,secure-context-bank; }; From eea2f9dad01f8f0d1ab84b93cda5ea16befe9e05 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 18 Mar 2021 18:56:24 -0700 Subject: [PATCH 16/66] video: dts: add support for waipio apq device Add video driver into waipio apq device. Change-Id: I3794ab3437c88a058b8bb39e8952cacf05368a5b --- waipio-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index 7bb074c0..58b78d53 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. waipio v1 SoC"; compatible = "qcom,waipio"; - qcom,msm-id = <457 0x10000>; + qcom,msm-id = <457 0x10000>, <482 0x10000>; qcom,board-id = <0 0>; }; From ab5b21e6b0813d64786c86594faf4d7fc196d0d2 Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Mon, 22 Mar 2021 17:45:28 -0700 Subject: [PATCH 17/66] video: dts: Remove LowSVS_D1 clock rate Remove the unsupported LowSVS_D1 clock rate from allowed clock rates. Change-Id: Ib2e983483514a6fa6f162fd15eb96812092018be --- waipio-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index c6cd5ebb..82458112 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -30,7 +30,7 @@ "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x1>; - qcom,allowed-clock-rates = <192000000 239999999 338000000 + qcom,allowed-clock-rates = <239999999 338000000 366000000 444000000>; resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names = "video_axi_reset"; From 495fbcca00a75ccd14f7c6acae426ec4abcdceee Mon Sep 17 00:00:00 2001 From: Shivendra Kakrania Date: Wed, 24 Mar 2021 11:42:08 -0700 Subject: [PATCH 18/66] video: dts: add clock ids and mmrm config Add clock ids for each clock. Enable mmrm for clock sources. Change-Id: I8236a53e5839d5c3b0c78c718a6b88e9fb604c16 Signed-off-by: Sebastian Dang --- waipio-vidc.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 82458112..dbb4c128 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -22,6 +22,8 @@ /* Clocks */ clock-names = "gcc_video_axi0", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>, <&clock_videocc VIDEO_CC_MVS0C_CLK>, <&clock_videocc VIDEO_CC_MVS0_CLK>, From 4e5a682c1542186783e35703aae5549556743626 Mon Sep 17 00:00:00 2001 From: Maheshwar Ajja Date: Thu, 8 Apr 2021 15:20:31 -0700 Subject: [PATCH 19/66] video: dts: reset mvs0c clock in power on sequence Reset mvs0c clock in power on sequence to resolve video hardware failures. Change-Id: Ic60e74868af3939e8d88bacd2c158440e1ba753d --- waipio-vidc.dtsi | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index dbb4c128..533d84da 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -34,8 +34,9 @@ qcom,clock-configs = <0x0 0x0 0x0 0x1>; qcom,allowed-clock-rates = <239999999 338000000 366000000 444000000>; - resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>; - reset-names = "video_axi_reset"; + resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "video_axi_reset", "video_core_reset"; qcom,reg-presets = <0xB0088 0x0 0x11>; From eff313c42bc947e8f580dc16ca8eb2cce7a8b85c Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Mon, 12 Apr 2021 19:08:19 +0530 Subject: [PATCH 20/66] video: dts: add platform and vpu variant support Added "qcom,msm-vidc-waipio" and "qcom,msm-vidc-iris2" entries to support runtime target and vpu variant selection. Change-Id: I2a0f8fa737c8e114be3215aab43a7fc3d233be18 --- waipio-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 533d84da..41311f48 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -1,6 +1,6 @@ &soc { msm_vidc: qcom,vidc@aa00000 { - compatible = "qcom,msm-vidc", "qcom,waipio-vidc"; + compatible = "qcom,msm-vidc", "qcom,msm-vidc-waipio", "qcom,msm-vidc-iris2"; status = "okay"; reg = <0x0aa00000 0xF0000>; interrupts = ; From ac9b21112114009b422c46dc2d199d16a340ffbe Mon Sep 17 00:00:00 2001 From: Mihir Ganu Date: Tue, 25 May 2021 11:19:30 -0700 Subject: [PATCH 21/66] video: dts: Add support for Waipio V2 devices Add support for Waipio V2 devices. Change-Id: I60acd5a77c1b94da76558e78c05007b6893afbd4 --- waipio-vidc.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index 58b78d53..9f41c180 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -10,6 +10,7 @@ / { model = "Qualcomm Technologies, Inc. waipio v1 SoC"; compatible = "qcom,waipio"; - qcom,msm-id = <457 0x10000>, <482 0x10000>; + qcom,msm-id = <457 0x10000>, <482 0x10000>, + <457 0x20000>, <482 0x20000>; qcom,board-id = <0 0>; }; From cd46c46c7e8eb93d37ffeec28e6b939d5fe9ee27 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Thu, 9 Sep 2021 14:18:52 +0530 Subject: [PATCH 22/66] ARM: dts: msm: Add support for diwali device Add dt support for diwali variant. Change-Id: Ida800543eba6bf84ad225a30de798d323baa8ae2 Signed-off-by: Ankush Mitra --- Kbuild | 7 +++- diwali-vidc.dts | 15 +++++++ diwali-vidc.dtsi | 107 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 127 insertions(+), 2 deletions(-) create mode 100644 diwali-vidc.dts create mode 100644 diwali-vidc.dtsi diff --git a/Kbuild b/Kbuild index 640beddf..4ecd5402 100644 --- a/Kbuild +++ b/Kbuild @@ -1,6 +1,9 @@ - +ifeq ($(CONFIG_ARCH_WAIPIO), y) dtbo-y += waipio-vidc.dtbo - +endif +ifeq ($(CONFIG_ARCH_DIWALI), y) +dtbo-y += diwali-vidc.dtbo +endif always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo \ No newline at end of file diff --git a/diwali-vidc.dts b/diwali-vidc.dts new file mode 100644 index 00000000..5942f89f --- /dev/null +++ b/diwali-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "diwali-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Diwali SoC"; + compatible = "qcom,diwali"; + qcom,msm-id = <506 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/diwali-vidc.dtsi b/diwali-vidc.dtsi new file mode 100644 index 00000000..e11e7ce7 --- /dev/null +++ b/diwali-vidc.dtsi @@ -0,0 +1,107 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-diwali", "qcom,msm-vidc-iris2"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <240000000 338000000 + 364800000 444000000>; + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "video_axi_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mmss_noc MASTER_VIDEO_P0 + &mc_virt SLAVE_EBI1>; + + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 15000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2180 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2184 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; From bc1cc27e6c24f18272a3a675dc6cec0bed939950 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Mon, 1 Nov 2021 19:15:14 +0530 Subject: [PATCH 23/66] ARM: dts: msm: diwali: Add clock corners Update to correct clock corners for diwali higher SKU variant. Change-Id: Ice399eafa7c8e9b1da56ed3e41bdd816e6b1a92c Signed-off-by: Priyanka Gujjula --- diwali-vidc.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/diwali-vidc.dtsi b/diwali-vidc.dtsi index e11e7ce7..b47701e5 100644 --- a/diwali-vidc.dtsi +++ b/diwali-vidc.dtsi @@ -30,7 +30,7 @@ /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x1>; qcom,allowed-clock-rates = <240000000 338000000 - 364800000 444000000>; + 366000000 444000000>; resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; reset-names = "video_axi_reset"; From 2dc6a9281bde3a38735a8f85e8bb0c17750e1168 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 12 Nov 2021 17:09:02 +0530 Subject: [PATCH 24/66] ARM: dts: msm: add msm id for cape The dts would ensure the msm id for cape is added and the corresponding dtsi file is included. Signed-off-by: Vikash Garodia --- waipio-vidc.dts | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index 9f41c180..82506a67 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -8,9 +8,10 @@ #include "waipio-vidc.dtsi" / { - model = "Qualcomm Technologies, Inc. waipio v1 SoC"; - compatible = "qcom,waipio"; + model = "Qualcomm Technologies, Inc. waipio/cape v1 SoC"; + compatible = "qcom,waipio", "qcom,cape"; qcom,msm-id = <457 0x10000>, <482 0x10000>, - <457 0x20000>, <482 0x20000>; + <457 0x20000>, <482 0x20000>, + <530 0x10000>, <540 0x10000>; qcom,board-id = <0 0>; }; From 0b1bb074c002550082806326e471d73dd81dc5cb Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 17 Dec 2021 11:53:43 +0530 Subject: [PATCH 25/66] ARM: dts: msm: diwali: Add board-id for hsp platform Adds board-id to support video on diwali hsp platform. Change-Id: Icf609250ac95603d0d8746530f6af63dd4a003e7 --- diwali-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/diwali-vidc.dts b/diwali-vidc.dts index 5942f89f..618dd0d7 100644 --- a/diwali-vidc.dts +++ b/diwali-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Diwali SoC"; compatible = "qcom,diwali"; qcom,msm-id = <506 0x10000>; - qcom,board-id = <0 0>; + qcom,board-id = <0 0>, <0 2>; }; From 6bcfa0679de5755a8587e0f58598afa9c2228cf6 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Tue, 21 Dec 2021 12:55:12 +0530 Subject: [PATCH 26/66] ARM: dts: msm: diwali: Enable LLCC Enable LLCC support for diwali. Change-Id: I2a22a234e2fe76d91ec197ac9aff06204f2ebef8 --- diwali-vidc.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/diwali-vidc.dtsi b/diwali-vidc.dtsi index b47701e5..93c1d989 100644 --- a/diwali-vidc.dtsi +++ b/diwali-vidc.dtsi @@ -12,6 +12,9 @@ #address-cells = <1>; #size-cells = <1>; + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + /* Supply */ iris-ctl-supply = <&video_cc_mvs0c_gdsc>; vcodec-supply = <&video_cc_mvs0_gdsc>; @@ -40,16 +43,17 @@ vidc,firmware-name = "vpu20_4v"; /* Bus Interconnects */ - interconnect-names = "venus-cnoc", "venus-ddr"; + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; interconnects = <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, <&mmss_noc MASTER_VIDEO_P0 - &mc_virt SLAVE_EBI1>; - + &gem_noc SLAVE_LLCC>; /* Bus BW range (low, high) for each bus */ qcom,bus-range-kbps = <1000 1000 + 1000 15000000 1000 15000000>; - /* MMUs */ non_secure_cb { compatible = "qcom,msm-vidc,context-bank"; From e800e55a327d50cd090fabc601049f3c870491a6 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 24 Dec 2021 12:15:09 +0530 Subject: [PATCH 27/66] ARM: dts: msm: keep context banks with stall enabled When stall is disabled, during fault, the NOC asserts are not reaching to video NOC. As a result, the fault notification is not getting handled in video firmware as well as video driver. This is leading to undesired behavior like NOC hung. Change-Id: I1aee2b62f485614be575769242e570a0028ce615 --- waipio-vidc.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index 41311f48..f58d6c13 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -62,7 +62,7 @@ label = "venus_ns"; iommus = <&apps_smmu 0x2180 0x0400>; qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; - qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; virtual-addr-pool = <0x25800000 0xba800000>; dma-coherent; @@ -73,7 +73,7 @@ label = "venus_ns_pixel"; iommus = <&apps_smmu 0x2187 0x0400>; qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; - qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; virtual-addr-pool = <0x00100000 0xdff00000>; dma-coherent; @@ -84,7 +84,7 @@ label = "venus_sec_non_pixel"; iommus = <&apps_smmu 0x2184 0x0400>; qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; - qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-faults = "non-fatal"; qcom,iommu-pagetable = "LLC"; qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ virtual-addr-pool = <0x01000000 0x24800000>; From b59be90fe126bf167645f3b139b615dc8b2c6943 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 30 Dec 2021 13:22:13 +0530 Subject: [PATCH 28/66] video: dts: add support for APQ variant in diwali This change add video support for APQ variant in diwali target. Change-Id: Ib7216ccdb701516a5ffc8edd0aca7b3a1ee86633 Signed-off-by: Ankush Mitra --- diwali-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/diwali-vidc.dts b/diwali-vidc.dts index 618dd0d7..955d0c1d 100644 --- a/diwali-vidc.dts +++ b/diwali-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Diwali SoC"; compatible = "qcom,diwali"; - qcom,msm-id = <506 0x10000>; + qcom,msm-id = <506 0x10000> , <547 0x10000>; qcom,board-id = <0 0>, <0 2>; }; From 28e0e4b84e615abc7cdec5412caffe720c0429df Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Fri, 17 Dec 2021 11:53:43 +0530 Subject: [PATCH 29/66] ARM: dts: msm: diwali: Add board-id for hsp platform Adds board-id to support video on diwali hsp platform. Change-Id: Icf609250ac95603d0d8746530f6af63dd4a003e7 --- diwali-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/diwali-vidc.dts b/diwali-vidc.dts index 5942f89f..618dd0d7 100644 --- a/diwali-vidc.dts +++ b/diwali-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Diwali SoC"; compatible = "qcom,diwali"; qcom,msm-id = <506 0x10000>; - qcom,board-id = <0 0>; + qcom,board-id = <0 0>, <0 2>; }; From 6876e0f05b4276ff0d19801582ea660aff959037 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Mon, 10 Jan 2022 10:08:15 +0530 Subject: [PATCH 30/66] ARM: dts: msm: Add Waipio 4G variant Add 4G variant in video dts. Change-Id: I17b7f50f211c4377dafaa505c4e209fdf9f60402 --- waipio-vidc.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index 82506a67..c75054d8 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -12,6 +12,7 @@ compatible = "qcom,waipio", "qcom,cape"; qcom,msm-id = <457 0x10000>, <482 0x10000>, <457 0x20000>, <482 0x20000>, - <530 0x10000>, <540 0x10000>; + <530 0x10000>, <540 0x10000>, + <552 0x10000>; qcom,board-id = <0 0>; }; From 07af8cfa648c6bbff40316cb226c6e8e812d5649 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Mon, 10 Jan 2022 10:08:15 +0530 Subject: [PATCH 31/66] ARM: dts: msm: Add Waipio 4G variant Add 4G variant in video dts. Change-Id: I17b7f50f211c4377dafaa505c4e209fdf9f60402 --- waipio-vidc.dts | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index 82506a67..c75054d8 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -12,6 +12,7 @@ compatible = "qcom,waipio", "qcom,cape"; qcom,msm-id = <457 0x10000>, <482 0x10000>, <457 0x20000>, <482 0x20000>, - <530 0x10000>, <540 0x10000>; + <530 0x10000>, <540 0x10000>, + <552 0x10000>; qcom,board-id = <0 0>; }; From c6c3551ea4424e8b64d8f0c428b0987eccac9d2a Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 18 Jan 2022 15:12:05 +0530 Subject: [PATCH 32/66] ARM: dts: msm: add variant soc id for Cape Add a new variant soc id for cape. Change-Id: Id63f3200cd3f9355e311de9f9454c06b4f14088a --- waipio-vidc.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index c75054d8..f9ccd598 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -12,7 +12,7 @@ compatible = "qcom,waipio", "qcom,cape"; qcom,msm-id = <457 0x10000>, <482 0x10000>, <457 0x20000>, <482 0x20000>, - <530 0x10000>, <540 0x10000>, - <552 0x10000>; + <530 0x10000>, <531 0x10000>, + <540 0x10000>, <552 0x10000>; qcom,board-id = <0 0>; }; From 312a7133f8b90e9ef3e1013b9710115d14f80196 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Tue, 18 Jan 2022 15:12:05 +0530 Subject: [PATCH 33/66] ARM: dts: msm: add variant soc id for Cape Add a new variant soc id for cape. Change-Id: Id63f3200cd3f9355e311de9f9454c06b4f14088a --- waipio-vidc.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index c75054d8..f9ccd598 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -12,7 +12,7 @@ compatible = "qcom,waipio", "qcom,cape"; qcom,msm-id = <457 0x10000>, <482 0x10000>, <457 0x20000>, <482 0x20000>, - <530 0x10000>, <540 0x10000>, - <552 0x10000>; + <530 0x10000>, <531 0x10000>, + <540 0x10000>, <552 0x10000>; qcom,board-id = <0 0>; }; From e0e1fbaaa62918aefb08507e6a885155e95d6e62 Mon Sep 17 00:00:00 2001 From: Priyanka Gujjula Date: Tue, 15 Feb 2022 19:56:11 +0530 Subject: [PATCH 34/66] ARM: dts: msm: diwali: Add dt support for Diwali LTE Add device-tree support to support video on Diwali LTE. Change-Id: I6f3a269132c63a89cc021d1164bddcc9e51e01be --- diwali-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/diwali-vidc.dts b/diwali-vidc.dts index 955d0c1d..2791b81f 100644 --- a/diwali-vidc.dts +++ b/diwali-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Diwali SoC"; compatible = "qcom,diwali"; - qcom,msm-id = <506 0x10000> , <547 0x10000>; + qcom,msm-id = <506 0x10000> , <547 0x10000>, <564 0x10000>; qcom,board-id = <0 0>, <0 2>; }; From c1db2aef6eb8fb0f0cae0bf506e9a690fc6e6fa1 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 18 Jan 2022 10:40:11 +0530 Subject: [PATCH 35/66] ARM: dts: msm: Add support for parrot device Add dt support for parrot variant. Change-Id: I1f6f5181b73ea37f4ef69036363273046d90f6ec --- Kbuild | 3 ++ parrot-vidc.dts | 15 +++++++ parrot-vidc.dtsi | 109 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 127 insertions(+) create mode 100644 parrot-vidc.dts create mode 100644 parrot-vidc.dtsi diff --git a/Kbuild b/Kbuild index 4ecd5402..485be4c5 100644 --- a/Kbuild +++ b/Kbuild @@ -4,6 +4,9 @@ endif ifeq ($(CONFIG_ARCH_DIWALI), y) dtbo-y += diwali-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_PARROT), y) +dtbo-y += parrot-vidc.dtbo +endif always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo \ No newline at end of file diff --git a/parrot-vidc.dts b/parrot-vidc.dts new file mode 100644 index 00000000..ddd6548f --- /dev/null +++ b/parrot-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "parrot-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Parrot"; + compatible = "qcom,parrot"; + qcom,msm-id = <537 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/parrot-vidc.dtsi b/parrot-vidc.dtsi new file mode 100644 index 00000000..a4268755 --- /dev/null +++ b/parrot-vidc.dtsi @@ -0,0 +1,109 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-parrot", "qcom,msm-vidc-iris2"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvsc_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "video_cc_mvsc_ctl_axi", + "video_cc_mvs0_ctl_axi", "core_clk", + "vcodec_clk", "iface_clk", "video_cc_iris_clk_src"; + clock-ids = ; + clocks = <&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>, + <&videocc VIDEO_CC_MVS0_AXI_CLK>, + <&videocc VIDEO_CC_MVSC_CORE_CLK>, + <&videocc VIDEO_CC_MVS0_CORE_CLK>, + <&videocc VIDEO_CC_VENUS_AHB_CLK>, + <&videocc VIDEO_CC_IRIS_CLK_SRC>; + qcom,proxy-clock-names = "video_cc_mvsc_ctl_axi", + "video_cc_mvs0_ctl_axi", "core_clk", + "vcodec_clk", "iface_clk", "video_cc_iris_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <133333333 240000000 + 335000000 424000000 460000000>; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_1v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &cnoc2 SLAVE_VENUS_CFG>, + <&mmss_noc MASTER_VIDEO_P0 + &mc_virt SLAVE_EBI1>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 8000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2180 0x0020>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2184 0x0020>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; From 2fd8b0f35f69fe677fcb12018d2655c54cceaf79 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Thu, 16 Dec 2021 17:43:16 +0530 Subject: [PATCH 36/66] ARM: dts: msm: Add support for Aurora Add support for Aurora (neo) device. Change-Id: I3291ac08121d6df8d6ddf4b92f29009a552f1859 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- Kbuild | 7 +++ neo-vidc.dts | 15 +++++++ neo-vidc.dtsi | 117 ++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 139 insertions(+) create mode 100644 neo-vidc.dts create mode 100644 neo-vidc.dtsi diff --git a/Kbuild b/Kbuild index 485be4c5..7fc40e39 100644 --- a/Kbuild +++ b/Kbuild @@ -1,12 +1,19 @@ ifeq ($(CONFIG_ARCH_WAIPIO), y) dtbo-y += waipio-vidc.dtbo endif + ifeq ($(CONFIG_ARCH_DIWALI), y) dtbo-y += diwali-vidc.dtbo endif + ifeq ($(CONFIG_ARCH_PARROT), y) dtbo-y += parrot-vidc.dtbo endif + +ifeq ($(CONFIG_ARCH_NEO), y) +dtbo-y += neo-vidc.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo \ No newline at end of file diff --git a/neo-vidc.dts b/neo-vidc.dts new file mode 100644 index 00000000..55a13251 --- /dev/null +++ b/neo-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "neo-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. NEO v1 SoC"; + compatible = "qcom,neo"; + qcom,msm-id = <554 0x10000>; + qcom,board-id = <34 1>; +}; diff --git a/neo-vidc.dtsi b/neo-vidc.dtsi new file mode 100644 index 00000000..68db727c --- /dev/null +++ b/neo-vidc.dtsi @@ -0,0 +1,117 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-neo", "qcom,msm-vidc-iris3"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "gcc_video_axi0", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <239999999 338000000>; + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "video_axi_reset", "video_core_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 8000000 + 1000 8000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2980 0x0000>,<&apps_smmu 0x29C0 0x0000>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2987 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2984 0x0000>,<&apps_smmu 0x29C4 0x0000>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2981 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2983 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; From a2e83d39887da56734a762934050e5fb8dae96fb Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Tue, 22 Feb 2022 10:43:20 +0530 Subject: [PATCH 37/66] ARM: dts: msm: Remove axi0 clock reset axi0 clock reset in power_on sequence causing random behavior in NOC. Hence remove the same. Change-Id: Iaaff5b85b695f9df5d05b06810ed4e4e3f8df107 Signed-off-by: Gaviraju Doddabettahalli Bettegowda --- neo-vidc.dtsi | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/neo-vidc.dtsi b/neo-vidc.dtsi index 68db727c..57f9cd74 100644 --- a/neo-vidc.dtsi +++ b/neo-vidc.dtsi @@ -33,9 +33,8 @@ /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x1>; qcom,allowed-clock-rates = <239999999 338000000>; - resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>, - <&videocc VIDEO_CC_MVS0C_CLK_ARES>; - reset-names = "video_axi_reset", "video_core_reset"; + resets = <&videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "video_core_reset"; qcom,reg-presets = <0xB0088 0x0 0x11>; From b24de5ef96bdeb91756a77663018aecedba966a1 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Mon, 21 Feb 2022 13:50:55 +0530 Subject: [PATCH 38/66] ARM: dts: msm: Change name of all ctl clk to a generic name This change will rename all ctl axi clk across different platform to a generic name. Change-Id: I5bdff6138bd097ac7f20684be1b446e3e76499c5 Signed-off-by: Ankush Mitra --- diwali-vidc.dtsi | 4 ++-- neo-vidc.dtsi | 4 ++-- parrot-vidc.dtsi | 8 ++++---- waipio-vidc.dtsi | 4 ++-- 4 files changed, 10 insertions(+), 10 deletions(-) diff --git a/diwali-vidc.dtsi b/diwali-vidc.dtsi index 93c1d989..8ef2f4c9 100644 --- a/diwali-vidc.dtsi +++ b/diwali-vidc.dtsi @@ -20,7 +20,7 @@ vcodec-supply = <&video_cc_mvs0_gdsc>; /* Clocks */ - clock-names = "gcc_video_axi0", + clock-names = "video_ctl_axi0_clk", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; clock-ids = ; @@ -28,7 +28,7 @@ <&videocc VIDEO_CC_MVS0C_CLK>, <&videocc VIDEO_CC_MVS0_CLK>, <&videocc VIDEO_CC_MVS0_CLK_SRC>; - qcom,proxy-clock-names = "gcc_video_axi0", + qcom,proxy-clock-names = "video_ctl_axi0_clk", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x1>; diff --git a/neo-vidc.dtsi b/neo-vidc.dtsi index 57f9cd74..4bd5f27d 100644 --- a/neo-vidc.dtsi +++ b/neo-vidc.dtsi @@ -20,7 +20,7 @@ vcodec-supply = <&video_cc_mvs0_gdsc>; /* Clocks */ - clock-names = "gcc_video_axi0", + clock-names = "video_ctl_axi0_clk", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; clock-ids = ; @@ -28,7 +28,7 @@ <&videocc VIDEO_CC_MVS0C_CLK>, <&videocc VIDEO_CC_MVS0_CLK>, <&videocc VIDEO_CC_MVS0_CLK_SRC>; - qcom,proxy-clock-names = "gcc_video_axi0", + qcom,proxy-clock-names = "video_ctl_axi0_clk", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x1>; diff --git a/parrot-vidc.dtsi b/parrot-vidc.dtsi index a4268755..8b381cda 100644 --- a/parrot-vidc.dtsi +++ b/parrot-vidc.dtsi @@ -17,8 +17,8 @@ vcodec-supply = <&video_cc_mvs0_gdsc>; /* Clocks */ - clock-names = "video_cc_mvsc_ctl_axi", - "video_cc_mvs0_ctl_axi", "core_clk", + clock-names = "video_ctl_axi0_clk", + "video_mvs0_axi_clk", "core_clk", "vcodec_clk", "iface_clk", "video_cc_iris_clk_src"; clock-ids = , <&videocc VIDEO_CC_VENUS_AHB_CLK>, <&videocc VIDEO_CC_IRIS_CLK_SRC>; - qcom,proxy-clock-names = "video_cc_mvsc_ctl_axi", - "video_cc_mvs0_ctl_axi", "core_clk", + qcom,proxy-clock-names = "video_ctl_axi0_clk", + "video_mvs0_axi_clk", "core_clk", "vcodec_clk", "iface_clk", "video_cc_iris_clk_src"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x1>; diff --git a/waipio-vidc.dtsi b/waipio-vidc.dtsi index f58d6c13..7efca994 100644 --- a/waipio-vidc.dtsi +++ b/waipio-vidc.dtsi @@ -20,7 +20,7 @@ vcodec-supply = <&video_cc_mvs0_gdsc>; /* Clocks */ - clock-names = "gcc_video_axi0", + clock-names = "video_ctl_axi0_clk", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; clock-ids = ; @@ -28,7 +28,7 @@ <&clock_videocc VIDEO_CC_MVS0C_CLK>, <&clock_videocc VIDEO_CC_MVS0_CLK>, <&clock_videocc VIDEO_CC_MVS0_CLK_SRC>; - qcom,proxy-clock-names = "gcc_video_axi0", + qcom,proxy-clock-names = "video_ctl_axi0_clk", "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ qcom,clock-configs = <0x0 0x0 0x0 0x1>; From 0143c10669879f2cca0deea818152366289890cd Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Wed, 27 Apr 2022 12:56:37 +0530 Subject: [PATCH 39/66] ARM: dts: msm: Remove LLCC support for aurora LA Currently, LLCC driver probe is disabled, so removed LLCC entry from video device tree. Change-Id: I76aef958da9c60869f4c53653462378301d0c08e --- neo-vidc.dtsi | 3 --- 1 file changed, 3 deletions(-) diff --git a/neo-vidc.dtsi b/neo-vidc.dtsi index 4bd5f27d..fb68a3ca 100644 --- a/neo-vidc.dtsi +++ b/neo-vidc.dtsi @@ -12,9 +12,6 @@ #address-cells = <1>; #size-cells = <1>; - /* LLCC Cache */ - cache-slice-names = "vidsc0"; - /* Supply */ iris-ctl-supply = <&video_cc_mvs0c_gdsc>; vcodec-supply = <&video_cc_mvs0_gdsc>; From 15293e7182923fac5a441e8588b7c36db802c3e4 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Fri, 3 Jun 2022 18:57:33 +0530 Subject: [PATCH 40/66] Revert "ARM: dts: msm: Remove LLCC support for aurora LA" This reverts commit 0143c10669879f2cca0deea818152366289890cd. --- neo-vidc.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/neo-vidc.dtsi b/neo-vidc.dtsi index fb68a3ca..4bd5f27d 100644 --- a/neo-vidc.dtsi +++ b/neo-vidc.dtsi @@ -12,6 +12,9 @@ #address-cells = <1>; #size-cells = <1>; + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + /* Supply */ iris-ctl-supply = <&video_cc_mvs0c_gdsc>; vcodec-supply = <&video_cc_mvs0_gdsc>; From e93ab39ea1ddd23c9f8feb4848e04049f3f31866 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Thu, 30 Jun 2022 12:26:43 +0530 Subject: [PATCH 41/66] ARM: dts: msm: Add Parrot 4GB DT Support Add board-id for Parrot 4GB Support Change-Id: I71a18b57ad7f05b7dafbc4f2ca02cd5e2272f47f --- parrot-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parrot-vidc.dts b/parrot-vidc.dts index ddd6548f..e91095a2 100644 --- a/parrot-vidc.dts +++ b/parrot-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Parrot"; compatible = "qcom,parrot"; qcom,msm-id = <537 0x10000>; - qcom,board-id = <0 0>; + qcom,board-id = <0 0>, <0 0x600>; }; From b257cb822aaa46176f1945ccd3bfe401b41f9dff Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Mon, 18 Jul 2022 23:04:37 +0530 Subject: [PATCH 42/66] ARM: dts: msm: Add aurora LA variant SOC ID Added Aurora LA variant SOC ID. Change-Id: I2018b801d88730421f1b33f72320a6b40788c200 --- neo-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/neo-vidc.dts b/neo-vidc.dts index 55a13251..5c89765d 100644 --- a/neo-vidc.dts +++ b/neo-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. NEO v1 SoC"; compatible = "qcom,neo"; - qcom,msm-id = <554 0x10000>; + qcom,msm-id = <554 0x10000>, <579 0x10000>; qcom,board-id = <34 1>; }; From ae921e46505fcddd21abfe5acbd0c0aadfdee21a Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Sat, 23 Jul 2022 21:47:59 +0530 Subject: [PATCH 43/66] ARM: dts: msm: add msm id for ukee The dts would ensure the msm id for ukee is added and the corresponding dtsi file is also included. Change-Id: I23606f117f6d56e9b7b26f61279fc0388064957e --- waipio-vidc.dts | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index f9ccd598..21417ae4 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -8,11 +8,12 @@ #include "waipio-vidc.dtsi" / { - model = "Qualcomm Technologies, Inc. waipio/cape v1 SoC"; - compatible = "qcom,waipio", "qcom,cape"; + model = "Qualcomm Technologies, Inc. waipio/cape/ukee v1 SoC"; + compatible = "qcom,waipio", "qcom,cape", "qcom,ukee"; qcom,msm-id = <457 0x10000>, <482 0x10000>, <457 0x20000>, <482 0x20000>, <530 0x10000>, <531 0x10000>, - <540 0x10000>, <552 0x10000>; + <540 0x10000>, <552 0x10000>, + <591 0x10000>; qcom,board-id = <0 0>; }; From 2de6579ce394f03f49e58414db13ffea6bd0aeff Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 5 Aug 2022 22:58:48 +0530 Subject: [PATCH 44/66] ARM: dts: msm: differentiate spec for waipio and ukee Split the dts file for waipio and ukee, such that the compatible string can be defined explicitly for ukee. With the separate compatible string for ukee, the spec for ukee is defined. Change-Id: I9e7e5a885ddea05c204418a182f958e6826d1d60 --- Kbuild | 6 +++++- ukee-vidc.dts | 19 +++++++++++++++++++ 2 files changed, 24 insertions(+), 1 deletion(-) create mode 100644 ukee-vidc.dts diff --git a/Kbuild b/Kbuild index 7fc40e39..76492417 100644 --- a/Kbuild +++ b/Kbuild @@ -2,6 +2,10 @@ ifeq ($(CONFIG_ARCH_WAIPIO), y) dtbo-y += waipio-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_CAPE), y) +dtbo-y += ukee-vidc.dtbo +endif + ifeq ($(CONFIG_ARCH_DIWALI), y) dtbo-y += diwali-vidc.dtbo endif @@ -16,4 +20,4 @@ endif always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) -clean-files := *.dtb *.dtbo \ No newline at end of file +clean-files := *.dtb *.dtbo diff --git a/ukee-vidc.dts b/ukee-vidc.dts new file mode 100644 index 00000000..8e8c66b8 --- /dev/null +++ b/ukee-vidc.dts @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. ukee v1 SoC"; + compatible = "qcom,ukee"; + qcom,msm-id = <591 0x10000>; + qcom,board-id = <0 0>; +}; + +&msm_vidc { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-waipio", "qcom,msm-vidc-iris2", "qcom,msm-vidc-ukee"; +}; From aa2a43718f4accc642e7bdaec019bf340f6d4e1d Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Sat, 23 Jul 2022 21:47:59 +0530 Subject: [PATCH 45/66] ARM: dts: msm: add msm id for ukee The dts would ensure the msm id for ukee is added and the corresponding dtsi file is also included. Change-Id: I23606f117f6d56e9b7b26f61279fc0388064957e --- waipio-vidc.dts | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/waipio-vidc.dts b/waipio-vidc.dts index f9ccd598..21417ae4 100644 --- a/waipio-vidc.dts +++ b/waipio-vidc.dts @@ -8,11 +8,12 @@ #include "waipio-vidc.dtsi" / { - model = "Qualcomm Technologies, Inc. waipio/cape v1 SoC"; - compatible = "qcom,waipio", "qcom,cape"; + model = "Qualcomm Technologies, Inc. waipio/cape/ukee v1 SoC"; + compatible = "qcom,waipio", "qcom,cape", "qcom,ukee"; qcom,msm-id = <457 0x10000>, <482 0x10000>, <457 0x20000>, <482 0x20000>, <530 0x10000>, <531 0x10000>, - <540 0x10000>, <552 0x10000>; + <540 0x10000>, <552 0x10000>, + <591 0x10000>; qcom,board-id = <0 0>; }; From a964e54907f25c36566704d894096728d2eed792 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Thu, 18 Aug 2022 13:31:27 +0530 Subject: [PATCH 46/66] ARM: dts: msm: Update the bandwidth for parrot and diwali Update the max required bandwidth as per the maximum video specification on parrot and diwali. The numbers are taken from the systems team recommendation with an additional percentage to account for worst case. Change-Id: I211be4ca6c89056e5e40057dacc778135d45766b --- diwali-vidc.dtsi | 4 ++-- parrot-vidc.dtsi | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/diwali-vidc.dtsi b/diwali-vidc.dtsi index 8ef2f4c9..1fe0c485 100644 --- a/diwali-vidc.dtsi +++ b/diwali-vidc.dtsi @@ -52,8 +52,8 @@ &gem_noc SLAVE_LLCC>; /* Bus BW range (low, high) for each bus */ qcom,bus-range-kbps = <1000 1000 - 1000 15000000 - 1000 15000000>; + 1000 10000000 + 1000 10000000>; /* MMUs */ non_secure_cb { compatible = "qcom,msm-vidc,context-bank"; diff --git a/parrot-vidc.dtsi b/parrot-vidc.dtsi index 8b381cda..4ac8b801 100644 --- a/parrot-vidc.dtsi +++ b/parrot-vidc.dtsi @@ -50,7 +50,7 @@ &mc_virt SLAVE_EBI1>; /* Bus BW range (low, high) for each bus */ qcom,bus-range-kbps = <1000 1000 - 1000 8000000>; + 1000 6000000>; /* MMUs */ non_secure_cb { From 357f4799470caac3ba5495cd5d67fef08f00fa58 Mon Sep 17 00:00:00 2001 From: Vasantha Balla Date: Fri, 29 Jul 2022 03:56:13 +0530 Subject: [PATCH 47/66] ARM: dts: msm: Add support for bengal platform Add device tree files for bengal platform. Change-Id: I4756689792cc8efb51b188584354763c8592de95 --- Kbuild | 4 ++ khaje-vidc.dts | 15 ++++++++ khaje-vidc.dtsi | 99 +++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 118 insertions(+) create mode 100644 khaje-vidc.dts create mode 100644 khaje-vidc.dtsi diff --git a/Kbuild b/Kbuild index 76492417..e5998229 100644 --- a/Kbuild +++ b/Kbuild @@ -18,6 +18,10 @@ ifeq ($(CONFIG_ARCH_NEO), y) dtbo-y += neo-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_KHAJE), y) +dtbo-y += khaje-vidc.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/khaje-vidc.dts b/khaje-vidc.dts new file mode 100644 index 00000000..dcac53af --- /dev/null +++ b/khaje-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "khaje-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Khaje SoC"; + compatible = "qcom,khaje"; + qcom,msm-id = <518 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/khaje-vidc.dtsi b/khaje-vidc.dtsi new file mode 100644 index 00000000..6de0e575 --- /dev/null +++ b/khaje-vidc.dtsi @@ -0,0 +1,99 @@ +&soc { + msm_vidc: qcom,vidc@5a00000 { + compatible = "qcom,msm-vidc","qcom,msm-vidc-khaje", "qcom,msm-vidc-ar50lt"; + status = "okay"; + reg = <0x5a00000 0x200000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + venus-supply = <&gcc_venus_gdsc>; + venus-core0-supply = <&gcc_vcodec0_gdsc>; + + /* Clocks */ + clock-names = "core_clk", "iface_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk"; + + clock-ids = ; + clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>, + <&gcc GCC_VIDEO_AHB_CLK>, + <&gcc GCC_VENUS_CTL_AXI_CLK>, + <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>, + <&gcc GCC_VCODEC0_AXI_CLK>, + <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>; + com,proxy-clock-names = "core_clk", "iface_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk"; + qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x0>; + qcom,allowed-clock-rates = <133330000 240000000 300000000 + 384000000>; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "venus"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-arm9-ddr"; + interconnects = <&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_VENUS_CFG>, + <&mmnrt_virt MASTER_VIDEO_P0 + &bimc SLAVE_EBI_CH0>, + <&mmnrt_virt MASTER_VIDEO_P0 + &bimc SLAVE_EBI_CH0>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 6500000 + 1000 1000>; + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x860 0x00>, + <&apps_smmu 0x880 0x00>; + qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + virtual-addr-pool = <0x70800000 0x6f800000>; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x804 0xE0>; + qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>; + qcom,iommu-faults = "non-fatal","stall-disable"; + qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/ + virtual-addr-pool = <0x1000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x861 0x04>; + qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>; + qcom,iommu-faults = "non-fatal","stall-disable"; + qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/ + virtual-addr-pool = <0x4b000000 0x25800000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x863 0x0>; + qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>; + qcom,iommu-faults = "non-fatal","stall-disable"; + qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/ + virtual-addr-pool = <0x25800000 0x25800000>; + qcom,secure-context-bank; + }; + }; +}; From 7b7fe64692d000310160348cb7a3f6076a4b8448 Mon Sep 17 00:00:00 2001 From: Vikash Garodia Date: Fri, 5 Aug 2022 22:58:48 +0530 Subject: [PATCH 48/66] ARM: dts: msm: differentiate spec for waipio and ukee Split the dts file for waipio and ukee, such that the compatible string can be defined explicitly for ukee. With the separate compatible string for ukee, the spec for ukee is defined. Change-Id: I9e7e5a885ddea05c204418a182f958e6826d1d60 --- Kbuild | 6 +++++- ukee-vidc.dts | 19 +++++++++++++++++++ 2 files changed, 24 insertions(+), 1 deletion(-) create mode 100644 ukee-vidc.dts diff --git a/Kbuild b/Kbuild index 7fc40e39..76492417 100644 --- a/Kbuild +++ b/Kbuild @@ -2,6 +2,10 @@ ifeq ($(CONFIG_ARCH_WAIPIO), y) dtbo-y += waipio-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_CAPE), y) +dtbo-y += ukee-vidc.dtbo +endif + ifeq ($(CONFIG_ARCH_DIWALI), y) dtbo-y += diwali-vidc.dtbo endif @@ -16,4 +20,4 @@ endif always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) -clean-files := *.dtb *.dtbo \ No newline at end of file +clean-files := *.dtb *.dtbo diff --git a/ukee-vidc.dts b/ukee-vidc.dts new file mode 100644 index 00000000..8e8c66b8 --- /dev/null +++ b/ukee-vidc.dts @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. ukee v1 SoC"; + compatible = "qcom,ukee"; + qcom,msm-id = <591 0x10000>; + qcom,board-id = <0 0>; +}; + +&msm_vidc { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-waipio", "qcom,msm-vidc-iris2", "qcom,msm-vidc-ukee"; +}; From 3f6f4fd1694421b12658c029b9b05996f47f1f9f Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Mon, 26 Sep 2022 00:10:31 +0530 Subject: [PATCH 49/66] ARM: dts: msm: Rectify reg-presets for khaje [1] Rectify reg-presets address and mask to correct value for khaje. [2] Remove unsupported "venus-arm9-ddr" interconnect. Change-Id: I81f9d3f2493e36dedc84b2b9f641104ac267490b --- khaje-vidc.dtsi | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/khaje-vidc.dtsi b/khaje-vidc.dtsi index 6de0e575..7cf1fc73 100644 --- a/khaje-vidc.dtsi +++ b/khaje-vidc.dtsi @@ -35,23 +35,20 @@ qcom,allowed-clock-rates = <133330000 240000000 300000000 384000000>; - qcom,reg-presets = <0xB0088 0x0 0x11>; + qcom,reg-presets = <0xB0080 0x0 0x03>; /* Video Firmware ELF image name */ vidc,firmware-name = "venus"; /* Bus Interconnects */ - interconnect-names = "venus-cnoc", "venus-ddr", "venus-arm9-ddr"; + interconnect-names = "venus-cnoc", "venus-ddr"; interconnects = <&bimc MASTER_AMPSS_M0 &config_noc SLAVE_VENUS_CFG>, - <&mmnrt_virt MASTER_VIDEO_P0 - &bimc SLAVE_EBI_CH0>, <&mmnrt_virt MASTER_VIDEO_P0 &bimc SLAVE_EBI_CH0>; /* Bus BW range (low, high) for each bus */ qcom,bus-range-kbps = <1000 1000 - 1000 6500000 - 1000 1000>; + 1000 6500000>; /* MMUs */ non_secure_cb { compatible = "qcom,msm-vidc,context-bank"; From 517016ef91ff9dd978ab7aa3f8f928a6e4a7e696 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Fri, 14 Oct 2022 17:29:57 +0530 Subject: [PATCH 50/66] ARM: dts: msm: Add aurora LA variant board ID Add device tree support for Neo SG IDP. Change-Id: I3502939db7dfff81cfd4c813f371ed8d4063baca --- neo-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/neo-vidc.dts b/neo-vidc.dts index 5c89765d..ea6b78f4 100644 --- a/neo-vidc.dts +++ b/neo-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. NEO v1 SoC"; compatible = "qcom,neo"; qcom,msm-id = <554 0x10000>, <579 0x10000>; - qcom,board-id = <34 1>; + qcom,board-id = <34 1>, <34 3>; }; From adc1bc2f6aadf008396c06c6052a0380b9c4c8c1 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 16 Sep 2022 09:53:43 +0530 Subject: [PATCH 51/66] ARM: dts: msm: Add support for ravelin device Add dt support for ravelin variant. Change-Id: I0f3a01f6ec7bf4ed420c515ae4687f3ff4978db2 --- Kbuild | 4 ++ ravelin-vidc.dts | 15 ++++++++ ravelin-vidc.dtsi | 98 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 117 insertions(+) create mode 100644 ravelin-vidc.dts create mode 100644 ravelin-vidc.dtsi diff --git a/Kbuild b/Kbuild index e5998229..d69de6b6 100644 --- a/Kbuild +++ b/Kbuild @@ -22,6 +22,10 @@ ifeq ($(CONFIG_ARCH_KHAJE), y) dtbo-y += khaje-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_RAVELIN), y) +dtbo-y += ravelin-vidc.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/ravelin-vidc.dts b/ravelin-vidc.dts new file mode 100644 index 00000000..7270ecb6 --- /dev/null +++ b/ravelin-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "ravelin-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SoC"; + compatible = "qcom,ravelin"; + qcom,msm-id = <568 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/ravelin-vidc.dtsi b/ravelin-vidc.dtsi new file mode 100644 index 00000000..d43fdb93 --- /dev/null +++ b/ravelin-vidc.dtsi @@ -0,0 +1,98 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-ravelin", "qcom,msm-vidc-ar50lt"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + venus-supply = <&gcc_venus_gdsc>; + venus-core0-supply = <&gcc_vcodec0_gdsc>; + + /* Clocks */ + clock-names = "core_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk", + "video_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>, + <&gcc GCC_VENUS_CTL_AXI_CLK>, + <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>, + <&gcc GCC_VCODEC0_AXI_CLK>, + <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>, + <&gcc GCC_VIDEO_VENUS_CLK_SRC>; + com,proxy-clock-names = "core_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk", + "video_clk_src"; + qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <133330000 240000000 365000000 + 384000000>; + + qcom,reg-presets = <0xB0080 0x0 0x03>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "venus_v7"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &cnoc2 SLAVE_VENUS_CFG>, + <&video_aggre_noc MASTER_VIDEO_P0 + &mc_virt SLAVE_EBI1>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 6500000>; + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x1980 0x0020>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x1984 0x0020>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x1981 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x1983 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; From d3b37c3ce9bd6be1bdb9c28bea04d6ff35661882 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Fri, 11 Nov 2022 15:10:25 +0530 Subject: [PATCH 52/66] ARM: dts: msm: Add APQ Variant SOC I'd for Ravelin Add APQ variant SOC I'D for Ravelin Change-Id: I269029581b0b5276cd251db64065005e0d4bede7 --- ravelin-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ravelin-vidc.dts b/ravelin-vidc.dts index 7270ecb6..c4eaa870 100644 --- a/ravelin-vidc.dts +++ b/ravelin-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin SoC"; compatible = "qcom,ravelin"; - qcom,msm-id = <568 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>; qcom,board-id = <0 0>; }; From d0ed43579fb8d3e40b45960bdc36cf51baf0667d Mon Sep 17 00:00:00 2001 From: Sachin Kumar Garg Date: Fri, 7 Oct 2022 13:00:25 +0530 Subject: [PATCH 53/66] ARM: dts: msm: add support for monaco platform Add device tree files for monaco platform. Change-Id: I682862d0e7ec980b604adf88fab6323c7fb1e4c0 --- Kbuild | 4 ++ monaco-vidc.dts | 16 ++++++ monaco-vidc.dtsi | 126 +++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 146 insertions(+) create mode 100644 monaco-vidc.dts create mode 100644 monaco-vidc.dtsi diff --git a/Kbuild b/Kbuild index d69de6b6..41e56db5 100644 --- a/Kbuild +++ b/Kbuild @@ -26,6 +26,10 @@ ifeq ($(CONFIG_ARCH_RAVELIN), y) dtbo-y += ravelin-vidc.dtbo endif +ifeq ($(CONFIG_ARCH_MONACO), y) +dtbo-y += monaco-vidc.dtbo +endif + always-y := $(dtb-y) $(dtbo-y) subdir-y := $(dts-dirs) clean-files := *.dtb *.dtbo diff --git a/monaco-vidc.dts b/monaco-vidc.dts new file mode 100644 index 00000000..d8af8ae6 --- /dev/null +++ b/monaco-vidc.dts @@ -0,0 +1,16 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "monaco-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. monaco SoC"; + compatible = "qcom,monaco"; + qcom,msm-id = <486 0x10000>, <517 0x10000>; + qcom,board-id = <0 0>; +}; + diff --git a/monaco-vidc.dtsi b/monaco-vidc.dtsi new file mode 100644 index 00000000..5f2ecd36 --- /dev/null +++ b/monaco-vidc.dtsi @@ -0,0 +1,126 @@ +&soc { + #address-cells = <1>; + #size-cells = <1>; + msm_vidc: qcom,vidc@5a00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-monaco", "qcom,msm-vidc-ar50lt"; + status = "okay"; + reg = <0x5a00000 0x200000>; + interrupts = ; + interrupt-parent = <&intc>; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + venus-supply = <&gcc_venus_gdsc>; + venus-core0-supply = <&gcc_vcodec0_gdsc>; + + /* Clocks */ + clock-names = "core_clk", "iface_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk"; + + clock-ids = ; + clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>, + <&gcc GCC_VIDEO_AHB_CLK>, + <&gcc GCC_VENUS_CTL_AXI_CLK>, + <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>, + <&gcc GCC_VCODEC0_AXI_CLK>, + <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>; + qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk"; + qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x0>; + qcom,allowed-clock-rates = <133330000 240000000>; + + qcom,reg-presets = <0xB0080 0x0 0x03>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "venus_v6"; + + /* Buses */ + bus_cnoc { + compatible = "qcom,msm-vidc,bus"; + label = "cnoc"; + qcom,bus-master = ; + qcom,bus-slave = ; + qcom,mode = "performance"; + qcom,bus-range-kbps = <1000 1000>; + }; + + venus_bus_ddr { + compatible = "qcom,msm-vidc,bus"; + label = "venus-ddr"; + qcom,bus-master = ; + qcom,bus-slave = ; + qcom,mode = "vidc-ar50-ddr"; + qcom,bus-range-kbps = <1000 2128000>; + }; + + arm9_bus_ddr { + compatible = "qcom,msm-vidc,bus"; + label = "venus-arm9-ddr"; + qcom,bus-master = ; + qcom,bus-slave = ; + qcom,mode = "performance"; + qcom,bus-range-kbps = <1000 1000>; + }; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = + <&apps_smmu 0x860 0x00>, + <&apps_smmu 0x880 0x00>; + qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>; + qcom,iommu-faults = "non-fatal"; + buffer-types = <0xfff>; + virtual-addr-pool = <0x70800000 0x6f800000>; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = + <&apps_smmu 0x861 0x04>; + qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/ + buffer-types = <0x241>; + virtual-addr-pool = <0x4b000000 0x25800000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = + <&apps_smmu 0x863 0x0>; + qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/ + buffer-types = <0x106>; + virtual-addr-pool = <0x25800000 0x25800000>; + qcom,secure-context-bank; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = + <&apps_smmu 0x804 0xE0>; + qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/ + buffer-types = <0x480>; + virtual-addr-pool = <0x1000000 0x24800000>; + qcom,secure-context-bank; + }; + }; +}; + From 1c97c8ef81ab15f1d586bbf2d5ce87f5a56ca05f Mon Sep 17 00:00:00 2001 From: Vasantha Balla Date: Fri, 18 Nov 2022 19:06:05 +0530 Subject: [PATCH 54/66] ARM: dts: msm: Add Soc id's for Divar variants Add soc id for Divar APQ, Gaming & IOT variants Change-Id: Id1764575bc0797160a2dad7acff8d7cd13645b78 Signed-off-by: Vasantha Balla --- khaje-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/khaje-vidc.dts b/khaje-vidc.dts index dcac53af..f254572f 100644 --- a/khaje-vidc.dts +++ b/khaje-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Khaje SoC"; compatible = "qcom,khaje"; - qcom,msm-id = <518 0x10000>; + qcom,msm-id = <518 0x10000>, <561 0x10000>, <585 0x10000>, <586 0x10000>; qcom,board-id = <0 0>; }; From 27a0513b236cb7853cc167bee0c85f38c07fba7b Mon Sep 17 00:00:00 2001 From: Sachin Kumar Garg Date: Fri, 7 Oct 2022 13:54:53 +0530 Subject: [PATCH 55/66] ARM: dts: msm: Interconnect bus handling in video Added changes for interconnect bus handling in video. Change-Id: I5c52891243b041551cc9e1cd2fb01b8143e79adb --- monaco-vidc.dtsi | 37 +++++++++---------------------------- 1 file changed, 9 insertions(+), 28 deletions(-) diff --git a/monaco-vidc.dtsi b/monaco-vidc.dtsi index 5f2ecd36..bb0d93d7 100644 --- a/monaco-vidc.dtsi +++ b/monaco-vidc.dtsi @@ -42,34 +42,16 @@ /* Video Firmware ELF image name */ vidc,firmware-name = "venus_v6"; - /* Buses */ - bus_cnoc { - compatible = "qcom,msm-vidc,bus"; - label = "cnoc"; - qcom,bus-master = ; - qcom,bus-slave = ; - qcom,mode = "performance"; - qcom,bus-range-kbps = <1000 1000>; - }; - - venus_bus_ddr { - compatible = "qcom,msm-vidc,bus"; - label = "venus-ddr"; - qcom,bus-master = ; - qcom,bus-slave = ; - qcom,mode = "vidc-ar50-ddr"; - qcom,bus-range-kbps = <1000 2128000>; - }; - - arm9_bus_ddr { - compatible = "qcom,msm-vidc,bus"; - label = "venus-arm9-ddr"; - qcom,bus-master = ; - qcom,bus-slave = ; - qcom,mode = "performance"; - qcom,bus-range-kbps = <1000 1000>; - }; + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr"; + interconnects = <&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_VENUS_CFG>, + <&mmnrt_virt MASTER_VIDEO_P0 + &bimc SLAVE_EBI_CH0>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 2128000>; /* MMUs */ non_secure_cb { compatible = "qcom,msm-vidc,context-bank"; @@ -123,4 +105,3 @@ }; }; }; - From 9a1ce5854d09b7154b44fc0c367b34431f80c4c5 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Sat, 3 Dec 2022 15:18:19 +0530 Subject: [PATCH 56/66] ARM: dts: msm: Add Ravelin 4GB DT Support Add board-id for Ravelin 4GB Support Change-Id: I9d9b53ddb709215faabf911a46f7643369cb30d0 --- ravelin-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ravelin-vidc.dts b/ravelin-vidc.dts index c4eaa870..2d496ad3 100644 --- a/ravelin-vidc.dts +++ b/ravelin-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Ravelin SoC"; compatible = "qcom,ravelin"; qcom,msm-id = <568 0x10000>, <602 0x10000>; - qcom,board-id = <0 0>; + qcom,board-id = <0 0>, <0 0x600>, <0 0x601>; }; From e73f7abb4e291e7d03738d878b7ed5f10754c32e Mon Sep 17 00:00:00 2001 From: Srinu Gorle Date: Fri, 2 Dec 2022 16:05:17 +0530 Subject: [PATCH 57/66] ARM: dts: msm: Add IOT Variant SOC I'd for Ravelin Add IOT variant SOC I'D for Ravelin Change-Id: Ie1fc5bc45dbb68af7b6ff2e14bf33c98ebe37292 --- ravelin-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ravelin-vidc.dts b/ravelin-vidc.dts index 2d496ad3..e168afaa 100644 --- a/ravelin-vidc.dts +++ b/ravelin-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin SoC"; compatible = "qcom,ravelin"; - qcom,msm-id = <568 0x10000>, <602 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>; qcom,board-id = <0 0>, <0 0x600>, <0 0x601>; }; From ed1e51bbcd3c6028a80dbfdb571587b220071ae9 Mon Sep 17 00:00:00 2001 From: Ankush Mitra Date: Tue, 10 Jan 2023 11:22:41 +0530 Subject: [PATCH 58/66] ARM: dts: qcom: Add Parrot 7 and parrotp soc id support Add Parrot 7 and parrotp soc id support in device tree. Change-Id: Ie082c9e09fa74798bccadf11c7c6c625586fc58a --- parrot-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parrot-vidc.dts b/parrot-vidc.dts index e91095a2..d98aa8df 100644 --- a/parrot-vidc.dts +++ b/parrot-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Parrot"; compatible = "qcom,parrot"; - qcom,msm-id = <537 0x10000>; + qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>; qcom,board-id = <0 0>, <0 0x600>; }; From bf61e7802ea6ab955bfa9eb6d6c4ae7335416242 Mon Sep 17 00:00:00 2001 From: Vedang Nagar Date: Mon, 23 Jan 2023 10:40:02 +0530 Subject: [PATCH 59/66] ARM: dts: msm: Add resets for ravelin target Add video-axi resets for Ravelin target. Change-Id: Ie27d3fc9bab45cd79ee9af6d995f469cd58aeafa --- ravelin-vidc.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/ravelin-vidc.dtsi b/ravelin-vidc.dtsi index d43fdb93..2b1e058b 100644 --- a/ravelin-vidc.dtsi +++ b/ravelin-vidc.dtsi @@ -36,6 +36,9 @@ qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x1>; qcom,allowed-clock-rates = <133330000 240000000 365000000 384000000>; + resets = <&gcc GCC_VENUS_CTL_AXI_CLK_ARES>, + <&gcc GCC_VIDEO_VENUS_CTL_CLK_ARES>; + reset-names = "video_axi_reset", "video_core_reset"; qcom,reg-presets = <0xB0080 0x0 0x03>; From 227a7ca12294442665c0867ab084aa5d8684e7ee Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Fri, 28 Apr 2023 17:08:28 +0530 Subject: [PATCH 60/66] ARM: dts: msm: Add soc ID for neo Added new soc ID of neo device. Change-Id: Ieb130db44b1e895514e418605383f08c9fc3c5b7 --- neo-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/neo-vidc.dts b/neo-vidc.dts index ea6b78f4..c33e832b 100644 --- a/neo-vidc.dts +++ b/neo-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. NEO v1 SoC"; compatible = "qcom,neo"; qcom,msm-id = <554 0x10000>, <579 0x10000>; - qcom,board-id = <34 1>, <34 3>; + qcom,board-id = <34 1>, <34 3>, <34 2>; }; From 399a06ed7f3bf73173f5f07b71514098d6d810a3 Mon Sep 17 00:00:00 2001 From: Gaviraju Doddabettahalli Bettegowda Date: Thu, 11 May 2023 19:16:19 +0530 Subject: [PATCH 61/66] ARM: dts: msm: Add board ID for neo v2 Added new board ID for neo v2. Change-Id: I6e89ac221c25efec384b3a92e82ac2f5d54fa242 --- neo-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/neo-vidc.dts b/neo-vidc.dts index c33e832b..98fc72a3 100644 --- a/neo-vidc.dts +++ b/neo-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. NEO v1 SoC"; compatible = "qcom,neo"; qcom,msm-id = <554 0x10000>, <579 0x10000>; - qcom,board-id = <34 1>, <34 3>, <34 2>; + qcom,board-id = <34 1>, <34 3>, <34 2>, <34 5>; }; From 20442218526a74b3e03d68cf32b2e61f1248e67a Mon Sep 17 00:00:00 2001 From: Sayantan Majumder Date: Wed, 26 Apr 2023 16:16:21 +0530 Subject: [PATCH 62/66] ARM: dts: msm: Addition of SOC ID for Divar IOT Addition of separate soc-id and Divar IOT compatible string. Change-Id: Ic520bd22079f63f047ac499ff503caeebef0efcd --- Kbuild | 1 + khaje-vidc-iot.dts | 15 +++++++++++++++ khaje-vidc-iot.dtsi | 9 +++++++++ 3 files changed, 25 insertions(+) create mode 100644 khaje-vidc-iot.dts create mode 100644 khaje-vidc-iot.dtsi diff --git a/Kbuild b/Kbuild index 41e56db5..727eb597 100644 --- a/Kbuild +++ b/Kbuild @@ -20,6 +20,7 @@ endif ifeq ($(CONFIG_ARCH_KHAJE), y) dtbo-y += khaje-vidc.dtbo +dtbo-y += khaje-vidc-iot.dtbo endif ifeq ($(CONFIG_ARCH_RAVELIN), y) diff --git a/khaje-vidc-iot.dts b/khaje-vidc-iot.dts new file mode 100644 index 00000000..5363ad16 --- /dev/null +++ b/khaje-vidc-iot.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "khaje-vidc-iot.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Khaje IOT SoC"; + compatible = "qcom,khaje"; + qcom,msm-id = <586 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/khaje-vidc-iot.dtsi b/khaje-vidc-iot.dtsi new file mode 100644 index 00000000..e8cda5d1 --- /dev/null +++ b/khaje-vidc-iot.dtsi @@ -0,0 +1,9 @@ +#include "khaje-vidc.dtsi" + +/* Khaje IOT-specific changes */ +&msm_vidc { + + compatible = "qcom,msm-vidc", "qcom,msm-vidc-khaje-iot", "qcom,msm-vidc-ar50lt"; + vidc,firmware-name = "venus_4mb"; + +}; From 8b45a94cfdea35e24f6e214c56b233204b3b0944 Mon Sep 17 00:00:00 2001 From: Sayantan Majumder Date: Thu, 28 Sep 2023 16:48:18 +0530 Subject: [PATCH 63/66] ARM: dts: msm: Addition of board ID for Divar IOT Addition of new board-id for Divar IOT. Change-Id: I7ea4cba3bcff63a0410ba47ff22e526431b0af6c --- khaje-vidc-iot.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/khaje-vidc-iot.dts b/khaje-vidc-iot.dts index 5363ad16..f690a244 100644 --- a/khaje-vidc-iot.dts +++ b/khaje-vidc-iot.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Khaje IOT SoC"; compatible = "qcom,khaje"; qcom,msm-id = <586 0x10000>; - qcom,board-id = <0 0>; + qcom,board-id = <0 0>, <0 0x500>; }; From 1f126b01f20ccfbf6867d6df59937892e6de979d Mon Sep 17 00:00:00 2001 From: Govindaraj Rajagopal Date: Fri, 15 Sep 2023 14:18:08 +0530 Subject: [PATCH 64/66] ARM: dts: qcom: Add comanche devicetree support for video Added comanche soc support for video. Change-Id: Iaee3232793bd5aef7eee53224031e269ba38cf91 --- ravelin-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/ravelin-vidc.dts b/ravelin-vidc.dts index e168afaa..4332bf0f 100644 --- a/ravelin-vidc.dts +++ b/ravelin-vidc.dts @@ -11,5 +11,5 @@ model = "Qualcomm Technologies, Inc. Ravelin SoC"; compatible = "qcom,ravelin"; qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>; - qcom,board-id = <0 0>, <0 0x600>, <0 0x601>; + qcom,board-id = <0 0>, <0 0x600>, <0 0x601>, <0x10022 0x0>; }; From 25fd3f77609d3c589463d40d1f9ae9a0068d03f5 Mon Sep 17 00:00:00 2001 From: Madhukumar S J Date: Tue, 10 Oct 2023 15:57:39 +0530 Subject: [PATCH 65/66] ARM: dts: qcom: Add Parrot soc id for cultivate and gaming variants Change-Id: I74853d0214586865501e8e21b7296f41173d3815 --- parrot-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parrot-vidc.dts b/parrot-vidc.dts index d98aa8df..cf0ecc69 100644 --- a/parrot-vidc.dts +++ b/parrot-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Parrot"; compatible = "qcom,parrot"; - qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>; + qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>; qcom,board-id = <0 0>, <0 0x600>; }; From 11778e7b09c43179de8d7811affe7a915f2a108e Mon Sep 17 00:00:00 2001 From: Madhukumar S J Date: Tue, 10 Oct 2023 15:57:39 +0530 Subject: [PATCH 66/66] ARM: dts: qcom: Add Parrot soc id for cultivate and gaming variants Add support for new cultivate and gaming SKU soc id for parrot Change-Id: I74853d0214586865501e8e21b7296f41173d3815 --- parrot-vidc.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/parrot-vidc.dts b/parrot-vidc.dts index d98aa8df..cf0ecc69 100644 --- a/parrot-vidc.dts +++ b/parrot-vidc.dts @@ -10,6 +10,6 @@ / { model = "Qualcomm Technologies, Inc. Parrot"; compatible = "qcom,parrot"; - qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>; + qcom,msm-id = <537 0x10000>, <583 0x10000>, <613 0x10000>, <631 0x10000>, <633 0x10000>, <634 0x10000>, <638 0x10000>; qcom,board-id = <0 0>, <0 0x600>; };