diff --git a/qcom/video/Kbuild b/qcom/video/Kbuild new file mode 100644 index 00000000..e5998229 --- /dev/null +++ b/qcom/video/Kbuild @@ -0,0 +1,27 @@ +ifeq ($(CONFIG_ARCH_WAIPIO), y) +dtbo-y += waipio-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_CAPE), y) +dtbo-y += ukee-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_DIWALI), y) +dtbo-y += diwali-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_PARROT), y) +dtbo-y += parrot-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_NEO), y) +dtbo-y += neo-vidc.dtbo +endif + +ifeq ($(CONFIG_ARCH_KHAJE), y) +dtbo-y += khaje-vidc.dtbo +endif + +always-y := $(dtb-y) $(dtbo-y) +subdir-y := $(dts-dirs) +clean-files := *.dtb *.dtbo diff --git a/qcom/video/Makefile b/qcom/video/Makefile new file mode 100644 index 00000000..b1e0dfe9 --- /dev/null +++ b/qcom/video/Makefile @@ -0,0 +1,9 @@ +KBUILD_OPTIONS+=KBUILD_EXTMOD_DTS=. + +all: dtbs + +clean: + $(MAKE) -C $(KERNEL_SRC) M=$(M) clean + +%: + $(MAKE) -C $(KERNEL_SRC) M=$(M) $@ $(KBUILD_OPTIONS) diff --git a/qcom/video/diwali-vidc.dts b/qcom/video/diwali-vidc.dts new file mode 100644 index 00000000..2791b81f --- /dev/null +++ b/qcom/video/diwali-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "diwali-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Diwali SoC"; + compatible = "qcom,diwali"; + qcom,msm-id = <506 0x10000> , <547 0x10000>, <564 0x10000>; + qcom,board-id = <0 0>, <0 2>; +}; diff --git a/qcom/video/diwali-vidc.dtsi b/qcom/video/diwali-vidc.dtsi new file mode 100644 index 00000000..1fe0c485 --- /dev/null +++ b/qcom/video/diwali-vidc.dtsi @@ -0,0 +1,111 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-diwali", "qcom,msm-vidc-iris2"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "video_ctl_axi0_clk", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "video_ctl_axi0_clk", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <240000000 338000000 + 366000000 444000000>; + resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>; + reset-names = "video_axi_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_P0 + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 10000000 + 1000 10000000>; + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2180 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2184 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; diff --git a/qcom/video/khaje-vidc.dts b/qcom/video/khaje-vidc.dts new file mode 100644 index 00000000..dcac53af --- /dev/null +++ b/qcom/video/khaje-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "khaje-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Khaje SoC"; + compatible = "qcom,khaje"; + qcom,msm-id = <518 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/qcom/video/khaje-vidc.dtsi b/qcom/video/khaje-vidc.dtsi new file mode 100644 index 00000000..7cf1fc73 --- /dev/null +++ b/qcom/video/khaje-vidc.dtsi @@ -0,0 +1,96 @@ +&soc { + msm_vidc: qcom,vidc@5a00000 { + compatible = "qcom,msm-vidc","qcom,msm-vidc-khaje", "qcom,msm-vidc-ar50lt"; + status = "okay"; + reg = <0x5a00000 0x200000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + venus-supply = <&gcc_venus_gdsc>; + venus-core0-supply = <&gcc_vcodec0_gdsc>; + + /* Clocks */ + clock-names = "core_clk", "iface_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk"; + + clock-ids = ; + clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>, + <&gcc GCC_VIDEO_AHB_CLK>, + <&gcc GCC_VENUS_CTL_AXI_CLK>, + <&gcc GCC_VIDEO_VCODEC0_SYS_CLK>, + <&gcc GCC_VCODEC0_AXI_CLK>, + <&gcc GCC_VIDEO_THROTTLE_CORE_CLK>; + com,proxy-clock-names = "core_clk", "iface_clk", "bus_clk", + "core0_clk", "core0_bus_clk", "throttle_clk"; + qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x0>; + qcom,allowed-clock-rates = <133330000 240000000 300000000 + 384000000>; + + qcom,reg-presets = <0xB0080 0x0 0x03>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "venus"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr"; + interconnects = <&bimc MASTER_AMPSS_M0 + &config_noc SLAVE_VENUS_CFG>, + <&mmnrt_virt MASTER_VIDEO_P0 + &bimc SLAVE_EBI_CH0>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 6500000>; + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x860 0x00>, + <&apps_smmu 0x880 0x00>; + qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>; + qcom,iommu-faults = "non-fatal", "stall-disable"; + virtual-addr-pool = <0x70800000 0x6f800000>; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x804 0xE0>; + qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>; + qcom,iommu-faults = "non-fatal","stall-disable"; + qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/ + virtual-addr-pool = <0x1000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x861 0x04>; + qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>; + qcom,iommu-faults = "non-fatal","stall-disable"; + qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/ + virtual-addr-pool = <0x4b000000 0x25800000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x863 0x0>; + qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>; + qcom,iommu-faults = "non-fatal","stall-disable"; + qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/ + virtual-addr-pool = <0x25800000 0x25800000>; + qcom,secure-context-bank; + }; + }; +}; diff --git a/qcom/video/neo-vidc.dts b/qcom/video/neo-vidc.dts new file mode 100644 index 00000000..ea6b78f4 --- /dev/null +++ b/qcom/video/neo-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "neo-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. NEO v1 SoC"; + compatible = "qcom,neo"; + qcom,msm-id = <554 0x10000>, <579 0x10000>; + qcom,board-id = <34 1>, <34 3>; +}; diff --git a/qcom/video/neo-vidc.dtsi b/qcom/video/neo-vidc.dtsi new file mode 100644 index 00000000..4bd5f27d --- /dev/null +++ b/qcom/video/neo-vidc.dtsi @@ -0,0 +1,116 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-neo", "qcom,msm-vidc-iris3"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "video_ctl_axi0_clk", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&gcc GCC_VIDEO_AXI0_CLK>, + <&videocc VIDEO_CC_MVS0C_CLK>, + <&videocc VIDEO_CC_MVS0_CLK>, + <&videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "video_ctl_axi0_clk", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <239999999 338000000>; + resets = <&videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "video_core_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 8000000 + 1000 8000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2980 0x0000>,<&apps_smmu 0x29C0 0x0000>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2987 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2984 0x0000>,<&apps_smmu 0x29C4 0x0000>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2981 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2983 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; diff --git a/qcom/video/parrot-vidc.dts b/qcom/video/parrot-vidc.dts new file mode 100644 index 00000000..e91095a2 --- /dev/null +++ b/qcom/video/parrot-vidc.dts @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "parrot-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Parrot"; + compatible = "qcom,parrot"; + qcom,msm-id = <537 0x10000>; + qcom,board-id = <0 0>, <0 0x600>; +}; diff --git a/qcom/video/parrot-vidc.dtsi b/qcom/video/parrot-vidc.dtsi new file mode 100644 index 00000000..4ac8b801 --- /dev/null +++ b/qcom/video/parrot-vidc.dtsi @@ -0,0 +1,109 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-parrot", "qcom,msm-vidc-iris2"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvsc_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "video_ctl_axi0_clk", + "video_mvs0_axi_clk", "core_clk", + "vcodec_clk", "iface_clk", "video_cc_iris_clk_src"; + clock-ids = ; + clocks = <&videocc VIDEO_CC_MVSC_CTL_AXI_CLK>, + <&videocc VIDEO_CC_MVS0_AXI_CLK>, + <&videocc VIDEO_CC_MVSC_CORE_CLK>, + <&videocc VIDEO_CC_MVS0_CORE_CLK>, + <&videocc VIDEO_CC_VENUS_AHB_CLK>, + <&videocc VIDEO_CC_IRIS_CLK_SRC>; + qcom,proxy-clock-names = "video_ctl_axi0_clk", + "video_mvs0_axi_clk", "core_clk", + "vcodec_clk", "iface_clk", "video_cc_iris_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <133333333 240000000 + 335000000 424000000 460000000>; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_1v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &cnoc2 SLAVE_VENUS_CFG>, + <&mmss_noc MASTER_VIDEO_P0 + &mc_virt SLAVE_EBI1>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 6000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2180 0x0020>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0000>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2184 0x0020>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0004>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0000>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +}; diff --git a/qcom/video/ukee-vidc.dts b/qcom/video/ukee-vidc.dts new file mode 100644 index 00000000..8e8c66b8 --- /dev/null +++ b/qcom/video/ukee-vidc.dts @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. ukee v1 SoC"; + compatible = "qcom,ukee"; + qcom,msm-id = <591 0x10000>; + qcom,board-id = <0 0>; +}; + +&msm_vidc { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-waipio", "qcom,msm-vidc-iris2", "qcom,msm-vidc-ukee"; +}; diff --git a/qcom/video/waipio-vidc.dts b/qcom/video/waipio-vidc.dts new file mode 100644 index 00000000..21417ae4 --- /dev/null +++ b/qcom/video/waipio-vidc.dts @@ -0,0 +1,19 @@ +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include "waipio-vidc.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. waipio/cape/ukee v1 SoC"; + compatible = "qcom,waipio", "qcom,cape", "qcom,ukee"; + qcom,msm-id = <457 0x10000>, <482 0x10000>, + <457 0x20000>, <482 0x20000>, + <530 0x10000>, <531 0x10000>, + <540 0x10000>, <552 0x10000>, + <591 0x10000>; + qcom,board-id = <0 0>; +}; diff --git a/qcom/video/waipio-vidc.dtsi b/qcom/video/waipio-vidc.dtsi new file mode 100644 index 00000000..7efca994 --- /dev/null +++ b/qcom/video/waipio-vidc.dtsi @@ -0,0 +1,118 @@ +&soc { + msm_vidc: qcom,vidc@aa00000 { + compatible = "qcom,msm-vidc", "qcom,msm-vidc-waipio", "qcom,msm-vidc-iris2"; + status = "okay"; + reg = <0x0aa00000 0xF0000>; + interrupts = ; + + memory-region = <&video_mem>; + pas-id = <9>; + + /* IOMMU Config */ + #address-cells = <1>; + #size-cells = <1>; + + /* LLCC Cache */ + cache-slice-names = "vidsc0"; + + /* Supply */ + iris-ctl-supply = <&video_cc_mvs0c_gdsc>; + vcodec-supply = <&video_cc_mvs0_gdsc>; + + /* Clocks */ + clock-names = "video_ctl_axi0_clk", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + clock-ids = ; + clocks = <&clock_gcc GCC_VIDEO_AXI0_CLK>, + <&clock_videocc VIDEO_CC_MVS0C_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK>, + <&clock_videocc VIDEO_CC_MVS0_CLK_SRC>; + qcom,proxy-clock-names = "video_ctl_axi0_clk", + "core_clk", "vcodec_clk", "video_cc_mvs0_clk_src"; + /* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/ + qcom,clock-configs = <0x0 0x0 0x0 0x1>; + qcom,allowed-clock-rates = <239999999 338000000 + 366000000 444000000>; + resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>, + <&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>; + reset-names = "video_axi_reset", "video_core_reset"; + + qcom,reg-presets = <0xB0088 0x0 0x11>; + + /* Video Firmware ELF image name */ + vidc,firmware-name = "vpu20_4v"; + + /* Bus Interconnects */ + interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc"; + interconnects = <&gem_noc MASTER_APPSS_PROC + &config_noc SLAVE_VENUS_CFG>, + <&mc_virt MASTER_LLCC + &mc_virt SLAVE_EBI1>, + <&mmss_noc MASTER_VIDEO_P0 + &gem_noc SLAVE_LLCC>; + /* Bus BW range (low, high) for each bus */ + qcom,bus-range-kbps = <1000 1000 + 1000 15000000 + 1000 15000000>; + + /* MMUs */ + non_secure_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns"; + iommus = <&apps_smmu 0x2180 0x0400>; + qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x25800000 0xba800000>; + dma-coherent; + }; + + non_secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_ns_pixel"; + iommus = <&apps_smmu 0x2187 0x0400>; + qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + virtual-addr-pool = <0x00100000 0xdff00000>; + dma-coherent; + }; + + secure_non_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_non_pixel"; + iommus = <&apps_smmu 0x2184 0x0400>; + qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */ + virtual-addr-pool = <0x01000000 0x24800000>; + qcom,secure-context-bank; + }; + + secure_bitstream_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_bitstream"; + iommus = <&apps_smmu 0x2181 0x0404>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + + secure_pixel_cb { + compatible = "qcom,msm-vidc,context-bank"; + label = "venus_sec_pixel"; + iommus = <&apps_smmu 0x2183 0x0400>; + qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>; + qcom,iommu-faults = "non-fatal"; + qcom,iommu-pagetable = "LLC"; + qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */ + virtual-addr-pool = <0x00500000 0xdfb00000>; + qcom,secure-context-bank; + }; + }; +};