From 96f93da19493f90c117ce31293d65e3001834a0a Mon Sep 17 00:00:00 2001
From: Kalpak Kawadkar <kkawadka@qti.qualcomm.com>
Date: Wed, 22 Sep 2021 10:09:14 +0530
Subject: [PATCH] ARM: dts: msm: Add support for dummy clocks/GDSC for Parrot

Add the clock & GDSCs handles for clients to be able to request on
them for Parrot.

Change-Id: If74a1f48555290d6efe514963ba8a021f11fec9c
---
 qcom/diwali-gdsc.dtsi |  16 ++++
 qcom/parrot.dtsi      | 197 ++++++++++++++++++++++++++++++++++++++++++
 2 files changed, 213 insertions(+)

diff --git a/qcom/diwali-gdsc.dtsi b/qcom/diwali-gdsc.dtsi
index 4532b606..32682ca4 100644
--- a/qcom/diwali-gdsc.dtsi
+++ b/qcom/diwali-gdsc.dtsi
@@ -50,6 +50,14 @@
 		status = "disabled";
 	};
 
+	cam_cc_camss_top_gdsc: qcom,gdsc@adf4004 {
+		compatible = "qcom,gdsc";
+		reg = <0xadf4004 0x4>;
+		regulator-name = "cam_cc_camss_top_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
+
 	/* DISP_CC GDSCs */
 	disp_cc_mdss_core_gdsc: qcom,gdsc@af09000 {
 		compatible = "qcom,gdsc";
@@ -295,4 +303,12 @@
 		qcom,retain-regs;
 		status = "disabled";
 	};
+
+	video_cc_mvsc_gdsc: qcom,gdsc@aaf5004 {
+		compatible = "qcom,gdsc";
+		reg = <0xaaf5004 0x4>;
+		regulator-name = "video_cc_mvsc_gdsc";
+		qcom,retain-regs;
+		status = "disabled";
+	};
 };
diff --git a/qcom/parrot.dtsi b/qcom/parrot.dtsi
index 10b3f4b6..0ad069a1 100644
--- a/qcom/parrot.dtsi
+++ b/qcom/parrot.dtsi
@@ -1,5 +1,11 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/soc/qcom,ipcc.h>
+#include <dt-bindings/clock/qcom,rpmh.h>
+#include <dt-bindings/clock/qcom,camcc-parrot.h>
+#include <dt-bindings/clock/qcom,dispcc-parrot.h>
+#include <dt-bindings/clock/qcom,gcc-parrot.h>
+#include <dt-bindings/clock/qcom,gpucc-parrot.h>
+#include <dt-bindings/clock/qcom,videocc-parrot.h>
 
 / {
 	model = "Qualcomm Technologies, Inc. Parrot";
@@ -282,6 +288,197 @@
 		#interrupt-cells = <3>;
 		#mbox-cells = <2>;
 	};
+
+	clocks {
+		xo_board: xo-board {
+			compatible = "fixed-clock";
+			clock-frequency = <38400000>;
+			clock-output-names = "xo_board";
+			#clock-cells = <0>;
+		};
+
+		sleep_clk: sleep-clk {
+			compatible = "fixed-clock";
+			clock-frequency = <32000>;
+			clock-output-names = "sleep_clk";
+			#clock-cells = <0>;
+		};
+
+		pcie_0_pipe_clk: pcie_0_pipe_clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1000>;
+			clock-output-names = "pcie_0_pipe_clk";
+			#clock-cells = <0>;
+		};
+
+		ufs_phy_rx_symbol_0_clk: ufs_phy_rx_symbol_0_clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1000>;
+			clock-output-names = "ufs_phy_rx_symbol_0_clk";
+			#clock-cells = <0>;
+		};
+
+		ufs_phy_rx_symbol_1_clk: ufs_phy_rx_symbol_1_clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1000>;
+			clock-output-names = "ufs_phy_rx_symbol_1_clk";
+			#clock-cells = <0>;
+		};
+
+		ufs_phy_tx_symbol_0_clk: ufs_phy_tx_symbol_0_clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1000>;
+			clock-output-names = "ufs_phy_tx_symbol_0_clk";
+			#clock-cells = <0>;
+		};
+
+		usb3_phy_wrapper_gcc_usb30_pipe_clk: usb3_phy_wrapper_gcc_usb30_pipe_clk {
+			compatible = "fixed-clock";
+			clock-frequency = <1000>;
+			clock-output-names = "usb3_phy_wrapper_gcc_usb30_pipe_clk";
+			#clock-cells = <0>;
+		};
+	};
+
+	bi_tcxo: bi_tcxo {
+		compatible = "fixed-factor-clock";
+		clock-mult = <1>;
+		clock-div = <2>;
+		clocks = <&xo_board>;
+		#clock-cells = <0>;
+	};
+
+	bi_tcxo_ao: bi_tcxo_ao {
+		compatible = "fixed-factor-clock";
+		clock-mult = <1>;
+		clock-div = <2>;
+		clocks = <&xo_board>;
+		#clock-cells = <0>;
+	};
+
+	rpmhcc: qcom,rpmhcc {
+		compatible = "qcom,dummycc";
+		clock-output-names = "rpmhcc_clocks";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	gcc: clock-controller@100000 {
+		compatible = "qcom,dummycc";
+		clock-output-names = "gcc_clocks";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	camcc: clock-controller@ade0000 {
+		compatible = "qcom,dummycc";
+		clock-output-names = "camcc_clocks";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	dispcc: clock-controller@af00000 {
+		compatible = "qcom,dummycc";
+		clock-output-names = "dispcc_clocks";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	gpucc: clock-controller@3d90000 {
+		compatible = "qcom,dummycc";
+		clock-output-names = "gpucc_clocks";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	videocc: clock-controller@1002000 {
+		compatible = "qcom,dummycc";
+		clock-output-names = "videocc_clocks";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+};
+
+#include "diwali-gdsc.dtsi"
+
+&gcc_pcie_0_gdsc {
+	compatible = "regulator-fixed";
+	/delete-property/ qcom,support-hw-trigger;
+	status = "ok";
+};
+
+&gcc_ufs_phy_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&gcc_usb30_prim_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&hlos1_vote_turing_mmu_tbu1_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&hlos1_vote_turing_mmu_tbu0_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&cam_cc_camss_top_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&disp_cc_mdss_core_gdsc {
+	compatible = "regulator-fixed";
+	/delete-property/ qcom,support-hw-trigger;
+	status = "ok";
+};
+
+&disp_cc_mdss_core_int2_gdsc {
+	compatible = "regulator-fixed";
+	/delete-property/ qcom,support-hw-trigger;
+	status = "ok";
+};
+
+&gpu_cc_cx_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&gpu_cc_gx_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
+};
+
+&video_cc_mvs0_gdsc {
+	compatible = "regulator-fixed";
+	reg = <0xaaf6004 0x4>;
+	status = "ok";
+	/delete-property/ qcom,support-hw-trigger;
+};
+
+&video_cc_mvsc_gdsc {
+	compatible = "regulator-fixed";
+	status = "ok";
 };
 
 #include "parrot-pinctrl.dtsi"