From 9ac2a5d80bc0a19073cd024b258fb04766370b14 Mon Sep 17 00:00:00 2001 From: Can Guo Date: Wed, 9 Oct 2019 21:03:32 -0700 Subject: [PATCH] ARM: dts: msm: add reset control support for UFS PHY on Lahaina Add reset control nodes for UFS PHY so that UFS PHY driver can control its SW reset through UFS host's address space. Change-Id: I8ef347733d611af7dfb1a9ecce10f8a5b5898e9b --- qcom/lahaina.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index 10047b76..5194a068 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -960,6 +960,9 @@ "ref_aux_clk"; clocks = <&clock_rpmh RPMH_CXO_CLK>, <&clock_gcc GCC_UFS_PHY_PHY_AUX_CLK>; + + resets = <&ufshc_mem 0>; + status = "disabled"; }; @@ -969,6 +972,7 @@ interrupts = ; phys = <&ufsphy_mem>; phy-names = "ufsphy"; + #reset-cells = <1>; lanes-per-direction = <2>; dev-ref-clk-freq = <0>; /* 19.2 MHz */