From 4c323866e292570c4dd006d2178cc33318848434 Mon Sep 17 00:00:00 2001 From: Faiyaz Mohammed Date: Fri, 8 Oct 2021 15:45:36 +0530 Subject: [PATCH] ARM: dts: msm: add initial memory map for cape Add initial memory map for cape, inline with v1. Change-Id: I3230c1fc7c1ba4a9b18bc6e17eb4af8c5a03fe75 --- qcom/cape-reserved-memory.dtsi | 193 +++++++++++++++++++++++++++++++++ qcom/cape.dtsi | 18 +++ 2 files changed, 211 insertions(+) create mode 100644 qcom/cape-reserved-memory.dtsi diff --git a/qcom/cape-reserved-memory.dtsi b/qcom/cape-reserved-memory.dtsi new file mode 100644 index 00000000..ed4eb6cb --- /dev/null +++ b/qcom/cape-reserved-memory.dtsi @@ -0,0 +1,193 @@ +&reserved_memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + hyp_mem: hyp_region@80000000 { + no-map; + reg = <0x0 0x80000000 0x0 0x600000>; + }; + + xbl_dtlog_mem: xbl_dtlog_region@80600000 { + no-map; + reg = <0x0 0x80600000 0x0 0x40000>; + }; + + xbl_ramdump_mem: xbl_ramdump_region@80640000 { + no-map; + reg = <0x0 0x80640000 0x0 0x1c0000>; + }; + + aop_image_mem: aop_image_region@80800000 { + no-map; + reg = <0x0 0x80800000 0x0 0x60000>; + }; + + aop_cmd_db_mem: aop_cmd_db_region@80860000 { + compatible = "qcom,cmd-db"; + no-map; + reg = <0x0 0x80860000 0x0 0x20000>; + }; + + aop_config_mem: aop_config_region@80880000 { + no-map; + reg = <0x0 0x80880000 0x0 0x20000>; + }; + + tme_crash_dump_mem: tme_crash_dump_region@808a0000 { + no-map; + reg = <0x0 0x808a0000 0x0 0x40000>; + }; + + tme_log_mem: tme_log_region@808e0000 { + no-map; + reg = <0x0 0x808e0000 0x0 0x4000>; + }; + + uefi_log_mem: uefi_log_region@808e4000 { + no-map; + reg = <0x0 0x808e4000 0x0 0x10000>; + }; + + /* secdata region can be reused by apps */ + + smem_mem: smem_region@80900000 { + no-map; + reg = <0x0 0x80900000 0x0 0x200000>; + }; + + cpucp_fw_mem: cpucp_fw_region@80b00000 { + no-map; + reg = <0x0 0x80b00000 0x0 0x100000>; + }; + + cdsp_secure_heap_mem: cdsp_secure_heap_region@80c00000 { + no-map; + reg = <0x0 0x80c00000 0x0 0x4600000>; + }; + + video_mem: video_region@85700000 { + no-map; + reg = <0x0 0x85700000 0x0 0x700000>; + }; + + adsp_mem: adsp_region@85e00000 { + no-map; + reg = <0x0 0x85e00000 0x0 0x2100000>; + }; + + slpi_mem: slpi_region@88000000 { + no-map; + reg = <0x0 0x88000000 0x0 0x1900000>; + }; + + cdsp_mem: cdsp_region@89900000 { + no-map; + reg = <0x0 0x89900000 0x0 0x2000000>; + }; + + ipa_fw_mem: ipa_fw_region@8b900000 { + no-map; + reg = <0x0 0x8b900000 0x0 0x10000>; + }; + + ipa_gsi_mem: ipa_gsi_region@8b910000 { + no-map; + reg = <0x0 0x8b910000 0x0 0xa000>; + }; + + gpu_microcode_mem: gpu_microcode_region@8b91a000 { + no-map; + reg = <0x0 0x8b91a000 0x0 0x2000>; + }; + + spss_region_mem: spss_region_region@8ba00000 { + no-map; + reg = <0x0 0x8ba00000 0x0 0x180000>; + }; + + /* First part of the "SPU secure shared memory" region */ + spu_tz_shared_mem: spu_tz_shared_mem@8bb80000 { + no-map; + reg = <0x0 0x8bb80000 0x0 0x60000>; + }; + + /* Second part of the "SPU secure shared memory" region */ + spu_modem_shared_mem: spu_modem_shared_mem@8bbe0000 { + no-map; + reg = <0x0 0x8bbe0000 0x0 0x20000>; + }; + + mpss_mem: mpss_region@8bc00000 { + no-map; + reg = <0x0 0x8bc00000 0x0 0x13200000>; + }; + + cvp_mem: cvp_region@9ee00000 { + no-map; + reg = <0x0 0x9ee00000 0x0 0x700000>; + }; + + camera_mem: camera_region@9f500000 { + no-map; + reg = <0x0 0x9f500000 0x0 0x800000>; + }; + + xbl_sc_mem: xbl_sc_region@a6e00000 { + no-map; + reg = <0x0 0xa6e00000 0x0 0x40000>; + }; + + global_sync_mem: global_sync_region@a6f00000 { + no-map; + reg = <0x0 0xa6f00000 0x0 0x100000>; + }; + + /* uefi region can be reused by apps */ + + qheebsp_reserved_mem: qheebsp_reserved_region@e0000000 { + no-map; + reg = <0x0 0xe0000000 0x0 0x600000>; + }; + + cpusys_vm_mem: cpusys_vm_region@e0600000 { + no-map; + reg = <0x0 0xe0600000 0x0 0x400000>; + }; + + hyp_reserved_mem: hyp_reserved_region@e0a00000 { + no-map; + reg = <0x0 0xe0a00000 0x0 0x100000>; + }; + + trust_ui_vm_mem: trust_ui_vm_region@e0b00000 { + no-map; + reg = <0x0 0xe0b00000 0x0 0x4c00000>; + }; + + tz_stat_mem: tz_stat_region@e8800000 { + no-map; + reg = <0x0 0xe8800000 0x0 0x100000>; + }; + + tags_mem: tags_region@e8900000 { + no-map; + reg = <0x0 0xe8900000 0x0 0x1200000>; + }; + + qtee_mem: qtee_region@e9b00000 { + no-map; + reg = <0x0 0xe9b00000 0x0 0x500000>; + }; + + trusted_apps_mem: trusted_apps_region@ea000000 { + no-map; + reg = <0x0 0xea000000 0x0 0x3900000>; + }; + + trusted_apps_ext_mem: trusted_apps_ext_region@ed900000 { + no-map; + reg = <0x0 0xed900000 0x0 0x3b00000>; + }; + +}; diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index 7603bd03..227b3411 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -245,6 +245,24 @@ }; }; +#include "cape-reserved-memory.dtsi" + +&reserved_memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* global autoconfigured region for contiguous allocations */ + system_cma: linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>; + reusable; + alignment = <0x0 0x400000>; + size = <0x0 0x2000000>; + linux,cma-default; + }; +}; + &soc { #address-cells = <1>; #size-cells = <1>;