From 9e574a4e45b786bbe417d28b8887c74170a74464 Mon Sep 17 00:00:00 2001
From: Mihir Ganu <mganu@qti.qualcomm.com>
Date: Tue, 30 Jun 2020 08:35:24 -0700
Subject: [PATCH] ARM: dts: msm: Remove core clock reset from vidc dts

Update video driver power sequence by removing core clock reset entry.

Change-Id: Ie2366847d00d86313682b7569bc5025e4394a82a
---
 qcom/lahaina-vidc.dtsi | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/qcom/lahaina-vidc.dtsi b/qcom/lahaina-vidc.dtsi
index 3a4128cc..1fb37df8 100644
--- a/qcom/lahaina-vidc.dtsi
+++ b/qcom/lahaina-vidc.dtsi
@@ -28,9 +28,8 @@
 		qcom,clock-configs = <0x0 0x1 0x1>;
 		qcom,allowed-clock-rates = <239999999 338000000
 			366000000 444000000>;
-		resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>,
-			<&clock_videocc VIDEO_CC_MVS0C_CLK_ARES>;
-		reset-names = "video_axi_reset", "video_core_reset";
+		resets = <&clock_gcc GCC_VIDEO_AXI0_CLK_ARES>;
+		reset-names = "video_axi_reset";
 
 		qcom,reg-presets = <0xB0088 0x0 0x11>;