From 0701c719b8f35ea88ecd8c8b49620c3e3d05e2ee Mon Sep 17 00:00:00 2001 From: Faiyaz Mohammed Date: Tue, 18 Aug 2020 12:43:51 +0530 Subject: [PATCH] ARM: dts: msm: Add addtional KGSL SMMU clocks for Shima Add the following clocks to the list of clocks to vote for in order to access the KGSL SMMU register space: - GPU_CC_CX_GMU_CLK - GPU_CC_HUB_CX_INT_CLK - GPU_CC_HUB_AON_CLK. Change-Id: I0e3f49e8e2a32104b20dc3bc543b48a572a61698 --- qcom/msm-arm-smmu-shima.dtsi | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/qcom/msm-arm-smmu-shima.dtsi b/qcom/msm-arm-smmu-shima.dtsi index f6b9eceb..e8ee9372 100644 --- a/qcom/msm-arm-smmu-shima.dtsi +++ b/qcom/msm-arm-smmu-shima.dtsi @@ -20,11 +20,18 @@ clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, <&gpucc GPU_CC_AHB_CLK>, - <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, + <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_HUB_CX_INT_CLK>, + <&gpucc GPU_CC_HUB_AON_CLK>; + clock-names = "gcc_gpu_memnoc_gfx", "gcc_gpu_snoc_dvm_gfx", "gpu_cc_ahb", - "gpu_cc_hlos1_vote_gpu_smmu_clk"; + "gpu_cc_hlos1_vote_gpu_smmu_clk", + "gpu_cc_cx_gmu_clk", + "gpu_cc_hub_cx_int_clk", + "gpu_cc_hub_aon_clk"; interconnects = <&gem_noc MASTER_GPU_TCU &mc_virt SLAVE_EBI1>;