From d5a762814704ff6ef916e3c503b6b46d5a110e56 Mon Sep 17 00:00:00 2001
From: Kalpak Kawadkar <kkawadka@qti.qualcomm.com>
Date: Mon, 28 Feb 2022 19:04:36 +0530
Subject: [PATCH] dt-bindings: clock: Add support for TCSR clock controller

Add the TCSR clock controller device tree binding.

Change-Id: Ibbafa1135c86e4b3eca3462a4878890cf25dd2b5
---
 bindings/clock/qcom,tcsrcc.txt | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)
 create mode 100644 bindings/clock/qcom,tcsrcc.txt

diff --git a/bindings/clock/qcom,tcsrcc.txt b/bindings/clock/qcom,tcsrcc.txt
new file mode 100644
index 00000000..caa4f622
--- /dev/null
+++ b/bindings/clock/qcom,tcsrcc.txt
@@ -0,0 +1,20 @@
+Qualcomm Technologies, Inc. Top-Level CSR Clock & Reset Controller Binding
+------------------------------------------------
+
+Required properties :
+- compatible : shall contain only one of the following:
+			"qcom,tcsrcc"
+
+- reg : shall contain base register location and length
+- #clock-cells : from common clock binding, shall contain 1.
+- #power-domain-cells : from generic power domain binding, shall contain 1.
+- #reset-cells : from common reset binding, shall contain 1.
+
+Example:
+	tcsrcc: clock-controller@1fc0000 {
+		compatible = "qcom,tcsrcc", "syscon";
+		reg = <0x1fc0000 0x30000>;
+		reg-name = "cc_base";
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};