From 86bb72f00e89e49f62f3ccbc2616bce0a4bda0c0 Mon Sep 17 00:00:00 2001 From: Auditya Bhattaram Date: Mon, 25 Oct 2021 23:23:47 -0700 Subject: [PATCH 1/6] ARM: dts: qcom: add android node dt entry for Cape dts: qcom: add android dt entry to firmware parent node. Change-Id: Ieaa55309bea22d693a4377fe9d7e9d9f4455fe75 --- qcom/cape.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index 95b3a20f..d5850429 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -266,6 +266,25 @@ qcom_scm { compatible = "qcom,scm"; }; + android { + compatible = "android,firmware"; + vbmeta { + compatible = "android,vbmeta"; + parts = "vbmeta,boot,system,vendor,dtbo,recovery"; + }; + + fstab { + compatible = "android,fstab"; + vendor { + compatible = "android,vendor"; + dev = "/dev/block/platform/soc/1d84000.ufshc/by-name/vendor"; + type = "ext4"; + mnt_flags = "ro,barrier=1,discard"; + fsmgr_flags = "wait,slotselect,avb"; + status = "ok"; + }; + }; + }; }; #include "cape-reserved-memory.dtsi" From a7b58b143378b6c29f61cfd7ca74ebacd5af47b6 Mon Sep 17 00:00:00 2001 From: Auditya Bhattaram Date: Mon, 25 Oct 2021 23:51:09 -0700 Subject: [PATCH 2/6] ARM: dts: qcom: Add EUD node for Cape Add EUD node for Cape to enable Embedded USB Debugging driver on Cape. Change-Id: I8f95540845573e3b8ea5b89f09efaf548cf872dc --- qcom/cape.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index d5850429..696d12e7 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -4,6 +4,8 @@ #include #include #include +#include + / { model = "Qualcomm Technologies, Inc. Cape"; compatible = "qcom,cape"; @@ -874,6 +876,22 @@ qcom,bcm-voter-names = "hlos"; qcom,bcm-voters = <&apps_bcm_voter>; }; + + eud: qcom,msm-eud@88e0000 { + compatible = "qcom,msm-eud"; + interrupt-names = "eud_irq"; + interrupt-parent = <&pdc>; + interrupts = <11 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x088e0000 0x2000>, + <0x088e2000 0x1000>; + reg-names = "eud_base", "eud_mode_mgr2"; + + clocks = <&clock_gcc GCC_EUSB3_0_CLKREF_EN>; + clock-names = "eud_clkref_clk"; + + qcom,secure-eud-en; + status = "ok"; + }; }; &clock_gcc { From 8750115034b3572540bb9e44ba3bba83cef315f8 Mon Sep 17 00:00:00 2001 From: Auditya Bhattaram Date: Mon, 25 Oct 2021 23:58:11 -0700 Subject: [PATCH 3/6] ARM: dts: qcom: Add minidump node for Cape SoC Enable minidump driver support for Cape SoC. Change-Id: I7c08701a238a3e4442e6dbe38a500b9dc1964900 --- qcom/cape.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index 696d12e7..e7be41c8 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -892,6 +892,10 @@ qcom,secure-eud-en; status = "ok"; }; + + mini_dump_node { + compatible = "qcom,minidump"; + }; }; &clock_gcc { From fab348cea24d70bdc56ae3a04343166397eacce5 Mon Sep 17 00:00:00 2001 From: Auditya Bhattaram Date: Tue, 26 Oct 2021 22:45:42 -0700 Subject: [PATCH 4/6] ARM: dts: msm: Add va minidump node for Cape Add va minidump node for Cape Platform. Change-Id: Ia6f2a92dce8f2d40c4c38ed22415aee4b3b88ecd --- qcom/cape.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index e7be41c8..2ce36998 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -305,6 +305,13 @@ size = <0x0 0x2000000>; linux,cma-default; }; + + va_md_mem: va_md_mem_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x1 0x00000000 0xfffffffe 0xffffffff>; + reusable; + size = <0 0x1000000>; + }; }; #include "waipio-clock.dtsi" @@ -896,6 +903,12 @@ mini_dump_node { compatible = "qcom,minidump"; }; + + va_mini_dump { + compatible = "qcom,va-minidump"; + memory-region = <&va_md_mem>; + status = "ok"; + }; }; &clock_gcc { From de0c9449c380c70fe198d6b779106a6d198292b7 Mon Sep 17 00:00:00 2001 From: Auditya Bhattaram Date: Tue, 26 Oct 2021 00:10:26 -0700 Subject: [PATCH 5/6] ARM: dts: msm: Add logbuf & cpu vendor hook for Cape Enable logbuf vendor hook & cpu vendor hook driver for Cape. Change-Id: Ifdae72169c9f4e9c8337a4b17828947988d2108a --- qcom/cape.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index 2ce36998..128104de 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -909,6 +909,14 @@ memory-region = <&va_md_mem>; status = "ok"; }; + + vendor_hooks: qcom,cpu-vendor-hooks { + compatible = "qcom,cpu-vendor-hooks"; + }; + + logbuf: qcom,logbuf-vendor-hooks { + compatible = "qcom,logbuf-vendor-hooks"; + }; }; &clock_gcc { From f9aa9d9ff3739448383ce705be0b78e11e04979f Mon Sep 17 00:00:00 2001 From: Auditya Bhattaram Date: Tue, 26 Oct 2021 04:45:30 -0700 Subject: [PATCH 6/6] ARM: dts: msm: Enable cpu-pmu,rtb and sleep-counter ARM: dts: msm: Enable cpu-pmu,rtb and sleep-counter on Cape. Change-Id: I5a3c0570543e68cc2176eae1dfbf5ede9b7bd4c9 --- qcom/cape.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi index 128104de..ab72ded8 100644 --- a/qcom/cape.dtsi +++ b/qcom/cape.dtsi @@ -917,6 +917,24 @@ logbuf: qcom,logbuf-vendor-hooks { compatible = "qcom,logbuf-vendor-hooks"; }; + + cpu_pmu: cpu-pmu { + compatible = "arm,armv8-pmuv3"; + interrupts = ; + }; + + qcom,msm-rtb { + compatible = "qcom,msm-rtb"; + qcom,rtb-size = <0x100000>; + }; + + qcom,mpm2-sleep-counter@c221000 { + compatible = "qcom,mpm2-sleep-counter"; + reg = <0xc221000 0x1000>; + clock-frequency = <32768>; + }; + + }; &clock_gcc {