From b48af3ccf03da667d7e763f65a4cbfafdd559ea4 Mon Sep 17 00:00:00 2001 From: Rohith Kollalsi Date: Tue, 29 Mar 2022 15:24:58 +0530 Subject: [PATCH] ARM: dts: msm: Add interrupt, interconnects & BAM nodes to parrot Adding interconnects for usb_ddr, ddr_ipa & ddr_usb access, interrupts dp,dm,ss_phy_irq for parrot. Change-Id: Id162e212f4c63a2ce629e8232c995646449af092 --- qcom/parrot-usb.dtsi | 26 ++++++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) diff --git a/qcom/parrot-usb.dtsi b/qcom/parrot-usb.dtsi index 12e5041c..e75506a0 100644 --- a/qcom/parrot-usb.dtsi +++ b/qcom/parrot-usb.dtsi @@ -1,4 +1,5 @@ #include +#include &soc { usb0: ssusb@a600000 { @@ -23,11 +24,30 @@ resets = <&gcc GCC_USB30_PRIM_BCR>; reset-names = "core_reset"; - interrupts = ; - interrupt-names = "pwr_event_irq"; + interrupts-extended = <&pdc 14 IRQ_TYPE_EDGE_RISING>, + <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 17 IRQ_TYPE_LEVEL_HIGH>, + <&pdc 15 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "dp_hs_phy_irq", "pwr_event_irq", + "ss_phy_irq", "dm_hs_phy_irq"; + qcom,use-pdc-interrupts; qcom,core-clk-rate = <133333333>; qcom,core-clk-rate-hs = <66666667>; + qcom,pm-qos-latency = <2>; + qcom,num-gsi-evt-buffs = <0x3>; + qcom,gsi-reg-offset = + <0x0fc /* GSI_GENERAL_CFG */ + 0x110 /* GSI_DBL_ADDR_L */ + 0x120 /* GSI_DBL_ADDR_H */ + 0x130 /* GSI_RING_BASE_ADDR_L */ + 0x144 /* GSI_RING_BASE_ADDR_H */ + 0x1a4>; /* GSI_IF_STS */ + + interconnect-names = "usb-ddr", "usb-ipa", "ddr-usb"; + interconnects = <&aggre1_noc MASTER_USB3_0 &mc_virt SLAVE_EBI1>, + <&aggre1_noc MASTER_USB3_0 &cnoc2 SLAVE_IPA_CFG>, + <&gem_noc MASTER_APPSS_PROC &cnoc2 SLAVE_USB3_0>; dwc3@a600000 { compatible = "snps,dwc3"; @@ -47,7 +67,9 @@ snps,dis-u2-entry-quirk; snps,dis_u2_susphy_quirk; tx-fifo-resize; + dr_mode = "peripheral"; maximum-speed = "super-speed"; }; + }; };