From ba74a8490a616325b20de067007d90b6f2adbf64 Mon Sep 17 00:00:00 2001
From: Balakrishna Godavarthi <bgodavar@qti.qualcomm.com>
Date: Fri, 19 Nov 2021 10:50:27 +0530
Subject: [PATCH] ARM: dts: msm: Add BT node for cape

This change add BT SoC WCN685x node

Change-Id: Ifa8b6edf646e399f8ec604703f1276911f43db14
---
 qcom/cape-pinctrl.dtsi | 14 ++++++++++++++
 qcom/cape.dtsi         | 33 +++++++++++++++++++++++++++++++++
 2 files changed, 47 insertions(+)

diff --git a/qcom/cape-pinctrl.dtsi b/qcom/cape-pinctrl.dtsi
index 4329172d..e50af9f1 100644
--- a/qcom/cape-pinctrl.dtsi
+++ b/qcom/cape-pinctrl.dtsi
@@ -1034,6 +1034,20 @@
 		};
 	};
 
+	bt_en_sleep: bt_en_sleep {
+		mux {
+			pins = "gpio81";
+			function = "gpio";
+		};
+
+		config {
+			pins = "gpio81";
+			drive-strength = <2>;
+			output-low;
+			bias-pull-down;
+		};
+	};
+
 	qupv3_se7_2uart_pins: qupv3_se7_2uart_pins {
 		qupv3_se7_2uart_active: qupv3_se7_2uart_active {
 			mux {
diff --git a/qcom/cape.dtsi b/qcom/cape.dtsi
index f9d5ccf4..dff5fdd6 100644
--- a/qcom/cape.dtsi
+++ b/qcom/cape.dtsi
@@ -470,6 +470,35 @@
 		status = "disabled";
 	};
 
+	bluetooth: bt_qca6490 {
+		compatible = "qcom,qca6490";
+		pinctrl-names = "default";
+		pinctrl-0 = <&bt_en_sleep>;
+		qcom,wl-reset-gpio = <&tlmm 80 0>; /* WL_CTRL */
+		qcom,bt-reset-gpio = <&tlmm 81 0>; /* BT_EN */
+		qcom,bt-sw-ctrl-gpio = <&tlmm 82 0>; /* SW_CTRL */
+		qcom,xo-clk-gpio = <&tlmm 204 0>; /* XO */
+
+		qcom,bt-vdd-io-supply = <&S10B>;  /* IO */
+		qcom,bt-vdd-aon-supply = <&S11B>;
+		qcom,bt-vdd-dig-supply = <&S11B>; /* BT_CX_MX */
+		qcom,bt-vdd-rfacmn-supply = <&S11B>;
+		qcom,bt-vdd-rfa-0p8-supply = <&S11B>;
+		qcom,bt-vdd-rfa1-supply = <&S1C>; /* RFA 1p7 */
+		qcom,bt-vdd-rfa2-supply = <&S12B>; /* RFA 1p2 */
+		qcom,bt-vdd-asd-supply = <&L7E>;
+
+		/* Max Voltages are derived from the buck Max Voltage */
+		qcom,bt-vdd-io-config = <1800000 1800000 0 1>;
+		qcom,bt-vdd-aon-config = <966000 1170000 0 1>;
+		qcom,bt-vdd-dig-config = <966000 1170000 0 1>;
+		qcom,bt-vdd-rfacmn-config  = <966000 1170000 0 1>;
+		qcom,bt-vdd-rfa-0p8-config  = <966000 1170000 0 1>;
+		qcom,bt-vdd-rfa1-config = <1900000 2040000 0 1>;
+		qcom,bt-vdd-rfa2-config = <1350000 2024000 0 1>;
+		qcom,bt-vdd-asd-config = <2800000 2800000 0 1>;
+	};
+
 	intc: interrupt-controller@17100000 {
 		compatible = "arm,gic-v3";
 		#interrupt-cells = <3>;
@@ -2763,6 +2792,10 @@
 	status = "ok";
 };
 
+&qupv3_se20_4uart {
+	status = "ok";
+};
+
 &qupv3_se5_i2c {
 	status = "ok";
 	fsa4480: fsa4480@42 {