From c3ddd340f361331027d861d7736ba9ebf1ac4a45 Mon Sep 17 00:00:00 2001
From: Mao Jinlong <jinlmao@qti.qualcomm.com>
Date: Tue, 28 Apr 2020 23:22:37 +0800
Subject: [PATCH] ARM: dts: msm: Add usb bypass mode and disable smmu for
 lahaina

Add usb bypass mode and disable smmu to support usb sink sw mode.

Change-Id: I9dd373cf3b622791417ca4c7be898b9c0b81f9ff
---
 qcom/lahaina-coresight.dtsi | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/qcom/lahaina-coresight.dtsi b/qcom/lahaina-coresight.dtsi
index 585b0419..9e3c093d 100644
--- a/qcom/lahaina-coresight.dtsi
+++ b/qcom/lahaina-coresight.dtsi
@@ -138,6 +138,7 @@
 		      <0x6064000 0x15000>;
 		reg-names = "tmc-base", "bam-base";
 
+		qcom,iommu-dma = "bypass";
 		iommus = <&apps_smmu 0x0480 0>,
 			<&apps_smmu 0x0520 0>;
 
@@ -150,6 +151,7 @@
 		arm,buffer-size = <0x400000>;
 		arm,scatter-gather;
 
+		qcom,sw-usb;
 		coresight-name = "coresight-tmc-etr";
 		coresight-ctis = <&cti0 &cti0>;
 		coresight-csr = <&csr>;