From 4600b9ccf5ad8c9ad214fdcb3f47ee75b3d85395 Mon Sep 17 00:00:00 2001
From: Jagadeesh Kona <jkona@qti.qualcomm.com>
Date: Fri, 13 Mar 2020 10:44:11 +0530
Subject: [PATCH] bindings: clock: Add support for SHIMA clock controllers

Update the GCC, GPUCC, CAMCC, DISPCC, VIDEOCC and debug clock controller
bindings for SHIMA device.

Change-Id: Ia28c6e4595e78103326677772ca765f8d16b1560
---
 bindings/clock/qcom,camcc.txt   | 3 ++-
 bindings/clock/qcom,debugcc.txt | 2 +-
 bindings/clock/qcom,dispcc.txt  | 1 +
 bindings/clock/qcom,gcc.txt     | 1 +
 bindings/clock/qcom,gpucc.txt   | 3 ++-
 bindings/clock/qcom,videocc.txt | 1 +
 6 files changed, 8 insertions(+), 3 deletions(-)

diff --git a/bindings/clock/qcom,camcc.txt b/bindings/clock/qcom,camcc.txt
index 513ffe16..5a05d0e0 100644
--- a/bindings/clock/qcom,camcc.txt
+++ b/bindings/clock/qcom,camcc.txt
@@ -2,7 +2,8 @@ Qualcomm Technologies, Inc. Camera Clock & Reset Controller Binding
 -------------------------------------------------------------------
 
 Required properties :
-- compatible : shall contain "qcom,sdm845-camcc" or "qcom,lahaina-camcc".
+- compatible : shall contain "qcom,sdm845-camcc" or "qcom,lahaina-camcc",
+		"qcom,shima-camcc".
 - reg : shall contain base register location and length.
 - reg-names: names of registers listed in the same order as in
 		the reg property.
diff --git a/bindings/clock/qcom,debugcc.txt b/bindings/clock/qcom,debugcc.txt
index 6239c8b1..3ee17c1b 100644
--- a/bindings/clock/qcom,debugcc.txt
+++ b/bindings/clock/qcom,debugcc.txt
@@ -2,7 +2,7 @@ Qualcomm Technologies, Inc. Debug Clock Controller Binding
 ----------------------------------------------------------
 
 Required properties :
-- compatible: Shall contain "qcom,lahaina-debugcc".
+- compatible: Shall contain "qcom,lahaina-debugcc" or "qcom,shima-debugcc".
 - qcom,gcc: phandle to the GCC device node.
 - qcom,videocc: phandle to the Video CC device node.
 - qcom,camcc: phandle to the Camera CC device node.
diff --git a/bindings/clock/qcom,dispcc.txt b/bindings/clock/qcom,dispcc.txt
index 20c14496..d8bf1815 100644
--- a/bindings/clock/qcom,dispcc.txt
+++ b/bindings/clock/qcom,dispcc.txt
@@ -7,6 +7,7 @@ Required properties :
 
 			"qcom,sdm845-dispcc"
 			"qcom,lahaina-dispcc"
+			"qcom,shima-dispcc"
 
 - reg : shall contain base register location and length.
 - #clock-cells : from common clock binding, shall contain 1.
diff --git a/bindings/clock/qcom,gcc.txt b/bindings/clock/qcom,gcc.txt
index d4de2777..d66630ef 100644
--- a/bindings/clock/qcom,gcc.txt
+++ b/bindings/clock/qcom,gcc.txt
@@ -28,6 +28,7 @@ Required properties :
 			"qcom,gcc-sm8150-v2"
 			"qcom,gcc-sa8155"
 			"qcom,gcc-sa8155-v2"
+			"qcom,shima-gcc"
 
 
 - reg : shall contain base register location and length
diff --git a/bindings/clock/qcom,gpucc.txt b/bindings/clock/qcom,gpucc.txt
index da307e9f..a609c98b 100644
--- a/bindings/clock/qcom,gpucc.txt
+++ b/bindings/clock/qcom,gpucc.txt
@@ -3,7 +3,8 @@ Qualcomm Technologies, Inc. Graphics Clock & Reset Controller Binding
 
 Required properties :
 - compatible : shall contain "qcom,sdm845-gpucc" or "qcom,msm8998-gpucc",
-		"qcom,lahaina-gpucc.
+		"qcom,lahaina-gpucc",
+		"qcom,shima-gpucc".
 - reg: shall contain base register offset and size.
 - reg-names: names of registers listed in the same order as in the reg property.
 		Must contain "cc_base".
diff --git a/bindings/clock/qcom,videocc.txt b/bindings/clock/qcom,videocc.txt
index a7dea91f..9dd9a36d 100644
--- a/bindings/clock/qcom,videocc.txt
+++ b/bindings/clock/qcom,videocc.txt
@@ -6,6 +6,7 @@ Required properties :
 
 			"qcom,sdm845-videocc"
 			"qcom,lahaina-videocc"
+			"qcom,shima-videocc"
 
 - reg : shall contain base register location and length
 - #clock-cells : from common clock binding, shall contain 1.