diff --git a/bindings/clock/qcom,tcsrcc.txt b/bindings/clock/qcom,tcsrcc.txt new file mode 100644 index 00000000..caa4f622 --- /dev/null +++ b/bindings/clock/qcom,tcsrcc.txt @@ -0,0 +1,20 @@ +Qualcomm Technologies, Inc. Top-Level CSR Clock & Reset Controller Binding +------------------------------------------------ + +Required properties : +- compatible : shall contain only one of the following: + "qcom,tcsrcc" + +- reg : shall contain base register location and length +- #clock-cells : from common clock binding, shall contain 1. +- #power-domain-cells : from generic power domain binding, shall contain 1. +- #reset-cells : from common reset binding, shall contain 1. + +Example: + tcsrcc: clock-controller@1fc0000 { + compatible = "qcom,tcsrcc", "syscon"; + reg = <0x1fc0000 0x30000>; + reg-name = "cc_base"; + #clock-cells = <1>; + #reset-cells = <1>; + };