From b772ae9efa70e66b7fa67c903c419311af2ae111 Mon Sep 17 00:00:00 2001
From: Akshay Chandrashekhar Kalghatgi <akalghat@quicinc.com>
Date: Fri, 25 Oct 2019 12:37:40 -0700
Subject: [PATCH] ARM: dts: msm: add dt node for video

Add the device tree entries for Lahaina IRIS2 required for PIL.

Change-Id: I6cdbee029ec06287f714bba1ec6ca2ff50e70101
---
 qcom/lahaina.dtsi | 29 +++++++++++++++++++++++++++++
 1 file changed, 29 insertions(+)

diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi
index ba36a3fb..b1b4410b 100644
--- a/qcom/lahaina.dtsi
+++ b/qcom/lahaina.dtsi
@@ -1458,6 +1458,35 @@
 			qcom,glinkpkt-dev-name = "smd11";
 		};
 	};
+
+	qcom,venus@aab0000 {
+		compatible = "qcom,pil-tz-generic";
+		reg = <0xaab0000 0x2000>;
+
+		vdd-supply = <&video_cc_mvs0c_gdsc>;
+		qcom,proxy-reg-names = "vdd";
+		qcom,complete-ramdump;
+
+		clocks = <&clock_videocc VIDEO_CC_XO_CLK>,
+			<&clock_videocc VIDEO_CC_MVS0C_CLK>,
+			<&clock_videocc VIDEO_CC_AHB_CLK>;
+		clock-names = "xo", "core", "ahb";
+		qcom,proxy-clock-names = "xo",  "core", "ahb";
+
+		qcom,core-freq = <200000000>;
+		qcom,ahb-freq = <200000000>;
+
+		qcom,pas-id = <9>;
+		qcom,msm-bus,name = "pil-venus";
+		qcom,msm-bus,num-cases = <2>;
+		qcom,msm-bus,num-paths = <1>;
+		qcom,msm-bus,vectors-KBps =
+			<63 512 0 0>,
+			<63 512 0 304000>;
+		qcom,proxy-timeout-ms = <100>;
+		qcom,firmware-name = "venus";
+		memory-region = <&pil_video_mem>;
+	};
 };
 
 #include "lahaina-regulators.dtsi"