From 9e9220574e71253e62a2c644eaf36815961e0799 Mon Sep 17 00:00:00 2001
From: Chandana Kishori Chiluveru <cchiluve@qti.qualcomm.com>
Date: Fri, 29 Oct 2021 09:19:11 +0530
Subject: [PATCH] ARM: dts: msm: Add Shared flag and correct GPIO's on Diwali

Enable shared flag for I2C SE2 instance to enable multi-EE GSI
usecase for EEPROM.

Also correct GPIO's for SE6 SPI instance.

Change-Id: Ic8e88d30bda88b5395e032207f11e3b1e347d365
---
 qcom/diwali-pinctrl.dtsi |  8 ++++----
 qcom/diwali-qupv3.dtsi   | 14 +++++++++-----
 qcom/diwali.dtsi         |  1 +
 3 files changed, 14 insertions(+), 9 deletions(-)

diff --git a/qcom/diwali-pinctrl.dtsi b/qcom/diwali-pinctrl.dtsi
index 7f76139c..ab8306f1 100644
--- a/qcom/diwali-pinctrl.dtsi
+++ b/qcom/diwali-pinctrl.dtsi
@@ -425,14 +425,14 @@
 
 		qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
 			mux {
-				pins = "gpio20", "gpio21",
-						"gpio22", "gpio23";
+				pins = "gpio24", "gpio25",
+						"gpio26", "gpio27";
 				function = "gpio";
 			};
 
 			config {
-				pins = "gpio20", "gpio21",
-						"gpio22", "gpio23";
+				pins = "gpio24", "gpio25",
+						"gpio26", "gpio27";
 				drive-strength = <6>;
 				bias-disable;
 			};
diff --git a/qcom/diwali-qupv3.dtsi b/qcom/diwali-qupv3.dtsi
index dd09abdf..61bb93e3 100644
--- a/qcom/diwali-qupv3.dtsi
+++ b/qcom/diwali-qupv3.dtsi
@@ -60,6 +60,7 @@
 		qcom,gpii-mask = <0x7f>;
 		qcom,ev-factor = <2>;
 		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
+		dma-coherent;
 		qcom,gpi-ee-offset = <0x10000>;
 		status = "ok";
 	};
@@ -81,6 +82,7 @@
 		status = "disabled";
 	};
 
+	/* TUI over I2C */
 	qupv3_se0_i2c: i2c@980000 {
 		compatible = "qcom,i2c-geni";
 		reg = <0x980000 0x4000>;
@@ -94,8 +96,8 @@
 		pinctrl-names = "default", "sleep";
 		pinctrl-0 = <&qupv3_se0_i2c_active>;
 		pinctrl-1 = <&qupv3_se0_i2c_sleep>;
-		dmas = <&gpi_dma0 0 0 3 64 0>,
-			<&gpi_dma0 1 0 3 64 0>;
+		dmas = <&gpi_dma0 0 0 3 64 2>,
+			<&gpi_dma0 1 0 3 64 2>;
 		dma-names = "tx", "rx";
 		qcom,wrapper-core = <&qupv3_0>;
 		status = "disabled";
@@ -115,8 +117,8 @@
 		pinctrl-names = "default", "sleep";
 		pinctrl-0 = <&qupv3_se0_spi_active>;
 		pinctrl-1 = <&qupv3_se0_spi_sleep>;
-		dmas = <&gpi_dma0 0 0 1 64 0>,
-			<&gpi_dma0 1 0 1 64 0>;
+		dmas = <&gpi_dma0 0 0 1 64 2>,
+			<&gpi_dma0 1 0 1 64 2>;
 		dma-names = "tx", "rx";
 		spi-max-frequency = <50000000>;
 		qcom,wrapper-core = <&qupv3_0>;
@@ -182,6 +184,7 @@
 			<&gpi_dma0 1 2 3 64 0>;
 		dma-names = "tx", "rx";
 		qcom,wrapper-core = <&qupv3_0>;
+		qcom,shared;
 		status = "disabled";
 	};
 
@@ -356,7 +359,7 @@
 		status = "disabled";
 	};
 
-	/* QUPv3_1  wrapper  instance */
+	/* QUPv3_1 wrapper instance */
 	qupv3_1: qcom,qupv3_1_geni_se@ac0000 {
 		compatible = "qcom,qupv3-geni-se";
 		reg = <0xac0000 0x2000>;
@@ -397,6 +400,7 @@
 		qcom,gpii-mask = <0x6f>;
 		qcom,ev-factor = <2>;
 		qcom,iommu-dma-addr-pool = <0x100000 0x100000>;
+		dma-coherent;
 		qcom,gpi-ee-offset = <0x10000>;
 		status = "ok";
 	};
diff --git a/qcom/diwali.dtsi b/qcom/diwali.dtsi
index 5e3e00b2..cd1057c1 100644
--- a/qcom/diwali.dtsi
+++ b/qcom/diwali.dtsi
@@ -34,6 +34,7 @@
 
 	aliases: aliases {
 		serial0 = &qupv3_se5_2uart;
+		hsuart0 = &qupv3_se7_4uart;
 		ufshc1 = &ufshc_mem; /* Embedded UFS Slot */
 		sdhc2 = &sdhc_2; /* SDC2 SD card slot */
 	 };