From 8d95cd7164ea05ac33ec9defefa345d91e0fab28 Mon Sep 17 00:00:00 2001
From: Hao Zhang <hazha@qti.qualcomm.com>
Date: Tue, 19 Jul 2022 16:47:32 +0800
Subject: [PATCH] ARM: dts: msm: enable dcc for anorak

Enable DCC for dcc register dump function on anorak.

Change-Id: I0c983dad396ab70918e74cd8e79b9fbf179f29d9
---
 qcom/anorak-debug.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/qcom/anorak-debug.dtsi b/qcom/anorak-debug.dtsi
index 8f1e882c..94f95de6 100644
--- a/qcom/anorak-debug.dtsi
+++ b/qcom/anorak-debug.dtsi
@@ -22,7 +22,7 @@
 		      <0x10080000 0x18000>;
 
 		qcom,transaction_timeout = <0>;
-		status = "disabled";
+
 		reg-names = "dcc-base", "dcc-ram-base";
 		dcc-ram-offset = <0>;
 	};