diff --git a/bindings/regulator/gdsc-regulator.txt b/bindings/regulator/gdsc-regulator.txt
index 0234b27b..e72c5513 100644
--- a/bindings/regulator/gdsc-regulator.txt
+++ b/bindings/regulator/gdsc-regulator.txt
@@ -58,6 +58,10 @@ Optional properties:
  - qcom,skip-disable-before-sw-enable : Presence denotes a hardware requirement
 					to leave the GDSC on that has been
 					enabled by an entity external to HLOS.
+ - qcom,collapse-vote : If present, GDSC will be controlled by votable register.
+			Some targets have single votable register to control GDSC,
+			but there could be targets where separate votable registers
+			to control the GDSCs individually for active and sleep states.
 
 Example:
 	gdsc_oxili_gx: qcom,gdsc@fd8c4024 {
@@ -67,3 +71,17 @@ Example:
 		reg = <0xfd8c4024 0x4>;
 		clock-names = "core_clk";
 	};
+
+	/* Single votable register */
+	gcc_pcie_0_gdsc: qcom,gdsc@17b004 {
+		compatible = "qcom,gdsc";
+		regulator-name = "gcc_pcie_0_gdsc";
+		qcom,collapse-vote = <&active_ctrl 0>;
+	};
+
+	/* Multiple votable registers */
+	gcc_pcie_1_gdsc: qcom,gdsc@19d004 {
+		compatible = "qcom,gdsc";
+		regulator-name = "gcc_pcie_1_gdsc";
+		qcom,collapse-vote = <&active_ctrl &sleep_ctrl 1>;
+	};