diff --git a/qcom/lahaina-cdp.dtsi b/qcom/lahaina-cdp.dtsi index 01745618..c1263403 100644 --- a/qcom/lahaina-cdp.dtsi +++ b/qcom/lahaina-cdp.dtsi @@ -201,4 +201,8 @@ extcon = <&extcon_usb1>; }; +&wil6210 { + status = "ok"; +}; + #include "camera/lahaina-camera-sensor-cdp.dtsi" diff --git a/qcom/lahaina-mtp.dtsi b/qcom/lahaina-mtp.dtsi index 943dc725..b7bd2bf5 100644 --- a/qcom/lahaina-mtp.dtsi +++ b/qcom/lahaina-mtp.dtsi @@ -185,4 +185,8 @@ qcom,thermal-mitigation = <3000000 1500000 1000000 500000>; }; +&wil6210 { + status = "ok"; +}; + #include "camera/lahaina-camera-sensor-mtp.dtsi" diff --git a/qcom/lahaina-qrd.dtsi b/qcom/lahaina-qrd.dtsi index ca018b00..c46c19f2 100644 --- a/qcom/lahaina-qrd.dtsi +++ b/qcom/lahaina-qrd.dtsi @@ -204,3 +204,7 @@ pinctrl-1 = <&tert_mi2s_sck_sleep &tert_mi2s_ws_sleep &tert_mi2s_sd0_sleep>; }; + +&wil6210 { + status = "ok"; +}; diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index bd767edc..e1472aaf 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -3777,6 +3777,29 @@ qcom,bt-vdd-rfa1-config = <1880000 1880000 0 1>; qcom,bt-vdd-rfa2-config = <1350000 1350000 0 1>; }; + + wil6210: qcom,wil6210 { + compatible = "qcom,wil6210"; + qcom,pcie-parent = <&pcie1>; + qcom,wigig-en = <&tlmm 47 0>; + pinctrl-names = "default"; + pinctrl-0 = <&wil6210_refclk_en_pin>; + qcom,11ad-bus-bw,name = "wil6210"; + qcom,11ad-bus-bw,num-cases = <3>; + qcom,11ad-bus-bw,num-paths = <1>; + qcom,11ad-bus-bw,vectors-KBps = + <100 512 0 0>, + <100 512 600000 800000>, /* ~4.6Gbps (MCS12) */ + <100 512 1300000 1300000>; /* ~10.1Gbps */ + qcom,use-ext-supply; + vdd-s1c-supply = <&S1C>; + qcom,use-ext-clocks; + clocks = <&clock_rpmh RPMH_RF_CLK5>; + clock-names = "rf_clk"; + qcom,keep-radio-on-during-sleep; + qcom,use-ap-power-save; + status = "disabled"; + }; }; #include "ipcc-test.dtsi" @@ -3816,6 +3839,26 @@ }; }; +&pcie1_rp { + #address-cells = <5>; + #size-cells = <0>; + + wil6210_pci: wil6210_pci { + reg = <0 0 0 0 0>; + qcom,iommu-group = <&wil6210_pci_iommu_group>; + + #address-cells = <1>; + #size-cells = <1>; + + wil6210_pci_iommu_group: wil6210_pci_iommu_group { + reg = <0 0>; + qcom,iommu-dma-addr-pool = <0x60000000 0xa0000000>; + qcom,iommu-dma = "fastmap"; + qcom,iommu-pagetable = "coherent"; + }; + }; +}; + #include "lahaina-gpu.dtsi" #include "display/lahaina-sde.dtsi" #include "lahaina-thermal.dtsi"