From b285b000654a7376d564abbbc0e27e1bbcd44389 Mon Sep 17 00:00:00 2001
From: Mohammed Mirza Mandayappurath Manzoor <mmandaya@quicinc.com>
Date: Thu, 11 Mar 2021 11:31:14 -0800
Subject: [PATCH] ARM: dts: msm: Add new power levels for C500 GPU

Expose higher supported power levels for C500 GPU.

Change-Id: Id1e4b4f106764c938423fcad3740a8400c3595f6
---
 qcom/waipio-gpu.dtsi | 30 +++++++++++++++++++++++++-----
 1 file changed, 25 insertions(+), 5 deletions(-)

diff --git a/qcom/waipio-gpu.dtsi b/qcom/waipio-gpu.dtsi
index 59612f9c..60942ce0 100644
--- a/qcom/waipio-gpu.dtsi
+++ b/qcom/waipio-gpu.dtsi
@@ -20,7 +20,7 @@
 				"gcc_gpu_snoc_dvm_gfx",
 				"gpu_cc_ahb";
 
-		qcom,initial-pwrlevel = <2>;
+		qcom,initial-pwrlevel = <4>;
 
 		qcom,no-nap;
 
@@ -63,6 +63,26 @@
 
 			qcom,gpu-pwrlevel@0 {
 				reg = <0>;
+				qcom,gpu-freq = <734000000>;
+				qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
+
+				qcom,bus-freq = <10>;
+				qcom,bus-min = <9>;
+				qcom,bus-max = <10>;
+			};
+
+			qcom,gpu-pwrlevel@1 {
+				reg = <1>;
+				qcom,gpu-freq = <640000000>;
+				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
+
+				qcom,bus-freq = <9>;
+				qcom,bus-min = <8>;
+				qcom,bus-max = <10>;
+			};
+
+			qcom,gpu-pwrlevel@2 {
+				reg = <2>;
 				qcom,gpu-freq = <599000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
 
@@ -71,8 +91,8 @@
 				qcom,bus-max = <9>;
 			};
 
-			qcom,gpu-pwrlevel@1 {
-				reg = <1>;
+			qcom,gpu-pwrlevel@3 {
+				reg = <3>;
 				qcom,gpu-freq = <492000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
 
@@ -81,8 +101,8 @@
 				qcom,bus-max = <8>;
 			};
 
-			qcom,gpu-pwrlevel@2 {
-				reg = <2>;
+			qcom,gpu-pwrlevel@4 {
+				reg = <4>;
 				qcom,gpu-freq = <350000000>;
 				qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;