From f2feecbe478ba1de09df747b5055584e0b8f22de Mon Sep 17 00:00:00 2001
From: Amir Vajid <avajid@quicinc.com>
Date: Wed, 23 Jun 2021 11:59:23 -0700
Subject: [PATCH] dt-bindings: dcvs: add support for multiple ddr types

Update the qcom dcvs and memlat documentation to add
support for multiple DDR types for DDR frequency tables
and memlat cpufreq-memfreq tables respectively.

Change-Id: I30556700e9e2db46617ea430391977aff20feab7
---
 bindings/soc/qcom/qcom,dcvs.txt   | 47 ++++++++++++++++++++++---------
 bindings/soc/qcom/qcom,memlat.txt | 31 +++++++++++++++-----
 2 files changed, 58 insertions(+), 20 deletions(-)

diff --git a/bindings/soc/qcom/qcom,dcvs.txt b/bindings/soc/qcom/qcom,dcvs.txt
index b1538a34..6cb6e1ba 100644
--- a/bindings/soc/qcom/qcom,dcvs.txt
+++ b/bindings/soc/qcom/qcom,dcvs.txt
@@ -24,7 +24,9 @@ Required properties:
 - qcom,bus-width:	Bus width of hardware interface (in Bytes).
 - qcom,freq-tbl:	Array of frequencies or phandle to an array of
 			frequencies in units of kHz that this hardware
-			device supports. Required for all devices except
+			device supports. A phandle must be used in conjunction
+			with the optional "qcom,ddr-type" property to support
+			multiple DDR types. Required for all devices except
 			DCVS_L3.
 - reg:			Physical base address and region size of the memory
 			mapped registers containing the device's base address
@@ -33,6 +35,9 @@ Required properties:
 - reg-names:		Name used for the above registers. Expected names are
 			"l3-base" and "l3tbl-base" respectively. Required for
 			DCVS_L3 devices.
+Optional properties:
+- qcom,ddr-type:	Specifies the DDR type supported by the corresponding
+			"qcom,freq-tbl" property.
 
 [Third Level Nodes]
 Required properties:
@@ -78,18 +83,34 @@ Example:
 	};
 
 	ddr_freq_table: ddr-freq-table {
-		qcom,freq-tbl =
-			<  200000 >,
-			<  451000 >,
-			<  547000 >,
-			<  681000 >,
-			<  768000 >,
-			< 1017000 >,
-			< 1555000 >,
-			< 1708000 >,
-			< 2092000 >,
-			< 2736000 >,
-			< 3196000 >;
+		ddr4 {
+			qcom,ddr-type = <7>;
+			qcom,freq-tbl =
+				<  200000 >,
+				<  451000 >,
+				<  547000 >,
+				<  681000 >,
+				<  768000 >,
+				< 1017000 >,
+				< 1555000 >,
+				< 1708000 >,
+				< 2092000 >,
+		};
+		ddr5 {
+			qcom,ddr-type = <8>;
+			qcom,freq-tbl =
+				<  200000 >,
+				<  451000 >,
+				<  547000 >,
+				<  681000 >,
+				<  768000 >,
+				< 1017000 >,
+				< 1555000 >,
+				< 1708000 >,
+				< 2092000 >,
+				< 2736000 >,
+				< 3196000 >;
+		}
 	};
 
 	qcom_dcvs: qcom,dcvs {
diff --git a/bindings/soc/qcom/qcom,memlat.txt b/bindings/soc/qcom/qcom,memlat.txt
index b79ef0e9..de807300 100644
--- a/bindings/soc/qcom/qcom,memlat.txt
+++ b/bindings/soc/qcom/qcom,memlat.txt
@@ -52,6 +52,9 @@ Required properties:
 				(i.e. DCVS HW) frequency (both in units of kHz).
 				A phandle that contains this property may be
 				provided instead (to share tables across nodes).
+				A phandle must be used in conjunction with the
+				optional "qcom,ddr-type" property to support
+				multiple DDR types.
 - qcom,sampling-enabled:	Used to determine if this mon should be used by
 				the memlat sampling algorithm. This property or
 				the qcom,threadlat-enabled property is required.
@@ -61,6 +64,8 @@ Required properties:
 Optional properties:
 - qcom,compute-mon:		Used to configure mon as a "compute" mon which
 				means it monitors compute bound workloads.
+- qcom,ddr-type:		Specifies the DDR type supported by the
+				corresponding "qcom,cpufreq-memfreq-tbl" prop.
 
 Example:
 
@@ -77,12 +82,24 @@ Example:
 	};
 
 	silver_ddr_tbl: qcom,silver-ddr-tbl {
-		qcom,core-dev-table =
-			<  300000  200000 >,
-			<  691200  451000 >,
-			< 1190400  547000 >,
-			< 1459200  768000 >,
-			< 1900800 1555000 >;
+		ddr4-tbl {
+			qcom,ddr-type = <7>;
+			qcom,cpufreq-memfreq-tbl =
+				<  300000  200000 >,
+				<  691200  451000 >,
+				< 1190400  547000 >,
+				< 1459200  768000 >,
+				< 1900800 1017000 >;
+		};
+		ddr5-tbl {
+			qcom,ddr-type = <8>;
+			qcom,cpufreq-memfreq-tbl =
+				<  300000  200000 >,
+				<  691200  451000 >,
+				< 1190400  547000 >,
+				< 1459200  768000 >,
+				< 1900800 1555000 >;
+		}
 	};
 
 	qcom_memlat: qcom,memlat {
@@ -96,7 +113,7 @@ Example:
 			silver_ddr_lat: silver {
 				compatible = "qcom,memlat-mon";
 				qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>;
-				qcom,core-dev-table = <&silver_ddr_tbl>;
+				qcom,cpufreq-memfreq-tbl = <&silver_ddr_tbl>;
 				qcom,sampling-enabled;
 			};
 		};