diff --git a/qcom/lahaina-cdp.dtsi b/qcom/lahaina-cdp.dtsi index e69de29b..c9c8940c 100644 --- a/qcom/lahaina-cdp.dtsi +++ b/qcom/lahaina-cdp.dtsi @@ -0,0 +1 @@ +#include "lahaina-pmic-overlay.dtsi" diff --git a/qcom/lahaina-mtp.dtsi b/qcom/lahaina-mtp.dtsi index e69de29b..c9c8940c 100644 --- a/qcom/lahaina-mtp.dtsi +++ b/qcom/lahaina-mtp.dtsi @@ -0,0 +1 @@ +#include "lahaina-pmic-overlay.dtsi" diff --git a/qcom/lahaina-pmic-overlay.dtsi b/qcom/lahaina-pmic-overlay.dtsi new file mode 100644 index 00000000..e01ee245 --- /dev/null +++ b/qcom/lahaina-pmic-overlay.dtsi @@ -0,0 +1,8 @@ +#include + +#include "pmk8350.dtsi" +#include "pm8350.dtsi" +#include "pm8350c.dtsi" +#include "pm8350b.dtsi" +#include "pmr735a.dtsi" +#include "pmr735b.dtsi" diff --git a/qcom/lahaina-qrd.dtsi b/qcom/lahaina-qrd.dtsi index e69de29b..c9c8940c 100644 --- a/qcom/lahaina-qrd.dtsi +++ b/qcom/lahaina-qrd.dtsi @@ -0,0 +1 @@ +#include "lahaina-pmic-overlay.dtsi" diff --git a/qcom/lahaina-rumi.dtsi b/qcom/lahaina-rumi.dtsi index baf5e635..268916be 100644 --- a/qcom/lahaina-rumi.dtsi +++ b/qcom/lahaina-rumi.dtsi @@ -1,4 +1,5 @@ #include "lahaina.dtsi" +#include "lahaina-pmic-overlay.dtsi" &ufsphy_mem { compatible = "qcom,ufs-phy-qrbtc-sdm845"; diff --git a/qcom/lahaina.dtsi b/qcom/lahaina.dtsi index 186edb98..b58c7b57 100644 --- a/qcom/lahaina.dtsi +++ b/qcom/lahaina.dtsi @@ -874,6 +874,9 @@ qcom,retain-regs; }; + thermal_zones: thermal-zones { + }; + cache-controller@9200000 { compatible = "qcom,lahaina-llcc", "qcom,llcc-v2"; reg = <0x9200000 0x1d0000> , <0x9600000 0x50000>; diff --git a/qcom/pm8350.dtsi b/qcom/pm8350.dtsi new file mode 100644 index 00000000..1b79409a --- /dev/null +++ b/qcom/pm8350.dtsi @@ -0,0 +1,61 @@ +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pm8350@1 { + compatible = "qcom,spmi-pmic"; + reg = <1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8350_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x1 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm8350_gpios: pinctrl@8800 { + compatible = "qcom,pm8350-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm8350_temp_alarm: pm8350_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8350_tz>; + + trips { + pm8350_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350_trip2: trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/qcom/pm8350b.dtsi b/qcom/pm8350b.dtsi new file mode 100644 index 00000000..aeeb5680 --- /dev/null +++ b/qcom/pm8350b.dtsi @@ -0,0 +1,61 @@ +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pm8350b@3 { + compatible = "qcom,spmi-pmic"; + reg = <3 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8350b_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x3 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm8350b_gpios: pinctrl@8800 { + compatible = "qcom,pm8350b-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm8350b_temp_alarm: pm8350b_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8350b_tz>; + + trips { + pm8350b_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350b_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350b_trip2: trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/qcom/pm8350c.dtsi b/qcom/pm8350c.dtsi new file mode 100644 index 00000000..ed51205a --- /dev/null +++ b/qcom/pm8350c.dtsi @@ -0,0 +1,61 @@ +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pm8350c@2 { + compatible = "qcom,spmi-pmic"; + reg = <2 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pm8350c_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x2 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pm8350c_gpios: pinctrl@8800 { + compatible = "qcom,pm8350c-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pm8350c_temp_alarm: pm8350c_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pm8350c_tz>; + + trips { + pm8350c_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350c_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + pm8350c_trip2: trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/qcom/pmk8350.dtsi b/qcom/pmk8350.dtsi new file mode 100644 index 00000000..355dedbd --- /dev/null +++ b/qcom/pmk8350.dtsi @@ -0,0 +1,38 @@ +#include +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pmk8350@0 { + compatible = "qcom,spmi-pmic"; + reg = <0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8350_sdam_2: sdam@7100 { + compatible = "qcom,spmi-sdam"; + reg = <0x7100>; + }; + + pmk8350_gpios: pinctrl@b000 { + compatible = "qcom,pmk8350-gpio"; + reg = <0xb000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + + pmk8350_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + }; + }; +}; diff --git a/qcom/pmr735a.dtsi b/qcom/pmr735a.dtsi new file mode 100644 index 00000000..3e8ca911 --- /dev/null +++ b/qcom/pmr735a.dtsi @@ -0,0 +1,61 @@ +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pmr735a@4 { + compatible = "qcom,spmi-pmic"; + reg = <4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmr735a_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x4 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmr735a_gpios: pinctrl@8800 { + compatible = "qcom,pmr735a-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pmr735a_temp_alarm: pmr735a_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pmr735a_tz>; + + trips { + pmr735a_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pmr735a_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + pmr735a_trip2: trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +}; diff --git a/qcom/pmr735b.dtsi b/qcom/pmr735b.dtsi new file mode 100644 index 00000000..b1050bf0 --- /dev/null +++ b/qcom/pmr735b.dtsi @@ -0,0 +1,61 @@ +#include +#include + +&spmi_bus { + #address-cells = <2>; + #size-cells = <0>; + interrupt-controller; + #interrupt-cells = <4>; + + qcom,pmr735b@5 { + compatible = "qcom,spmi-pmic"; + reg = <5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmr735b_tz: qcom,temp-alarm@a00 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0xa00>; + interrupts = <0x5 0xa 0x0 IRQ_TYPE_EDGE_BOTH>; + #thermal-sensor-cells = <0>; + }; + + pmr735b_gpios: pinctrl@8800 { + compatible = "qcom,pmr735b-gpio"; + reg = <0x8800>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +}; + +&thermal_zones { + pmr735b_temp_alarm: pmr735b_tz { + polling-delay-passive = <100>; + polling-delay = <0>; + thermal-governor = "step_wise"; + thermal-sensors = <&pmr735b_tz>; + + trips { + pmr735b_trip0: trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + pmr735b_trip1: trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "passive"; + }; + + pmr735b_trip2: trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "passive"; + }; + }; + }; +};