From 23ea51fb4afc075a45f76ad6fd5ba5afa37ce358 Mon Sep 17 00:00:00 2001 From: Shivnandan Kumar Date: Wed, 5 Jan 2022 21:22:18 +0530 Subject: [PATCH] ARM: dts: msm: Add initial DCVS devices for parrot Add initial set of DCVS device nodes for parrot. This includes the QCOM DCVS devices and fast path, PMU device nodes, memlat device nodes and mapping tables, and bwmon device nodes. Change-Id: I56c99cb1c15f0ea1825ddc61e86c47f890b41b49 --- qcom/parrot.dtsi | 320 +++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 320 insertions(+) diff --git a/qcom/parrot.dtsi b/qcom/parrot.dtsi index 4d90fc6c..d3ad9fa1 100644 --- a/qcom/parrot.dtsi +++ b/qcom/parrot.dtsi @@ -37,6 +37,19 @@ serial0 = &qupv3_se3_2uart; }; + sram: sram@17D09400 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "mmio-sram"; + reg = <0x0 0x17D09400 0x0 0x400>; + ranges = <0x0 0x0 0x0 0x17D09400 0x0 0x400>; + + cpu_scp_lpri: scp-shmem@0 { + compatible = "arm,scp-shmem"; + reg = <0x0 0x0 0x0 0x400>; + }; + }; + firmware: firmware {}; cpus { @@ -449,6 +462,11 @@ apps_bcm_voter: bcm_voter { compatible = "qcom,bcm-voter"; }; + + dcvs_fp: qcom,dcvs-fp { + compatible = "qcom,dcvs-fp"; + qcom,ddr-bcm-name = "MC3"; + }; }; pdc: interrupt-controller@b220000 { @@ -537,6 +555,31 @@ }; }; + rimps: qcom,rimps@17400000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "qcom,rimps"; + reg = <0x17400000 0x10>, + <0x17d90000 0x2000>; + #mbox-cells = <1>; + interrupts = ; + }; + + scmi: qcom,scmi { + #address-cells = <1>; + #size-cells = <0>; + compatible = "arm,scmi"; + mboxes = <&rimps 0>; + mbox-names = "tx"; + shmem = <&cpu_scp_lpri>; + }; + + rimps_log: qcom,rimps_log@17d09c00 { + compatible = "qcom,rimps-log"; + reg = <0x17d09c00 0x200>, <0x17d09e00 0x200>; + mboxes = <&rimps 1>; + }; + ipcc_mproc: qcom,ipcc@ed18000 { compatible = "qcom,ipcc"; reg = <0xed18000 0x1000>; @@ -952,6 +995,283 @@ }; }; + qcom_pmu: qcom,pmu { + compatible = "qcom,pmu"; + qcom,pmu-events-tbl = + < 0x0008 0xFF 0xFF 0xFF >, + < 0x0011 0xFF 0xFF 0xFF >, + < 0x0017 0xFF 0xFF 0xFF >, + < 0x0018 0xFF 0xFF 0xFF >, + < 0x002A 0xFF 0xFF 0xFF >, + < 0x002B 0xFF 0xFF 0xFF >; + }; + + ddr_freq_table: ddr-freq-table { + ddr4 { + qcom,ddr-type = <7>; + qcom,freq-tbl = + < 547000 >, + < 768000 >, + < 1017000 >, + < 1353600 >, + < 1555000 >, + < 1708000 >, + < 2092000 >; + }; + + ddr5 { + qcom,ddr-type = <8>; + qcom,freq-tbl = + < 547000 >, + < 768000 >, + < 1555000 >, + < 1708000 >, + < 2092000 >, + < 2736000 >, + < 3196000 >; + }; + }; + + ddrqos_freq_table: ddrqos-freq-table { + qcom,freq-tbl = + < 0 >, + < 1 >; + }; + + qcom_dcvs: qcom,dcvs { + compatible = "qcom,dcvs"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + qcom_l3_dcvs_hw: l3 { + compatible = "qcom,dcvs-hw"; + qcom,dcvs-hw-type = <2>; + qcom,bus-width = <32>; + reg = <0x17d90000 0x4000>, <0x17d90100 0xa0>; + reg-names = "l3-base", "l3tbl-base"; + + l3_dcvs_sp: sp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <0>; + qcom,shared-offset = <0x0090>; + }; + }; + + qcom_ddr_dcvs_hw: ddr { + compatible = "qcom,dcvs-hw"; + qcom,dcvs-hw-type = <0>; + qcom,bus-width = <4>; + qcom,freq-tbl = <&ddr_freq_table>; + + ddr_dcvs_sp: sp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <0>; + interconnects = <&gem_noc MASTER_APPSS_PROC + &mc_virt SLAVE_EBI1>; + }; + + ddr_dcvs_fp: fp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <1>; + qcom,fp-voter = <&dcvs_fp>; + }; + + }; + + qcom_ddrqos_dcvs_hw: ddrqos { + compatible = "qcom,dcvs-hw"; + qcom,dcvs-hw-type = <3>; + qcom,bus-width = <1>; + qcom,freq-tbl = <&ddrqos_freq_table>; + + ddrqos_dcvs_sp: sp { + compatible = "qcom,dcvs-path"; + qcom,dcvs-path-type = <0>; + interconnects = <&gem_noc MASTER_APPSS_PROC + &mc_virt SLAVE_EBI1>; + }; + }; + }; + + qcom_memlat: qcom,memlat { + compatible = "qcom,memlat"; + + ddr { + compatible = "qcom,memlat-grp"; + qcom,target-dev = <&qcom_ddr_dcvs_hw>; + qcom,sampling-path = <&ddr_dcvs_fp>; + qcom,miss-ev = <0x2A>; + + silver { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; + qcom,sampling-enabled; + ddr4-tbl { + qcom,ddr-type = <7>; + qcom,cpufreq-memfreq-tbl = + < 1113600 547000 >, + < 1497600 768000 >, + < 1804800 1017000 >; + }; + + ddr5-tbl { + qcom,ddr-type = <8>; + qcom,cpufreq-memfreq-tbl = + < 1113600 547000 >, + < 1497600 768000 >, + < 1804800 1555000 >; + }; + }; + + gold { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; + qcom,sampling-enabled; + ddr4-tbl { + qcom,ddr-type = <7>; + qcom,cpufreq-memfreq-tbl = + < 960000 547000 >, + < 1190400 1017000 >, + < 1497600 1353600 >, + < 1651200 1555000 >, + < 2131200 1708000 >, + < 2361600 2092000 >; + }; + + ddr5-tbl { + qcom,ddr-type = <8>; + qcom,cpufreq-memfreq-tbl = + < 960000 547000 >, + < 1651200 1555000 >, + < 1900800 1708000 >, + < 2131200 2092000 >, + < 2361600 3196000 >; + }; + }; + + silver-compute { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; + qcom,sampling-enabled; + qcom,compute-mon; + ddr4-tbl { + qcom,ddr-type = <7>; + qcom,cpufreq-memfreq-tbl = + < 1113600 451000 >, + < 1497600 547000 >, + < 1804800 768000 >; + }; + + ddr5-tbl { + qcom,ddr-type = <8>; + qcom,cpufreq-memfreq-tbl = + < 1113600 451000 >, + < 1497600 547000 >, + < 1804800 768000 >; + }; + }; + + gold-compute { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; + qcom,sampling-enabled; + qcom,compute-mon; + ddr4-tbl { + qcom,ddr-type = <7>; + qcom,cpufreq-memfreq-tbl = + < 1190400 547000 >, + < 1497600 768000 >, + < 1651200 1017000 >, + < 1900800 1555000 >, + < 2131200 1708000 >, + < 2361600 2092000 >; + }; + + ddr5-tbl { + qcom,ddr-type = <8>; + qcom,cpufreq-memfreq-tbl = + < 1190400 547000 >, + < 1497600 768000 >, + < 1651200 1017000 >, + < 2054400 1555000 >, + < 2131200 1708000 >, + < 2361600 2092000 >; + }; + }; + + }; + + l3 { + compatible = "qcom,memlat-grp"; + qcom,target-dev = <&qcom_l3_dcvs_hw>; + qcom,sampling-path = <&l3_dcvs_sp>; + qcom,miss-ev = <0x17>; + qcom,wb-ev = <0x18>; + qcom,access-ev = <0x2B>; + + silver { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU0 &CPU1 &CPU2 &CPU3>; + qcom,cpufreq-memfreq-tbl = + < 300000 300000 >, + < 691200 556800 >, + < 806400 652800 >, + < 940800 806400 >, + < 1113600 940800 >, + < 1324800 1065600 >, + < 1497600 1190400 >, + < 1651200 1248000 >, + < 1804800 1420800 >, + < 1958400 1440000 >; + qcom,sampling-enabled; + }; + + gold { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 960000 556800 >, + < 1190400 806400 >, + < 1344000 940800 >, + < 1651200 1190400 >, + < 1900800 1382400 >, + < 2054400 1420800 >, + < 2361600 1440000 >; + qcom,sampling-enabled; + }; + + }; + + ddrqos { + compatible = "qcom,memlat-grp"; + qcom,target-dev = <&qcom_ddrqos_dcvs_hw>; + qcom,sampling-path = <&ddrqos_dcvs_sp>; + qcom,miss-ev = <0x2A>; + + ddrqos_gold_lat: gold { + compatible = "qcom,memlat-mon"; + qcom,cpulist = <&CPU4 &CPU5 &CPU6 &CPU7>; + qcom,cpufreq-memfreq-tbl = + < 300000 0 >, + < 3000000 1 >; + qcom,sampling-enabled; + }; + + }; + }; + + bwmon_ddr: qcom,bwmon-ddr@190b6400 { + compatible = "qcom,bwmon4"; + reg = <0x190b6400 0x300>, <0x190b6300 0x200>; + reg-names = "base", "global_base"; + interrupts = ; + qcom,mport = <0>; + qcom,hw-timer-hz = <19200000>; + qcom,count-unit = <0x10000>; + qcom,target-dev = <&qcom_ddr_dcvs_hw>; + }; + sdhc_1: sdhci@7C4000 { status = "disabled";