From ffd5c8d97bfefc05d580c9c3596d83607c326b58 Mon Sep 17 00:00:00 2001 From: Mahesh Sharma Date: Mon, 10 Feb 2020 11:10:41 -0800 Subject: [PATCH] ARM: dts: msm: Add fix for SW_CTRL mapped to wrong GPIO66 on MSM side GPIO66 is mapped wrongly on MSM side causing SW_CTRL not able to send signal to go clock ON. Fix is to overlay default configuration by adding new changes which votes for RPMH_RF_CLK3 and disables retention mode. Change-Id: I05414d92979c6eb5fe437683711ebf76ef2a8e86 --- qcom/lahaina-mtp-hsp.dtsi | 9 +++++++++ qcom/lahaina-qrd-hsp.dtsi | 9 +++++++++ 2 files changed, 18 insertions(+) diff --git a/qcom/lahaina-mtp-hsp.dtsi b/qcom/lahaina-mtp-hsp.dtsi index 80a069ee..a325b4dc 100644 --- a/qcom/lahaina-mtp-hsp.dtsi +++ b/qcom/lahaina-mtp-hsp.dtsi @@ -11,3 +11,12 @@ clocks = <&clock_rpmh RPMH_RF_CLK3>; clock-names = "rf_clk"; }; + +&bluetooth { + qcom,bt-vdd-aon-config = <950000 950000 0 0>; + qcom,bt-vdd-dig-config = <950000 950000 0 0>; + qcom,bt-vdd-rfa1-config = <1900000 1900000 0 0>; + qcom,bt-vdd-rfa2-config = <1256000 1256000 0 0>; + clocks = <&clock_rpmh RPMH_RF_CLK3>; + clock-names = "ref3_clk"; +}; diff --git a/qcom/lahaina-qrd-hsp.dtsi b/qcom/lahaina-qrd-hsp.dtsi index fbeb4a81..ec6b4aa0 100644 --- a/qcom/lahaina-qrd-hsp.dtsi +++ b/qcom/lahaina-qrd-hsp.dtsi @@ -11,3 +11,12 @@ clocks = <&clock_rpmh RPMH_RF_CLK3>; clock-names = "rf_clk"; }; + +&bluetooth { + qcom,bt-vdd-aon-config = <950000 950000 0 0>; + qcom,bt-vdd-dig-config = <950000 950000 0 0>; + qcom,bt-vdd-rfa1-config = <1900000 1900000 0 0>; + qcom,bt-vdd-rfa2-config = <1256000 1256000 0 0>; + clocks = <&clock_rpmh RPMH_RF_CLK3>; + clock-names = "ref3_clk"; +};