Add a description for the "qcom,mid" property which corresponds
to the SPMI master ID of the SPMI PMIC arbiter controller. It is
most useful in systems with multiple masters, e.g. when there are
multiple SoCs connected to a single SPMI bus.
Change-Id: I376e6f569f9bbea44ba3930480a330fb1dd2c2de
Add a definition for the qcom,fuse-enable-bit property which can
be used to specify a fuse bit that enables instead of disables
SPMI PMIC arbiter debug bus hardware.
Change-Id: Ic139719b4dc806f22dda44004f916e8a6402e429
Add a definition for the qcom,bus-id property which is used on
PMIC arbiter 7 to specify which SPMI bus interface to use (i.e.
the primary or secondary one).
Change-Id: I8249e43b34a980567e9073a2c2756532b0f1f258
Add a definition for the qcom,pmic-arb property which can be used
by consumer devices to reference an spmi-pmic-arb device.
Change-Id: Ib891890c4892446aff1c5d4cba133efd6f239b9e
Mark all interrupt related properties as optional instead of
required. Some boards do not required PMIC IRQ support and it
isn't needed to handle SPMI bus transactions, so specify it as
optional.
Change-Id: I8aa0f1ef165b9e6ee0fe7bf00e45612ea1779e21
Add binding documentation for the Qualcomm Technologies, Inc.
Glink SPMI debug controller device. This device provides an
interface to read and write PMIC registers over PMIC Glink using
a remote subsytem (e.g. DSP). This allows for debugging PMIC
peripherals that would typically only be accessible to the
charger and fuel gauging firmware running on the remote
subsystem.
Change-Id: I1779c7841dfed8e49c07705d6803b7aad196c4d4
Add binding documentation for the SPMI debug bus found on SPMI
PMIC arbiter version 5 and above. This debug bus has read and
write access to all PMIC peripherals regardless of ownership
configurations. It cannot be used on production devices because
it is disabled by an eFuse.
Change-Id: I344ddea23ecb09bede5cbdb19197ab52b24dda44
