mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 08:51:30 +00:00
01d339a1ab
Remove sol gpio config parameters from neo as the firmware doesn't have SOL support yet. Change-Id: I2b0d66f57c935a88b4a38b835363ed0aa8d97bf9 CRs-Fixed: 3472469
422 lines
8.5 KiB
Plaintext
422 lines
8.5 KiB
Plaintext
#include "neo.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. NEO-LA";
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qcom,msm-id = <554 0x10000>;
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};
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&chosen {
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bootargs = "console=ttyMSM0,115200n8 loglevel=6 log_buf_len=256K kernel.panic_on_rcu_stall=1 loop.max_part=7 pcie_ports=compat service_locator.enable=1 msm_rtb.filter=0x237 allow_mismatched_32bit_el0 kasan=off rcupdate.rcu_expedited=1 rcu_nocbs=0-7 pstore.compress=none kpti=off swiotlb=noforce cgroup.memory=nokmem,nosocket allow_file_spec_access cpufreq.default_governor=performance disable_dma32=on ftrace_dump_on_oops";
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stdout-path = "/soc/qcom,qup_uart@994000:115200n8";
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};
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&gpu_cc_gx_gdsc {
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/*
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* Clocks uses GFX as its parent supply delete it as
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* its not required on neo_la.
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*/
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/delete-property/ parent-supply;
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};
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&apps_rsc {
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/* Delete GFX rail as it is not required on neo_la platform. */
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/delete-node/ rpmh-regulator-gfxlvl;
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rpmh-regulator-mxclvl {
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/delete-node/ regulator-pm8150-s8-gfx-voter-level;
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};
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rpmh-regulator-smpa2 {
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compatible = "qcom,rpmh-vrm-regulator";
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qcom,resource-name = "smpa2";
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S2A: pm8150_s2: regulator-pm8150-s2 {
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regulator-name = "pm8150_s2";
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qcom,set = <RPMH_REGULATOR_SET_ALL>;
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regulator-min-microvolt = <465000>;
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regulator-max-microvolt = <1004000>;
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qcom,init-voltage = <465000>;
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};
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};
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};
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&firmware {
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qcom_scm {
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compatible = "qcom,scm";
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};
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android {
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compatible = "android,firmware";
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vbmeta {
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compatible = "android,vbmeta";
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parts = "vbmeta,boot,system,vendor,dtbo,recovery";
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};
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fstab {
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compatible = "android,fstab";
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vendor {
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compatible = "android,vendor";
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dev = "/dev/block/platform/soc/7c4000.sdhci/by-name/vendor";
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type = "ext4";
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mnt_flags = "ro,barrier=1,discard";
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fsmgr_flags = "wait,slotselect,,avb";
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status = "ok";
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};
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};
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};
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};
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&reserved_memory {
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cnss_wlan_mem: cnss_wlan_region {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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};
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};
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&lsr_lefteye_dma_buf {
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status = "disabled";
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};
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&lsr_righteye_dma_buf {
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status = "disabled";
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};
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&lsr_depth_dma_buf {
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status = "disabled";
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};
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&lsr_misc_dma_buf {
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status = "disabled";
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};
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&lsr_lefteye_mem_heap {
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status = "disabled";
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};
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&lsr_righteye_mem_heap {
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status = "disabled";
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};
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&lsr_depth_mem_heap {
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status = "disabled";
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};
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&lsr_misc_mem_heap {
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status = "disabled";
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};
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&pcie0 {
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status = "ok";
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};
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&cnss_pins {
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cnss_wlan_en_active: cnss_wlan_en_active {
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mux {
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pins = "gpio45";
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function = "gpio";
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};
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config {
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pins = "gpio45";
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drive-strength = <16>;
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output-high;
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bias-pull-up;
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};
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};
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cnss_wlan_en_sleep: cnss_wlan_en_sleep {
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mux {
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pins = "gpio45";
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function = "gpio";
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};
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config {
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pins = "gpio45";
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drive-strength = <2>;
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output-low;
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bias-pull-down;
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};
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};
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};
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&soc {
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wlan_kiwi: qcom,cnss-kiwi@b0000000 {
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compatible = "qcom,cnss-kiwi";
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reg = <0xb0000000 0x10000>;
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reg-names = "smmu_iova_ipa";
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wlan-en-gpio = <&tlmm 45 0>;
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pinctrl-names = "wlan_en_active", "wlan_en_sleep";
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pinctrl-0 = <&cnss_wlan_en_active>;
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pinctrl-1 = <&cnss_wlan_en_sleep>;
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qcom,wlan;
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qcom,wlan-rc-num = <0>;
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qcom,wlan-ramdump-dynamic = <0x780000>;
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qcom,wlan-cbc-enabled;
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use-pm-domain;
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qcom,same-dt-multi-dev;
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mboxes = <&qmp_aop 0>;
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vdd-wlan-io-supply = <&L15A>;
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qcom,vdd-wlan-io-config = <1800000 2000000 0 0 1>;
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vdd-wlan-supply = <&S2A>;
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qcom,vdd-wlan-config = <1000000 1004000 0 0 1>;
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vdd-wlan-aon-supply = <&S4A>;
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qcom,vdd-wlan-aon-config = <980000 1170000 0 0 1>;
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vdd-wlan-dig-supply = <&S5A>;
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qcom,vdd-wlan-dig-config = <1900000 2040000 0 0 1>;
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interconnects =
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<&pcie_noc MASTER_PCIE_0 &pcie_noc SLAVE_ANOC_PCIE_GEM_NOC>,
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<&gem_noc MASTER_ANOC_PCIE_GEM_NOC &mc_virt SLAVE_EBI1>;
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interconnect-names = "pcie_to_memnoc", "memnoc_to_ddr";
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qcom,icc-path-count = <2>;
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qcom,bus-bw-cfg-count = <9>;
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qcom,bus-bw-cfg =
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/** ICC Path 1 **/
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<0 0>, /* no vote */
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/* idle: 0-18 Mbps snoc/anoc: 100 Mhz */
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<2250 1600000>,
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/* low: 18-60 Mbps snoc/anoc: 100 Mhz */
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<7500 1600000>,
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/* medium: 60-240 Mbps snoc/anoc: 100 Mhz*/
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<30000 1600000>,
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/* high: 240-1200 Mbps snoc/anoc: 200 Mhz */
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<100000 3200000>,
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/* very high: > 1200 Mbps snoc/anoc: 403 Mhz */
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<175000 6553200>,
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/* ultra high: DBS mode snoc/anoc: 403 Mhz */
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<175000 6553200>,
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/* super high: DBS mode snoc/anoc: 403 Mhz */
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<175000 6553200>,
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/* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */
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<7500 3200000>,
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/** ICC Path 2 **/
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<0 0>,
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/* ddr: 451.2 MHz */
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<2250 902212>,
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/* ddr: 451.2 MHz */
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<7500 902212>,
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/* ddr: 451.2 MHz */
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<30000 902212>,
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/* ddr: 451.2 MHz */
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<100000 902212>,
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/* ddr: 1555 MHz */
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<175000 3110362>,
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/* ddr: 2092 MHz */
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<175000 4185562>,
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/* ddr: 2133 MHz */
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<175000 4300537>,
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/* ddr: 547.2 MHz */
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<7500 1094362>;
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qcom,pmu_vreg_map =
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"VDD095_MX_PMU", "s4a",
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"VDD095_PMU", "s2a",
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"VDD_PMU_AON_I", "s4a",
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"VDD095_PMU_BT", "s4a",
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"VDD09_PMU_RFA_I", "s4a",
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"VDD19_PMU_PCIE_I", "s5a",
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"VDD19_PMU_RFA_I", "s5a";
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qcom,vreg_pdc_map =
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"s4a", "rf", "s5a", "rf", "l15a", "rf", "s2a", "bb";
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qcom,pdc_init_table =
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" {class: wlan_pdc, ss: rf, res: s4a.v, upval: 1012}",
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" {class: wlan_pdc, ss: rf, res: s4a.v, dwnval: 615}",
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" {class: wlan_pdc, ss: rf, res: s5a.v, upval: 1900}",
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" {class: wlan_pdc, ss: rf, res: s5a.v, dwnval: 1825}",
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" {class: wlan_pdc, ss: bb, res: s2a.v, upval: 830}",
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" {class: wlan_pdc, ss: bb, res: s2a.v, dwnval: 410}",
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" {class: wlan_pdc, ss: bb, res: pdc, enable: 1}";
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cnss_cdev_apss: qcom,cnss_cdev1 {
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#cooling-cells = <2>;
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};
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};
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bluetooth: bt_wcn6x5x {
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compatible = "qcom,kiwi";
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pinctrl-names = "default";
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pinctrl-0 = <&bt_en_sleep>;
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qcom,bt-vdd18-aon-supply = <&L15A>; /* BT VDD1.8 AON */
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qcom,bt-vdd-dig-supply = <&S4A>; /* BT LDO*/
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qcom,bt-vdd-aon-supply = <&S4A>; /* BT AON LDO*/
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qcom,bt-vdd-rfaOp8_supply = <&S4A>; /* BT RFAOp8 CMN LDO*/
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qcom,bt-vdd-rfa2-supply = <&S5A>; /* BT RFA1.8 LDO */
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qcom,bt-vdd18-aon-config = <1800000 1800000 0 1>;
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qcom,bt-vdd-aon-config = <950000 1170000 0 1>;
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qcom,bt-vdd-dig-config = <950000 1170000 0 1>;
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qcom,bt-vdd-rfaOp8-config = <950000 1170000 0 1>;
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qcom,bt-vdd-rfa2-config = <1900000 1900000 0 1>;
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};
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};
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&pcie0_rp {
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#address-cells = <5>;
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#size-cells = <0>;
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cnss_pci: cnss_pci {
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reg = <0 0 0 0 0>;
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qcom,iommu-group = <&cnss_pci_iommu_group1>;
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memory-region = <&cnss_wlan_mem>;
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#address-cells = <1>;
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#size-cells = <1>;
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cnss_pci_iommu_group1: cnss_pci_iommu_group1 {
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qcom,iommu-msi-size = <0x1000>;
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qcom,iommu-dma-addr-pool = <0xa0000000 0x10000000>;
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qcom,iommu-dma = "fastmap";
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qcom,iommu-pagetable = "coherent";
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qcom,iommu-faults = "stall-disable", "HUPCF", "no-CFRE",
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"non-fatal";
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};
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};
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};
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&qcom_memlat {
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ddr {
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silver {
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qcom,cpufreq-memfreq-tbl =
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< 940800 451000 >,
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< 1113600 547000 >,
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< 1497600 768000 >,
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< 1804800 1017000 >;
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};
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silver-compute {
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qcom,cpufreq-memfreq-tbl =
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< 1113600 451000 >,
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< 1497600 547000 >,
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< 1804800 768000 >;
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};
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};
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llcc {
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silver {
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qcom,cpufreq-memfreq-tbl =
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< 1497600 300000 >,
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< 1804800 466000 >,
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< 1996800 600000 >;
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};
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};
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l3 {
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silver {
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qcom,cpufreq-memfreq-tbl =
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< 691200 556800 >,
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< 940800 768000 >,
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< 1113600 940800 >,
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< 1497600 1190400 >,
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< 1804800 1516800 >;
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};
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};
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};
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&mc_virt {
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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&mmss_noc {
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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&gem_noc {
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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};
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#include "neo_la-reserved-memory.dtsi"
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&kgsl_smmu {
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status = "disabled";
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};
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&gpucc {
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status = "disabled";
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};
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&dispcc {
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status = "disabled";
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};
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&debugcc {
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/delete-property/ qcom,gpucc;
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/delete-property/ qcom,dispcc;
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clock-names = "xo_clk_src",
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"gcc",
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"videocc",
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"camcc";
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clocks = <&rpmhcc RPMH_CXO_CLK>,
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<&gcc 0>,
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<&videocc 0>,
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<&camcc 0>;
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};
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&slim_msm {
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status = "ok";
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};
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&gpu_cc_cx_gdsc {
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status = "disabled";
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};
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&gpu_cc_gx_gdsc {
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status = "disabled";
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};
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&disp_cc_mdss_core_gdsc {
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status = "disabled";
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};
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&disp_cc_mdss_core_int2_gdsc {
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status = "disabled";
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};
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&msm_gpu {
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status = "disabled";
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};
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&kgsl_msm_iommu {
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status = "disabled";
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};
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&gmu {
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status = "disabled";
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};
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&mdp_0_tbu {
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status = "disabled";
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};
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&mdp_1_tbu {
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status = "disabled";
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};
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&lsr_0_tbu {
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status = "disabled";
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};
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&lsr_1_tbu {
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status = "disabled";
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};
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&wpss_etm {
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status = "disabled";
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};
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&qcom_cedev {
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status = "disabled";
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};
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