mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
c370aad7c7
Device node changes required on shima describing the GPIO configuration for Nfc controller chip. Modified corresponding Nfc device node for IDP & QRD platforms. Change-Id: I122dc7b27204705309f6e0e667cda3410703a09d
3101 lines
54 KiB
Plaintext
3101 lines
54 KiB
Plaintext
&soc {
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tlmm: pinctrl@f000000 {
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compatible = "qcom,shima-pinctrl";
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reg = <0x0f000000 0x1000000>;
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interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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wakeup-parent = <&pdc>;
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pcie0 {
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pcie0_perst_default: pcie0_perst_default {
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mux {
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pins = "gpio94";
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function = "gpio";
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};
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config {
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pins = "gpio94";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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pcie0_clkreq_default: pcie0_clkreq_default {
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mux {
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pins = "gpio95";
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function = "pcie0_clkreqn";
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};
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config {
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pins = "gpio95";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_wake_default: pcie0_wake_default {
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mux {
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pins = "gpio96";
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function = "gpio";
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};
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config {
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pins = "gpio96";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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pcie0_clkreq_sleep: pcie0_clkreq_sleep {
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mux {
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pins = "gpio95";
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function = "gpio";
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};
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config {
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pins = "gpio95";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
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qupv3_se8_i2c_active: qupv3_se8_i2c_active {
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mux {
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pins = "gpio56", "gpio57";
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function = "qup8";
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};
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config {
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pins = "gpio56", "gpio57";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
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mux {
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pins = "gpio56", "gpio57";
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function = "gpio";
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};
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config {
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pins = "gpio56", "gpio57";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se8_spi_pins: qupv3_se8_spi_pins {
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qupv3_se8_spi_active: qupv3_se8_spi_active {
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mux {
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pins = "gpio56", "gpio57",
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"gpio58", "gpio59";
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function = "qup8";
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};
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config {
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pins = "gpio56", "gpio57",
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"gpio58", "gpio59";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
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mux {
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pins = "gpio56", "gpio57",
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"gpio58", "gpio59";
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function = "gpio";
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};
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config {
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pins = "gpio56", "gpio57",
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"gpio58", "gpio59";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
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qupv3_se9_i2c_active: qupv3_se9_i2c_active {
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mux {
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pins = "gpio60", "gpio61";
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function = "qup9";
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};
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config {
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pins = "gpio60", "gpio61";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
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mux {
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pins = "gpio60", "gpio61";
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function = "gpio";
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};
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config {
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pins = "gpio60", "gpio61";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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nfc {
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nfc_int_active: nfc_int_active {
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/* active state */
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mux {
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/* GPIO 87: NFC Read Interrupt */
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pins = "gpio87";
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function = "gpio";
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};
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config {
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pins = "gpio87";
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drive-strength = <2>; /* 2 MA */
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bias-pull-down;
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};
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};
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nfc_int_suspend: nfc_int_suspend {
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/* sleep state */
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mux {
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/* GPIO 87: NFC Read Interrupt */
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pins = "gpio87";
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function = "gpio";
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};
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config {
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pins = "gpio87";
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drive-strength = <2>; /* 2 MA */
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bias-pull-down;
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};
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};
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nfc_enable_active: nfc_enable_active {
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mux {
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/* 62: Enable,86: Firmware,63: CLOCK */
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pins = "gpio62", "gpio86", "gpio63";
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function = "gpio";
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};
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config {
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pins = "gpio62", "gpio86", "gpio63";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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nfc_enable_suspend: nfc_enable_suspend {
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mux {
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/* 62: Enable,86: Firmware,63: CLOCK */
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pins = "gpio62", "gpio86", "gpio63";
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function = "gpio";
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};
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config {
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pins = "gpio62", "gpio86", "gpio63";
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drive-strength = <2>; /* 2 MA */
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bias-disable;
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};
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};
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};
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qupv3_se9_spi_pins: qupv3_se9_spi_pins {
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qupv3_se9_spi_active: qupv3_se9_spi_active {
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mux {
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pins = "gpio60", "gpio61",
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"gpio62", "gpio63";
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function = "qup9";
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};
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config {
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pins = "gpio60", "gpio61",
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"gpio62", "gpio63";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
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mux {
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pins = "gpio60", "gpio61",
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"gpio62", "gpio63";
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function = "gpio";
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};
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config {
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pins = "gpio60", "gpio61",
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"gpio62", "gpio63";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
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qupv3_se10_i2c_active: qupv3_se10_i2c_active {
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mux {
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pins = "gpio20", "gpio21";
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function = "qup10";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
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mux {
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pins = "gpio20", "gpio21";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se10_spi_pins: qupv3_se10_spi_pins {
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qupv3_se10_spi_active: qupv3_se10_spi_active {
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mux {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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function = "qup10";
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};
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config {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
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mux {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio20", "gpio21",
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"gpio22", "gpio23";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
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qupv3_se11_i2c_active: qupv3_se11_i2c_active {
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mux {
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pins = "gpio8", "gpio9";
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function = "qup11";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
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mux {
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pins = "gpio8", "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se11_spi_pins: qupv3_se11_spi_pins {
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qupv3_se11_spi_active: qupv3_se11_spi_active {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "qup11";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
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qupv3_se12_i2c_active: qupv3_se12_i2c_active {
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mux {
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pins = "gpio24", "gpio25";
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function = "qup12";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
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mux {
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pins = "gpio24", "gpio25";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se12_spi_pins: qupv3_se12_spi_pins {
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qupv3_se12_spi_active: qupv3_se12_spi_active {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "qup12";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se13_2uart_pins: qupv3_se13_2uart_pins {
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qupv3_se13_2uart_active: qupv3_se13_2uart_active {
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mux {
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pins = "gpio18", "gpio19";
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function = "qup13";
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};
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config {
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pins = "gpio18", "gpio19";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se13_2uart_sleep: qupv3_se13_2uart_sleep {
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mux {
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pins = "gpio18", "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio18", "gpio19";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
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qupv3_se14_i2c_active: qupv3_se14_i2c_active {
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mux {
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pins = "gpio32", "gpio33";
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function = "qup14";
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};
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config {
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pins = "gpio32", "gpio33";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
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mux {
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pins = "gpio32", "gpio33";
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function = "gpio";
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};
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config {
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pins = "gpio32", "gpio33";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se14_spi_pins: qupv3_se14_spi_pins {
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qupv3_se14_spi_active: qupv3_se14_spi_active {
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mux {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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function = "qup14";
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};
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config {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
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mux {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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function = "gpio";
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};
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config {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se15_4uart_pins: qupv3_se15_4uart_pins {
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qupv3_se15_default_cts:
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qupv3_se15_default_cts {
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mux {
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pins = "gpio68";
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function = "gpio";
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};
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config {
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pins = "gpio68";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se15_default_rtsrx:
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qupv3_se15_default_rtsrx {
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mux {
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pins = "gpio69", "gpio71";
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function = "gpio";
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};
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config {
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pins = "gpio69", "gpio71";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se15_default_tx:
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qupv3_se15_default_tx {
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mux {
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pins = "gpio70";
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function = "gpio";
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};
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config {
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pins = "gpio70";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se15_ctsrx: qupv3_se15_ctsrx {
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mux {
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pins = "gpio68", "gpio71";
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function = "qup15";
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};
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config {
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pins = "gpio68", "gpio71";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se15_rts: qupv3_se15_rts {
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mux {
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pins = "gpio69";
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function = "qup15";
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};
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config {
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pins = "gpio69";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se15_tx: qupv3_se15_tx {
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mux {
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pins = "gpio70";
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function = "qup15";
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};
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|
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config {
|
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pins = "gpio70";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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};
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|
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_active: qupv3_se0_i2c_active {
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mux {
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pins = "gpio40", "gpio41";
|
|
function = "qup0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_pins: qupv3_se0_spi_pins {
|
|
qupv3_se0_spi_active: qupv3_se0_spi_active {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "qup0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
|
|
qupv3_se1_i2c_active: qupv3_se1_i2c_active {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "qup1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_pins: qupv3_se1_spi_pins {
|
|
qupv3_se1_spi_active: qupv3_se1_spi_active {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "qup1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
|
|
qupv3_se2_i2c_active: qupv3_se2_i2c_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "qup2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_pins: qupv3_se2_spi_pins {
|
|
qupv3_se2_spi_active: qupv3_se2_spi_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "qup2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
|
|
qupv3_se3_i2c_active: qupv3_se3_i2c_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "qup3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_pins: qupv3_se3_spi_pins {
|
|
qupv3_se3_spi_active: qupv3_se3_spi_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio80";
|
|
function = "qup3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio80";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio80";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio80";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
|
|
qupv3_se4_i2c_active: qupv3_se4_i2c_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "qup4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_pins: qupv3_se4_spi_pins {
|
|
qupv3_se4_spi_active: qupv3_se4_spi_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "qup4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_pins: qupv3_se5_i2c_pins {
|
|
qupv3_se5_i2c_active: qupv3_se5_i2c_active {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "qup5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_i2c_sleep: qupv3_se5_i2c_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_pins: qupv3_se5_spi_pins {
|
|
qupv3_se5_spi_active: qupv3_se5_spi_active {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio3", "gpio2";
|
|
function = "qup5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio3", "gpio2";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se5_spi_sleep: qupv3_se5_spi_sleep {
|
|
mux {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio3", "gpio2";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio0", "gpio1",
|
|
"gpio3", "gpio2";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
|
|
qupv3_se6_i2c_active: qupv3_se6_i2c_active {
|
|
mux {
|
|
pins = "gpio14", "gpio15";
|
|
function = "qup6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
|
|
mux {
|
|
pins = "gpio14", "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_pins: qupv3_se6_spi_pins {
|
|
qupv3_se6_spi_active: qupv3_se6_spi_active {
|
|
mux {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio30", "gpio31";
|
|
function = "qup6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
|
|
mux {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio14", "gpio15",
|
|
"gpio30", "gpio31";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se6_2uart_pins: qupv3_se6_2uart_pins {
|
|
qupv3_se6_default_txrx: qupv3_se6_default_txrx {
|
|
mux {
|
|
pins = "gpio30", "gpio31";
|
|
function = "qup6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_2uart_active: qupv3_se6_2uart_active {
|
|
mux {
|
|
pins = "gpio30", "gpio31";
|
|
function = "qup6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se6_2uart_sleep: qupv3_se6_2uart_sleep {
|
|
mux {
|
|
pins = "gpio30", "gpio31";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio30", "gpio31";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_pins: qupv3_se7_i2c_pins {
|
|
qupv3_se7_i2c_active: qupv3_se7_i2c_active {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "qup7";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_i2c_sleep: qupv3_se7_i2c_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_pins: qupv3_se7_spi_pins {
|
|
qupv3_se7_spi_active: qupv3_se7_spi_active {
|
|
mux {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
function = "qup7";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se7_spi_sleep: qupv3_se7_spi_sleep {
|
|
mux {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio4", "gpio5",
|
|
"gpio6", "gpio7";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_active: cam_sensor_mclk0_active {
|
|
/* MCLK0 */
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
|
|
/* MCLK0 */
|
|
mux {
|
|
pins = "gpio100";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio100";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_active: cam_sensor_mclk1_active {
|
|
/* MCLK1 */
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
|
|
/* MCLK1 */
|
|
mux {
|
|
pins = "gpio101";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio101";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk2_active: cam_sensor_mclk2_active {
|
|
/* MCLK2 */
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend {
|
|
/* MCLK2 */
|
|
mux {
|
|
pins = "gpio102";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio102";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk3_active: cam_sensor_mclk3_active {
|
|
/* MCLK3 */
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend {
|
|
/* MCLK3 */
|
|
mux {
|
|
pins = "gpio103";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio103";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk4_active: cam_sensor_mclk4_active {
|
|
/* MCLK4 */
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk4_suspend: cam_sensor_mclk4_suspend {
|
|
/* MCLK4 */
|
|
mux {
|
|
pins = "gpio104";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio104";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk5_active: cam_sensor_mclk5_active {
|
|
/* MCLK5 */
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_mclk5_suspend: cam_sensor_mclk5_suspend {
|
|
/* MCLK5 */
|
|
mux {
|
|
pins = "gpio105";
|
|
function = "cam_mclk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio105";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pins */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio15";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio15";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n {
|
|
spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n_active: spkr_2_sd_n_active {
|
|
mux {
|
|
pins = "gpio42";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio42";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WCD reset pin */
|
|
wcd938x_reset_active: wcd938x_reset_active {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
wcd938x_reset_sleep: wcd938x_reset_sleep {
|
|
mux {
|
|
pins = "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio35";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_active_rst0: cam_sensor_active_rst0 {
|
|
/* RESET REAR */
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_suspend_rst0: cam_sensor_suspend_rst0 {
|
|
/* RESET REAR */
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_active_rst1: cam_sensor_active_rst1 {
|
|
/* RESET REARAUX */
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_suspend_rst1: cam_sensor_suspend_rst1 {
|
|
/* RESET REARAUX */
|
|
mux {
|
|
pins = "gpio16";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio16";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_active_rst2: cam_sensor_active_rst2 {
|
|
/* RESET 2 */
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 {
|
|
/* RESET 2 */
|
|
mux {
|
|
pins = "gpio106";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio106";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_active_rst3: cam_sensor_active_rst3 {
|
|
/* RESET 3 */
|
|
mux {
|
|
pins = "gpio117";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio117";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 {
|
|
/* RESET 3 */
|
|
mux {
|
|
pins = "gpio117";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio117";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_active_rst4: cam_sensor_active_rst4 {
|
|
/* RESET 4 */
|
|
mux {
|
|
pins = "gpio116";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio116";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_suspend_rst4: cam_sensor_suspend_rst4 {
|
|
/* RESET 4 */
|
|
mux {
|
|
pins = "gpio116";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio116";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
cam_sensor_active_rst5: cam_sensor_active_rst5 {
|
|
/* RESET 5 */
|
|
mux {
|
|
pins = "gpio115";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio115";
|
|
bias-disable; /* No PULL */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cam_sensor_suspend_rst5: cam_sensor_suspend_rst5 {
|
|
/* RESET 5 */
|
|
mux {
|
|
pins = "gpio115";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio115";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
sdc1_on: sdc1_on {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc1_off: sdc1_off {
|
|
clk {
|
|
pins = "sdc1_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc1_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc1_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
rclk {
|
|
pins = "sdc1_rclk";
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
sdc2_on: sdc2_on {
|
|
clk {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <16>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <10>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio92";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
sdc2_off: sdc2_off {
|
|
clk {
|
|
pins = "sdc2_clk";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
cmd {
|
|
pins = "sdc2_cmd";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
data {
|
|
pins = "sdc2_data";
|
|
bias-pull-up;
|
|
drive-strength = <2>;
|
|
};
|
|
|
|
sd-cd {
|
|
pins = "gpio92";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
cci0_active: cci0_active {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio107","gpio108"; // Only 2
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107","gpio108";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci0_suspend: cci0_suspend {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio107","gpio108";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio107","gpio108";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_active: cci1_active {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio109","gpio110";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio109","gpio110";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci1_suspend: cci1_suspend {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio109","gpio110";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio109","gpio110";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci2_active: cci2_active {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio111","gpio112";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio111","gpio112";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci2_suspend: cci2_suspend {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio111","gpio112";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio111","gpio112";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci3_active: cci3_active {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio113","gpio114";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio113","gpio114";
|
|
bias-pull-up; /* PULL UP*/
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
};
|
|
|
|
cci3_suspend: cci3_suspend {
|
|
mux {
|
|
/* CLK, DATA */
|
|
pins = "gpio113","gpio114";
|
|
function = "cci_i2c";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio113","gpio114";
|
|
bias-pull-down; /* PULL DOWN */
|
|
drive-strength = <2>; /* 2 MA */
|
|
};
|
|
|
|
};
|
|
|
|
pri_aux_pcm_clk {
|
|
pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_sync {
|
|
pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_din {
|
|
pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_din_active: pri_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_dout {
|
|
pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm {
|
|
sec_aux_pcm_clk_sleep: sec_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_clk_active: sec_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "mi2s1_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_ws_sleep: sec_aux_pcm_ws_sleep {
|
|
mux {
|
|
pins = "gpio132";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio132";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_ws_active: sec_aux_pcm_ws_active {
|
|
mux {
|
|
pins = "gpio132";
|
|
function = "mi2s1_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio132";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_din {
|
|
sec_aux_pcm_din_sleep: sec_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_din_active: sec_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "mi2s1_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_dout {
|
|
sec_aux_pcm_dout_sleep: sec_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio131";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio131";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_aux_pcm_dout_active: sec_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio131";
|
|
function = "mi2s1_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio131";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm {
|
|
tert_aux_pcm_clk_sleep: tert_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_clk_active: tert_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_ws_sleep: tert_aux_pcm_ws_sleep {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_ws_active: tert_aux_pcm_ws_active {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_din {
|
|
tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio121";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio121";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_din_active: tert_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio121";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio121";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_dout {
|
|
tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_clk {
|
|
pri_tdm_clk_sleep: pri_tdm_clk_sleep {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_clk_active: pri_tdm_clk_active {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_sync {
|
|
pri_tdm_sync_sleep: pri_tdm_sync_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_sync_active: pri_tdm_sync_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_din {
|
|
pri_tdm_din_sleep: pri_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_din_active: pri_tdm_din_active {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_dout {
|
|
pri_tdm_dout_sleep: pri_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_dout_active: pri_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_tdm {
|
|
sec_tdm_sck_sleep: sec_tdm_sck_sleep {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_sck_active: sec_tdm_sck_active {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "mi2s1_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
|
|
sec_tdm_ws_sleep: sec_tdm_ws_sleep {
|
|
mux {
|
|
pins = "gpio132";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio132";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_ws_active: sec_tdm_ws_active {
|
|
mux {
|
|
pins = "gpio132";
|
|
function = "mi2s1_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio132";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_tdm_din {
|
|
sec_tdm_din_sleep: sec_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_din_active: sec_tdm_din_active {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "mi2s1_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_tdm_dout {
|
|
sec_tdm_dout_sleep: sec_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio131";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio131";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_tdm_dout_active: sec_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio131";
|
|
function = "mi2s1_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio131";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm {
|
|
tert_tdm_clk_sleep: tert_tdm_clk_sleep {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_clk_active: tert_tdm_clk_active {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tert_tdm_ws_sleep: tert_tdm_ws_sleep {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_ws_active: tert_tdm_ws_active {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm_din {
|
|
tert_tdm_din_sleep: tert_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio121";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio121";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_din_active: tert_tdm_din_active {
|
|
mux {
|
|
pins = "gpio121";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio121";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm_dout {
|
|
tert_tdm_dout_sleep: tert_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_dout_active: tert_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_mclk {
|
|
pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio123";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio123";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_mclk_active: pri_mi2s_mclk_active {
|
|
mux {
|
|
pins = "gpio123";
|
|
function = "pri_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio123";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sck {
|
|
pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sck_active: pri_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_ws {
|
|
pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_ws_active: pri_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd0 {
|
|
pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd0_active: pri_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd1 {
|
|
pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd1_active: pri_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_mclk {
|
|
sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_mclk_active: sec_mi2s_mclk_active {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "sec_mi2s";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sck {
|
|
sec_mi2s_sck_sleep: sec_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sck_active: sec_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "mi2s1_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_ws {
|
|
sec_mi2s_ws_sleep: sec_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio132";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio132";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_ws_active: sec_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio132";
|
|
function = "mi2s1_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio132";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd0 {
|
|
sec_mi2s_sd0_sleep: sec_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd0_active: sec_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "mi2s1_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd1 {
|
|
sec_mi2s_sd1_sleep: sec_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio131";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio131";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_sd1_active: sec_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio131";
|
|
function = "mi2s1_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio131";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sck {
|
|
tert_mi2s_sck_sleep: tert_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sck_active: tert_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio120";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio120";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_ws {
|
|
tert_mi2s_ws_sleep: tert_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_ws_active: tert_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd0 {
|
|
tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio121";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio121";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd0_active: tert_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio121";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio121";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd1 {
|
|
tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd1_active: tert_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sde: pmx_sde {
|
|
sde_dsi_active: sde_dsi_active {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable = <0>; /* no pull */
|
|
};
|
|
};
|
|
|
|
sde_dsi_suspend: sde_dsi_suspend {
|
|
mux {
|
|
pins = "gpio24";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio24";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
sde_dsi1_active: sde_dsi1_active {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable = <0>; /* no pull */
|
|
};
|
|
};
|
|
|
|
sde_dsi1_suspend: sde_dsi1_suspend {
|
|
mux {
|
|
pins = "gpio25";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio25";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_sde_te: pmx_sde_te {
|
|
sde_te_active: sde_te_active {
|
|
mux {
|
|
pins = "gpio82";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio82";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
sde_te_suspend: sde_te_suspend {
|
|
mux {
|
|
pins = "gpio82";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio82";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
sde_te1_active: sde_te1_active {
|
|
mux {
|
|
pins = "gpio83";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio83";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
|
|
sde_te1_suspend: sde_te1_suspend {
|
|
mux {
|
|
pins = "gpio83";
|
|
function = "mdp_vsync";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio83";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_active {
|
|
ts_active: ts_active {
|
|
mux {
|
|
pins = "gpio22", "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22", "gpio23";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio22";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio23";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio22", "gpio23";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio22", "gpio23";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
cnss_pins {
|
|
cnss_wlan_en_active: cnss_wlan_en_active {
|
|
mux {
|
|
pins = "gpio64";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
cnss_wlan_en_sleep: cnss_wlan_en_sleep {
|
|
mux {
|
|
pins = "gpio64";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio64";
|
|
drive-strength = <2>;
|
|
output-low;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
usb_phy_ps: usb_phy_ps {
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
|
mux {
|
|
pins = "gpio81";
|
|
function = "usb_phy";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio81";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
};
|
|
|
|
bt_en_sleep: bt_en_sleep {
|
|
mux {
|
|
pins = "gpio65";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio65";
|
|
drive-strength = <2>;
|
|
output-low;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|