mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
b0e5152a74
Add devicetree bindings snapshot to the devicetree project.
This snapshot is taken as of the
'commit 5fba1b18cfc72e264e5f3ce49020ed322aa6ac9f ("Merge 5.6-rc3
into android-mainline")' of the kernel project.
Change-Id: Ia087ab2b7d4a2616ea446a69683a8b5b821d0448
56 lines
1.3 KiB
YAML
56 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/fsl,sai-clock.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale SAI bitclock-as-a-clock binding
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maintainers:
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- Michael Walle <michael@walle.cc>
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description: |
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It is possible to use the BCLK pin of a SAI module as a generic clock
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output. Some SoC are very constrained in their pin multiplexer
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configuration. Eg. pins can only be changed groups. For example, on the
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LS1028A SoC you can only enable SAIs in pairs. If you use only one SAI,
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the second pins are wasted. Using this binding it is possible to use the
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clock of the second SAI as a MCLK clock for an audio codec, for example.
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This is a composite of a gated clock and a divider clock.
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properties:
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compatible:
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const: fsl,vf610-sai-clock
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reg:
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maxItems: 1
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clocks:
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maxItems: 1
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'#clock-cells':
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const: 0
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required:
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- compatible
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- reg
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- clocks
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- '#clock-cells'
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additionalProperties: false
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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mclk: clock-mclk@f130080 {
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compatible = "fsl,vf610-sai-clock";
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reg = <0x0 0xf130080 0x0 0x80>;
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#clock-cells = <0>;
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clocks = <&parentclk>;
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};
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};
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