mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
c3372ac34d
Update low SVS corner from 133.33 to 133.00 for core clock and vcodec clock. Change-Id: I0e5eb6540573e041409a6937e8a4bcf2217d99b9
94 lines
2.7 KiB
Plaintext
94 lines
2.7 KiB
Plaintext
&soc {
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msm_vidc: qcom,vidc@5a00000 {
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compatible = "qcom,msm-vidc", "qcom,holi-vidc";
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status = "ok";
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reg = <0x5a00000 0x200000>;
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interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
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/* IOMMU Config */
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#address-cells = <1>;
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#size-cells = <1>;
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/* Supply */
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venus-supply = <&gcc_venus_gdsc>;
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venus-core0-supply = <&gcc_vcodec0_gdsc>;
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/* Clocks */
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clock-names = "core_clk", "iface_clk", "bus_clk",
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"core0_clk", "core0_bus_clk", "throttle_clk";
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clocks = <&gcc GCC_VIDEO_VENUS_CTL_CLK>,
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<&gcc GCC_VIDEO_AHB_CLK>,
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<&gcc GCC_VENUS_CTL_AXI_CLK>,
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<&gcc GCC_VIDEO_VCODEC0_SYS_CLK>,
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<&gcc GCC_VCODEC0_AXI_CLK>,
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<&gcc GCC_VIDEO_THROTTLE_CORE_CLK>;
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qcom,proxy-clock-names = "core_clk", "iface_clk", "bus_clk",
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"core0_clk", "core0_bus_clk", "throttle_clk";
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qcom,clock-configs = <0x1 0x0 0x0 0x1 0x0 0x0>;
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qcom,allowed-clock-rates = <133000000 240000000 300000000
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384000000>;
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/* Bus Interconnects */
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interconnect-names = "venus-cnoc", "venus-ddr";
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interconnects = <&bimc MASTER_AMPSS_M0
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&config_noc SLAVE_VENUS_CFG>,
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<&mmnrt_virt MASTER_VIDEO_P0
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&bimc SLAVE_EBI>;
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/* Bus BW range (low, high) for each bus */
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qcom,bus-range-kbps = <1000 1000
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1000 2128000>;
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/* MMUs */
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non_secure_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_ns";
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iommus =
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<&apps_smmu 0xc60 0x00>,
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<&apps_smmu 0xc80 0x00>;
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qcom,iommu-dma-addr-pool = <0x70800000 0x6f800000>;
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qcom,iommu-faults = "non-fatal";
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buffer-types = <0xfff>;
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virtual-addr-pool = <0x70800000 0x6f800000>;
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};
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secure_bitstream_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_bitstream";
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iommus =
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<&apps_smmu 0xc61 0x04>;
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qcom,iommu-dma-addr-pool = <0x4b000000 0x25800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-vmid = <0x9>; /*VMID_CP_BITSTREAM*/
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buffer-types = <0x241>;
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virtual-addr-pool = <0x4b000000 0x25800000>;
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qcom,secure-context-bank;
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};
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secure_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_pixel";
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iommus =
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<&apps_smmu 0xc63 0x0>;
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qcom,iommu-dma-addr-pool = <0x25800000 0x25800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-vmid = <0xA>; /*VMID_CP_PIXEL*/
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buffer-types = <0x106>;
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virtual-addr-pool = <0x25800000 0x25800000>;
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qcom,secure-context-bank;
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};
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secure_non_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_non_pixel";
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iommus =
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<&apps_smmu 0xc04 0xE0>;
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qcom,iommu-dma-addr-pool = <0x1000000 0x24800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-vmid = <0xB>; /*VMID_CP_NON_PIXEL*/
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buffer-types = <0x480>;
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virtual-addr-pool = <0x1000000 0x24800000>;
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qcom,secure-context-bank;
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};
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};
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};
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