mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 08:51:30 +00:00
567 lines
11 KiB
Plaintext
567 lines
11 KiB
Plaintext
#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,rpmh.h>
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#include <dt-bindings/clock/qcom,gcc-neo.h>
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#include <dt-bindings/clock/qcom,gpucc-neo.h>
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#include <dt-bindings/clock/qcom,camcc-neo.h>
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#include <dt-bindings/clock/qcom,dispcc-neo.h>
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#include <dt-bindings/clock/qcom,videocc-neo.h>
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#include <dt-bindings/interconnect/qcom,icc.h>
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#include <dt-bindings/interconnect/qcom,neo.h>
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#include <dt-bindings/soc/qcom,ipcc.h>
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/ {
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model = "Qualcomm Technologies, Inc. NEO";
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compatible = "qcom,neo";
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qcom,msm-id = <525 0x10000>;
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interrupt-parent = <&intc>;
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#address-cells = <2>;
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#size-cells = <2>;
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memory { device_type = "memory"; reg = <0 0 0 0>; };
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reserved_memory: reserved-memory { };
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aliases {
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mmc0 = &sdhc_1; /*SDC1 eMMC slot*/
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};
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chosen {
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bootargs = " console=ttyMSM0,115200n8 loglevel=8";
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};
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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CPU0: cpu@0 {
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&L2_0>;
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L2_0: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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next-level-cache = <&L3_0>;
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L3_0: l3-cache {
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compatible = "arm,arch-cache";
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cache-level = <3>;
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};
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};
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};
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CPU1: cpu@1 {
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x100>;
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enable-method = "psci";
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next-level-cache = <&L2_1>;
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L2_1: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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next-level-cache = <&L3_1>;
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L3_1: l3-cache {
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compatible = "arm,arch-cache";
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cache-level = <3>;
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};
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};
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};
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CPU2: cpu@2 {
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x200>;
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enable-method = "psci";
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next-level-cache = <&L2_2>;
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L2_2: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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next-level-cache = <&L3_2>;
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L3_2: l3-cache {
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compatible = "arm,arch-cache";
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cache-level = <3>;
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};
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};
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};
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CPU3: cpu@3 {
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device_type = "cpu";
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compatible = "qcom,kryo";
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reg = <0x0 0x300>;
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enable-method = "psci";
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next-level-cache = <&L2_3>;
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L2_3: l2-cache {
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compatible = "arm,arch-cache";
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cache-level = <2>;
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next-level-cache = <&L3_3>;
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L3_3: l3-cache {
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compatible = "arm,arch-cache";
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cache-level = <3>;
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};
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};
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};
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};
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cpu-map {
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cluster0 {
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core0 {
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cpu = <&CPU0>;
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};
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core1 {
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cpu = <&CPU1>;
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};
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core2 {
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cpu = <&CPU2>;
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};
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core3 {
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cpu = <&CPU3>;
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};
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};
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};
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soc: soc { };
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};
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#include "neo-stub-regulator.dtsi"
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#include "neo-reserved-memory.dtsi"
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&reserved_memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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/* global autoconfigured region for contiguous allocations */
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system_cma: linux,cma {
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compatible = "shared-dma-pool";
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alloc-ranges = <0x0 0x00000000 0x0 0xffffffff>;
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reusable;
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alignment = <0x0 0x400000>;
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size = <0x0 0x2000000>;
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linux,cma-default;
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};
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};
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&soc {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0 0 0xffffffff>;
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compatible = "simple-bus";
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psci {
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compatible = "arm,psci-1.0";
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method = "smc";
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};
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intc: interrupt-controller@0x17200000 {
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compatible = "arm,gic-v3";
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#interrupt-cells = <3>;
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interrupt-controller;
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#redistributor-regions = <1>;
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redistributor-stride = <0x0 0x20000>;
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reg = <0x17200000 0x10000>, /* GICD */
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<0x17260000 0x100000>; /* GICR * 8 */
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interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_LOW>;
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};
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wdog: qcom,wdt@17410000 {
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compatible = "qcom,msm-watchdog";
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reg = <0x17410000 0x1000>;
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reg-names = "wdt-base";
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interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
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};
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arch_timer: timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 12 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
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clock-frequency = <19200000>;
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};
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memtimer: timer@17420000 {
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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compatible = "arm,armv7-timer-mem";
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reg = <0x17420000 0x1000>;
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clock-frequency = <19200000>;
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frame@17421000 {
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frame-number = <0>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x17421000 0x1000>,
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<0x17422000 0x1000>;
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};
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frame@17423000 {
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frame-number = <1>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x17423000 0x1000>;
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status = "disabled";
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};
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frame@17425000 {
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frame-number = <2>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x17425000 0x1000>;
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status = "disabled";
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};
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frame@17427000 {
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frame-number = <3>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x17427000 0x1000>;
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status = "disabled";
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};
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frame@17429000 {
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frame-number = <4>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x17429000 0x1000>;
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status = "disabled";
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};
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frame@1742b000 {
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frame-number = <5>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x1742b000 0x1000>;
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status = "disabled";
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};
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frame@1742d000 {
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frame-number = <6>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x1742d000 0x1000>;
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status = "disabled";
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};
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};
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clocks {
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xo_board: xo_board {
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compatible = "fixed-clock";
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clock-frequency = <38400000>;
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clock-output-names = "xo_board";
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#clock-cells = <0>;
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};
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sleep_clk: sleep_clk {
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compatible = "fixed-clock";
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clock-frequency = <32000>;
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clock-output-names = "sleep_clk";
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#clock-cells = <0>;
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};
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pcie_0_pipe_clk: pcie_0_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_0_pipe_clk";
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#clock-cells = <0>;
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};
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pcie_1_pipe_clk: pcie_1_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "pcie_1_pipe_clk";
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#clock-cells = <0>;
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};
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usb3_phy_wrapper_gcc_usb30_pipe_clk: usb3_phy_wrapper_gcc_usb30_pipe_clk {
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compatible = "fixed-clock";
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clock-frequency = <1000>;
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clock-output-names = "usb3_phy_wrapper_gcc_usb30_pipe_clk";
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#clock-cells = <0>;
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};
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};
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bi_tcxo: bi_tcxo {
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compatible = "fixed-factor-clock";
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clock-mult = <1>;
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clock-div = <2>;
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clocks = <&xo_board>;
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#clock-cells = <0>;
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};
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bi_tcxo_ao: bi_tcxo_ao {
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compatible = "fixed-factor-clock";
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clock-mult = <1>;
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clock-div = <2>;
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clocks = <&xo_board>;
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#clock-cells = <0>;
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};
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rpmhcc: qcom,rpmhcc {
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compatible = "qcom,dummycc";
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clock-output-names = "rpmhcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gcc: clock-controller@100000 {
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compatible = "qcom,dummycc";
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clock-output-names = "gcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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camcc: clock-controller@ade0000 {
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compatible = "qcom,dummycc";
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clock-output-names = "camcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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dispcc: clock-controller@af00000 {
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compatible = "qcom,dummycc";
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clock-output-names = "dispcc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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videocc: clock-controller@abf0000 {
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compatible = "qcom,dummycc";
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clock-output-names = "videocc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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gpucc: clock-controller@3d90000 {
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compatible = "qcom,dummycc";
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clock-output-names = "gpucc_clocks";
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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sdhc_1: sdhci@7C4000 {
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status = "disabled";
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compatible = "qcom,sdhci-msm-v5";
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reg = <0x007C4000 0x1000>, <0x007C5000 0x1000>;
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reg-names = "hc", "cqhci";
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interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hc_irq", "pwr_irq";
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bus-width = <8>;
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non-removable;
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supports-cqe;
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no-sd;
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no-sdio;
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mmc-ddr-1_8v;
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mmc-hs200-1_8v;
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mmc-hs400-1_8v;
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mmc-hs400-enhanced-strobe;
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clocks = <&gcc GCC_SDCC1_AHB_CLK>,
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<&gcc GCC_SDCC1_APPS_CLK>,
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<&gcc GCC_SDCC1_ICE_CORE_CLK>;
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clock-names = "iface", "core", "ice_core";
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qcom,ice-clk-rates = <300000000 100000000>;
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qos0 {
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mask = <0x0f>;
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vote = <44>;
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};
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};
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clk_virt: interconnect@0 {
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compatible = "qcom,neo-clk_virt";
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#interconnect-cells = <1>;
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};
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mc_virt: interconnect@1 {
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compatible = "qcom,neo-mc_virt";
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#interconnect-cells = <1>;
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};
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config_noc: interconnect@1500000 {
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compatible = "qcom,neo-config_noc";
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#interconnect-cells = <1>;
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};
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system_noc: interconnect@1680000 {
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compatible = "qcom,neo-system_noc";
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#interconnect-cells = <1>;
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};
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pcie_noc: interconnect@16c0000 {
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compatible = "qcom,neo-pcie_anoc";
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#interconnect-cells = <1>;
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};
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mmss_noc: interconnect@1740000 {
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compatible = "qcom,neo-mmss_noc";
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#interconnect-cells = <1>;
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};
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gem_noc: interconnect@19100000 {
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compatible = "qcom,neo-gem_noc";
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#interconnect-cells = <1>;
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};
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nsp_noc: interconnect@320C0000 {
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compatible = "qcom,neo-nsp_noc";
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#interconnect-cells = <1>;
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};
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lpass_ag_noc: interconnect@3c40000 {
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compatible = "qcom,neo-lpass_ag_noc";
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#interconnect-cells = <1>;
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};
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ipcc_mproc: qcom,ipcc@ed18000 {
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compatible = "qcom,ipcc";
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reg = <0xed18000 0x1000>;
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interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <3>;
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#mbox-cells = <2>;
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};
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};
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#include "neo-pinctrl.dtsi"
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#include "neo-dma-heaps.dtsi"
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#include "diwali-gdsc.dtsi"
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&gcc_apcs_gdsc_vote_ctrl {
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reg = <0x162200 0x4>;
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};
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&gcc_pcie_0_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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/delete-property/ qcom,support-hw-trigger;
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};
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&gcc_pcie_0_phy_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&gcc_pcie_1_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&gcc_pcie_1_phy_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&gcc_usb30_prim_gdsc {
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compatible = "regulator-fixed";
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qcom,support-hw-trigger;
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status = "ok";
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};
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&gcc_usb3_phy_gdsc {
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compatible = "regulator-fixed";
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qcom,support-hw-trigger;
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status = "ok";
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};
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&hlos1_vote_turing_mmu_tbu1_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&hlos1_vote_turing_mmu_tbu0_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&hlos1_vote_mmnoc_mmu_tbu_sf0_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&cam_cc_bps_gdsc {
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compatible = "regulator-fixed";
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reg = <0xadf0004 0x4>;
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status = "ok";
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};
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&cam_cc_ife_0_gdsc {
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compatible = "regulator-fixed";
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reg = <0xadf1004 0x4>;
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status = "ok";
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};
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&cam_cc_ife_1_gdsc {
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compatible = "regulator-fixed";
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reg = <0xadf2004 0x4>;
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status = "ok";
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};
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&cam_cc_ipe_0_gdsc {
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compatible = "regulator-fixed";
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reg = <0xadf03b8 0x4>;
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status = "ok";
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};
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&cam_cc_titan_top_gdsc {
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compatible = "regulator-fixed";
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reg = <0xadf4000 0x4>;
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status = "ok";
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};
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&disp_cc_mdss_core_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&disp_cc_mdss_core_int2_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&gpu_cc_cx_gdsc {
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compatible = "regulator-fixed";
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status = "ok";
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};
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&video_cc_mvs0_gdsc {
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compatible = "regulator-fixed";
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reg = <0xabf80a4 0x4>;
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status = "ok";
|
|
};
|
|
|
|
&video_cc_mvs0c_gdsc {
|
|
compatible = "regulator-fixed";
|
|
reg = <0xabf804c 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
&video_cc_mvs1_gdsc {
|
|
compatible = "regulator-fixed";
|
|
reg = <0xabf80cc 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
&video_cc_mvs1c_gdsc {
|
|
compatible = "regulator-fixed";
|
|
reg = <0xabf8078 0x4>;
|
|
status = "ok";
|
|
};
|
|
|
|
#include "neo-usb.dtsi"
|