mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 08:51:30 +00:00
06f1806900
In order to make the change aligned with the driver, renaming usb_phy to usb0_phy. Without this type-c orientation doesn't detect cc2 in super-speed. Change-Id: I4e29c0ab781423456a3ec1f46becc9e8c4384e8f
2087 lines
35 KiB
Plaintext
2087 lines
35 KiB
Plaintext
&tlmm {
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qupv3_se5_2uart_pins: qupv3_se5_2uart_pins {
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qupv3_se5_2uart_active: qupv3_se5_2uart_active {
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mux {
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pins = "gpio22", "gpio23";
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function = "qup0_se5";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se5_2uart_sleep: qupv3_se5_2uart_sleep {
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mux {
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pins = "gpio22", "gpio23";
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function = "gpio";
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};
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config {
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pins = "gpio22", "gpio23";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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};
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trigout_a: trigout_a {
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mux {
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pins = "gpio52";
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function = "qdss_cti";
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};
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config {
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pins = "gpio52";
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drive-strength = <2>;
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bias-disable;
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};
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};
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sdc2_on: sdc2_on {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <16>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <10>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <10>;
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};
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sd-cd {
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pins = "gpio19";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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sdc2_off: sdc2_off {
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clk {
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pins = "sdc2_clk";
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bias-disable;
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drive-strength = <2>;
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};
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cmd {
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pins = "sdc2_cmd";
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bias-pull-up;
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drive-strength = <2>;
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};
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data {
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pins = "sdc2_data";
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bias-pull-up;
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drive-strength = <2>;
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};
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sd-cd {
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pins = "gpio19";
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bias-pull-up;
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drive-strength = <2>;
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};
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};
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qupv3_se0_i2c_pins: qupv3_se0_i2c_pins {
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qupv3_se0_i2c_active: qupv3_se0_i2c_active {
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mux {
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pins = "gpio0", "gpio1";
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function = "qup0_se0";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se0_i2c_sleep: qupv3_se0_i2c_sleep {
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mux {
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pins = "gpio0", "gpio1";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se0_spi_pins: qupv3_se0_spi_pins {
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qupv3_se0_spi_active: qupv3_se0_spi_active {
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mux {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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function = "qup0_se0";
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};
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config {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se0_spi_sleep: qupv3_se0_spi_sleep {
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mux {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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function = "gpio";
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};
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config {
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pins = "gpio0", "gpio1",
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"gpio2", "gpio3";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se1_i2c_pins: qupv3_se1_i2c_pins {
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qupv3_se1_i2c_active: qupv3_se1_i2c_active {
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mux {
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pins = "gpio4", "gpio5";
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function = "qup0_se1";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se1_i2c_sleep: qupv3_se1_i2c_sleep {
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mux {
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pins = "gpio4", "gpio5";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se1_spi_pins: qupv3_se1_spi_pins {
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qupv3_se1_spi_active: qupv3_se1_spi_active {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "qup0_se1";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se1_spi_sleep: qupv3_se1_spi_sleep {
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mux {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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function = "gpio";
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};
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config {
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pins = "gpio4", "gpio5",
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"gpio6", "gpio7";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se2_i2c_pins: qupv3_se2_i2c_pins {
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qupv3_se2_i2c_active: qupv3_se2_i2c_active {
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mux {
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pins = "gpio8", "gpio9";
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function = "qup0_se2";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se2_i2c_sleep: qupv3_se2_i2c_sleep {
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mux {
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pins = "gpio8", "gpio9";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se2_spi_pins: qupv3_se2_spi_pins {
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qupv3_se2_spi_active: qupv3_se2_spi_active {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "qup0_se2";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se2_spi_sleep: qupv3_se2_spi_sleep {
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mux {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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function = "gpio";
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};
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config {
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pins = "gpio8", "gpio9",
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"gpio10", "gpio11";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se3_i2c_pins: qupv3_se3_i2c_pins {
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qupv3_se3_i2c_active: qupv3_se3_i2c_active {
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mux {
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pins = "gpio12", "gpio13";
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function = "qup0_se3";
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};
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config {
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pins = "gpio12", "gpio13";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se3_i2c_sleep: qupv3_se3_i2c_sleep {
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mux {
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pins = "gpio12", "gpio13";
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function = "gpio";
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};
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config {
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pins = "gpio12", "gpio13";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se3_spi_pins: qupv3_se3_spi_pins {
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qupv3_se3_spi_active: qupv3_se3_spi_active {
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mux {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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function = "qup0_se3";
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};
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config {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se3_spi_sleep: qupv3_se3_spi_sleep {
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mux {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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function = "gpio";
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};
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config {
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pins = "gpio12", "gpio13",
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"gpio14", "gpio15";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se4_i2c_pins: qupv3_se4_i2c_pins {
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qupv3_se4_i2c_active: qupv3_se4_i2c_active {
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mux {
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pins = "gpio16", "gpio17";
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function = "qup0_se4";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se4_i2c_sleep: qupv3_se4_i2c_sleep {
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mux {
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pins = "gpio16", "gpio17";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se4_spi_pins: qupv3_se4_spi_pins {
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qupv3_se4_spi_active: qupv3_se4_spi_active {
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mux {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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function = "qup0_se4";
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};
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config {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se4_spi_sleep: qupv3_se4_spi_sleep {
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mux {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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function = "gpio";
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};
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config {
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pins = "gpio16", "gpio17",
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"gpio18", "gpio19";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se6_i2c_pins: qupv3_se6_i2c_pins {
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qupv3_se6_i2c_active: qupv3_se6_i2c_active {
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mux {
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pins = "gpio24", "gpio25";
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function = "qup0_se6";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se6_i2c_sleep: qupv3_se6_i2c_sleep {
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mux {
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pins = "gpio24", "gpio25";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se6_spi_pins: qupv3_se6_spi_pins {
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qupv3_se6_spi_active: qupv3_se6_spi_active {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "qup0_se6";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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qupv3_se6_spi_sleep: qupv3_se6_spi_sleep {
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mux {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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function = "gpio";
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};
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config {
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pins = "gpio24", "gpio25",
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"gpio26", "gpio27";
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drive-strength = <6>;
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bias-disable;
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};
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};
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};
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qupv3_se7_4uart_pins: qupv3_se7_4uart_pins {
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qupv3_se7_default_cts:
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qupv3_se7_default_cts {
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mux {
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pins = "gpio28";
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function = "gpio";
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};
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config {
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pins = "gpio28";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_default_rtsrx:
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qupv3_se7_default_rtsrx {
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mux {
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pins = "gpio29", "gpio31";
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function = "gpio";
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};
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config {
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pins = "gpio29", "gpio31";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se7_default_tx:
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qupv3_se7_default_tx {
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mux {
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pins = "gpio30";
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function = "gpio";
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};
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config {
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pins = "gpio30";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se7_cts: qupv3_se7_cts {
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mux {
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pins = "gpio28";
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function = "qup0_se7";
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};
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config {
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pins = "gpio28";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_rts: qupv3_se7_rts {
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mux {
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pins = "gpio29";
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function = "qup0_se7";
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};
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config {
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pins = "gpio29";
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drive-strength = <2>;
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bias-pull-down;
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};
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};
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qupv3_se7_tx: qupv3_se7_tx {
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mux {
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pins = "gpio30";
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function = "qup0_se7";
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};
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config {
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pins = "gpio30";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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/* RX to be in gpio mode for sleep config */
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qupv3_se7_rx_wake: qupv3_se7_rx_wake {
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mux {
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pins = "gpio31";
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function = "gpio";
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};
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config {
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pins = "gpio31";
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drive-strength = <2>;
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bias-disable;
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};
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};
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qupv3_se7_rx_active: qupv3_se7_rx_active {
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mux {
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pins = "gpio31";
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function = "qup0_se7";
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};
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config {
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pins = "gpio31";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se8_i2c_pins: qupv3_se8_i2c_pins {
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qupv3_se8_i2c_active: qupv3_se8_i2c_active {
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mux {
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pins = "gpio32", "gpio33";
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function = "qup1_se0";
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};
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config {
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pins = "gpio32", "gpio33";
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drive-strength = <2>;
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bias-pull-up;
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};
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};
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qupv3_se8_i2c_sleep: qupv3_se8_i2c_sleep {
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mux {
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pins = "gpio32", "gpio33";
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function = "gpio";
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};
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config {
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pins = "gpio32", "gpio33";
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drive-strength = <2>;
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bias-disable;
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};
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};
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};
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qupv3_se8_spi_pins: qupv3_se8_spi_pins {
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qupv3_se8_spi_active: qupv3_se8_spi_active {
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mux {
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pins = "gpio32", "gpio33",
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"gpio34", "gpio35";
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function = "qup1_se0";
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};
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|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se8_spi_sleep: qupv3_se8_spi_sleep {
|
|
mux {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio32", "gpio33",
|
|
"gpio34", "gpio35";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_pins: qupv3_se9_i2c_pins {
|
|
qupv3_se9_i2c_active: qupv3_se9_i2c_active {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "qup1_se1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_i2c_sleep: qupv3_se9_i2c_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_pins: qupv3_se9_spi_pins {
|
|
qupv3_se9_spi_active: qupv3_se9_spi_active {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "qup1_se1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se9_spi_sleep: qupv3_se9_spi_sleep {
|
|
mux {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio36", "gpio37",
|
|
"gpio38", "gpio39";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_pins: qupv3_se10_i2c_pins {
|
|
qupv3_se10_i2c_active: qupv3_se10_i2c_active {
|
|
mux {
|
|
pins = "gpio40", "gpio41";
|
|
function = "qup1_se2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_i2c_sleep: qupv3_se10_i2c_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_pins: qupv3_se10_spi_pins {
|
|
qupv3_se10_spi_active: qupv3_se10_spi_active {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "qup1_se2";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se10_spi_sleep: qupv3_se10_spi_sleep {
|
|
mux {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio40", "gpio41",
|
|
"gpio42", "gpio43";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_pins: qupv3_se11_i2c_pins {
|
|
qupv3_se11_i2c_active: qupv3_se11_i2c_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "qup1_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_i2c_sleep: qupv3_se11_i2c_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_pins: qupv3_se11_spi_pins {
|
|
qupv3_se11_spi_active: qupv3_se11_spi_active {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "qup1_se3";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se11_spi_sleep: qupv3_se11_spi_sleep {
|
|
mux {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio44", "gpio45",
|
|
"gpio46", "gpio47";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_pins: qupv3_se12_i2c_pins {
|
|
qupv3_se12_i2c_active: qupv3_se12_i2c_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "qup1_se4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_i2c_sleep: qupv3_se12_i2c_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_pins: qupv3_se12_spi_pins {
|
|
qupv3_se12_spi_active: qupv3_se12_spi_active {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "qup1_se4";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se12_spi_sleep: qupv3_se12_spi_sleep {
|
|
mux {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio48", "gpio49",
|
|
"gpio50", "gpio51";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_pins: qupv3_se13_i2c_pins {
|
|
qupv3_se13_i2c_active: qupv3_se13_i2c_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_i2c_sleep: qupv3_se13_i2c_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_pins: qupv3_se13_spi_pins {
|
|
qupv3_se13_spi_active: qupv3_se13_spi_active {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "qup1_se5";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se13_spi_sleep: qupv3_se13_spi_sleep {
|
|
mux {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio52", "gpio53",
|
|
"gpio54", "gpio55";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_i2c_pins: qupv3_se14_i2c_pins {
|
|
qupv3_se14_i2c_active: qupv3_se14_i2c_active {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "qup1_se6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_i2c_sleep: qupv3_se14_i2c_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
qupv3_se14_spi_pins: qupv3_se14_spi_pins {
|
|
qupv3_se14_spi_active: qupv3_se14_spi_active {
|
|
mux {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
function = "qup1_se6";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
qupv3_se14_spi_sleep: qupv3_se14_spi_sleep {
|
|
mux {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio56", "gpio57",
|
|
"gpio58", "gpio59";
|
|
drive-strength = <6>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
nfc {
|
|
nfc_int_active: nfc_int_active {
|
|
/* active state */
|
|
mux {
|
|
/* NFC Read Interrupt */
|
|
pins = "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
nfc_int_suspend: nfc_int_suspend {
|
|
/* sleep state */
|
|
mux {
|
|
/* NFC Read Interrupt */
|
|
pins = "gpio41";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio41";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
nfc_enable_active: nfc_enable_active {
|
|
mux {
|
|
/* Enable, Firmware and Clock request gpios */
|
|
pins = "gpio38", "gpio40", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38", "gpio40", "gpio39";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
nfc_enable_suspend: nfc_enable_suspend {
|
|
mux {
|
|
pins = "gpio38", "gpio40", "gpio39";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio38", "gpio40", "gpio39";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_clk {
|
|
pri_aux_pcm_clk_sleep: pri_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_clk_active: pri_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_sync {
|
|
pri_aux_pcm_sync_sleep: pri_aux_pcm_sync_sleep {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_sync_active: pri_aux_pcm_sync_active {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_din {
|
|
pri_aux_pcm_din_sleep: pri_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_din_active: pri_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_dout {
|
|
pri_aux_pcm_dout_sleep: pri_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_aux_pcm_dout_active: pri_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm {
|
|
tert_aux_pcm_clk_sleep: tert_aux_pcm_clk_sleep {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_clk_active: tert_aux_pcm_clk_active {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_ws_sleep: tert_aux_pcm_ws_sleep {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_ws_active: tert_aux_pcm_ws_active {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_din {
|
|
tert_aux_pcm_din_sleep: tert_aux_pcm_din_sleep {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_din_active: tert_aux_pcm_din_active {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_dout {
|
|
tert_aux_pcm_dout_sleep: tert_aux_pcm_dout_sleep {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_aux_pcm_dout_active: tert_aux_pcm_dout_active {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_clk {
|
|
pri_tdm_clk_sleep: pri_tdm_clk_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_clk_active: pri_tdm_clk_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_sync {
|
|
pri_tdm_sync_sleep: pri_tdm_sync_sleep {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_sync_active: pri_tdm_sync_active {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_din {
|
|
pri_tdm_din_sleep: pri_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_din_active: pri_tdm_din_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_tdm_dout {
|
|
pri_tdm_dout_sleep: pri_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_tdm_dout_active: pri_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm {
|
|
tert_tdm_clk_sleep: tert_tdm_clk_sleep {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_clk_active: tert_tdm_clk_active {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
tert_tdm_ws_sleep: tert_tdm_ws_sleep {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_ws_active: tert_tdm_ws_active {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm_din {
|
|
tert_tdm_din_sleep: tert_tdm_din_sleep {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_din_active: tert_tdm_din_active {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_tdm_dout {
|
|
tert_tdm_dout_sleep: tert_tdm_dout_sleep {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_tdm_dout_active: tert_tdm_dout_active {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_mclk {
|
|
pri_mi2s_mclk_sleep: pri_mi2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_mclk_active: pri_mi2s_mclk_active {
|
|
mux {
|
|
pins = "gpio126";
|
|
function = "mi2s_mclk0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio126";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sck {
|
|
pri_mi2s_sck_sleep: pri_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sck_active: pri_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio127";
|
|
function = "mi2s0_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio127";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_ws {
|
|
pri_mi2s_ws_sleep: pri_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_ws_active: pri_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio130";
|
|
function = "mi2s0_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio130";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd0 {
|
|
pri_mi2s_sd0_sleep: pri_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd0_active: pri_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio128";
|
|
function = "mi2s0_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio128";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd1 {
|
|
pri_mi2s_sd1_sleep: pri_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
pri_mi2s_sd1_active: pri_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio129";
|
|
function = "mi2s0_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio129";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
sec_mi2s_mclk {
|
|
sec_mi2s_mclk_sleep: sec_mi2s_mclk_sleep {
|
|
mux {
|
|
pins = "gpio125";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio125";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
sec_mi2s_mclk_active: sec_mi2s_mclk_active {
|
|
mux {
|
|
pins = "gpio124";
|
|
function = "mi2s_mclk1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio124";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sck {
|
|
tert_mi2s_sck_sleep: tert_mi2s_sck_sleep {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sck_active: tert_mi2s_sck_active {
|
|
mux {
|
|
pins = "gpio60";
|
|
function = "mi2s2_sck";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio60";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_ws {
|
|
tert_mi2s_ws_sleep: tert_mi2s_ws_sleep {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_ws_active: tert_mi2s_ws_active {
|
|
mux {
|
|
pins = "gpio62";
|
|
function = "mi2s2_ws";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio62";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd0 {
|
|
tert_mi2s_sd0_sleep: tert_mi2s_sd0_sleep {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd0_active: tert_mi2s_sd0_active {
|
|
mux {
|
|
pins = "gpio61";
|
|
function = "mi2s2_data0";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio61";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd1 {
|
|
tert_mi2s_sd1_sleep: tert_mi2s_sd1_sleep {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down; /* PULL DOWN */
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
tert_mi2s_sd1_active: tert_mi2s_sd1_active {
|
|
mux {
|
|
pins = "gpio63";
|
|
function = "mi2s2_data1";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio63";
|
|
drive-strength = <8>; /* 8 mA */
|
|
bias-disable; /* NO PULL */
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WSA speaker reset pins */
|
|
spkr_1_sd_n {
|
|
spkr_1_sd_n_sleep: spkr_1_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio50";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_1_sd_n_active: spkr_1_sd_n_active {
|
|
mux {
|
|
pins = "gpio50";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio50";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n {
|
|
spkr_2_sd_n_sleep: spkr_2_sd_n_sleep {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <2>; /* 2 mA */
|
|
bias-pull-down;
|
|
input-enable;
|
|
};
|
|
};
|
|
|
|
spkr_2_sd_n_active: spkr_2_sd_n_active {
|
|
mux {
|
|
pins = "gpio18";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio18";
|
|
drive-strength = <16>; /* 16 mA */
|
|
bias-disable;
|
|
output-high;
|
|
};
|
|
};
|
|
};
|
|
|
|
/* WCD reset pin */
|
|
wcd_reset_active: wcd_reset_active {
|
|
mux {
|
|
pins = "gpio54";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio54";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
wcd_reset_sleep: wcd_reset_sleep {
|
|
mux {
|
|
pins = "gpio54";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio54";
|
|
drive-strength = <16>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
/* touchscreen pins */
|
|
pmx_ts_active {
|
|
ts_active: ts_active {
|
|
mux {
|
|
pins = "gpio17", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17", "gpio51";
|
|
drive-strength = <8>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_reset_suspend {
|
|
ts_reset_suspend: ts_reset_suspend {
|
|
mux {
|
|
pins = "gpio17";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_int_suspend {
|
|
ts_int_suspend: ts_int_suspend {
|
|
mux {
|
|
pins = "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio51";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pmx_ts_release {
|
|
ts_release: ts_release {
|
|
mux {
|
|
pins = "gpio17", "gpio51";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio17", "gpio51";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
};
|
|
};
|
|
};
|
|
|
|
usb_phy_ps: usb_phy_ps {
|
|
usb3phy_portselect_default: usb3phy_portselect_default {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "usb0_phy";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
bias-disable;
|
|
drive-strength = <2>;
|
|
};
|
|
};
|
|
|
|
usb3phy_portselect_gpio: usb3phy_portselect_gpio {
|
|
mux {
|
|
pins = "gpio122";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio122";
|
|
drive-strength = <2>;
|
|
bias-disable;
|
|
input-enable;
|
|
};
|
|
};
|
|
};
|
|
|
|
bt_en_sleep: bt_en_sleep {
|
|
mux {
|
|
pins = "gpio114";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio114";
|
|
drive-strength = <2>;
|
|
output-low;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
cnss_pins {
|
|
cnss_wlan_en_active: cnss_wlan_en_active {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <16>;
|
|
output-high;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
cnss_wlan_en_sleep: cnss_wlan_en_sleep {
|
|
mux {
|
|
pins = "gpio49";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio49";
|
|
drive-strength = <2>;
|
|
output-low;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
};
|
|
|
|
pcie0 {
|
|
pcie0_perst_default: pcie0_perst_default {
|
|
mux {
|
|
pins = "gpio117";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio117";
|
|
drive-strength = <2>;
|
|
bias-pull-down;
|
|
};
|
|
};
|
|
|
|
pcie0_clkreq_default: pcie0_clkreq_default {
|
|
mux {
|
|
pins = "gpio118";
|
|
function = "pcie0_clk";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio118";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie0_wake_default: pcie0_wake_default {
|
|
mux {
|
|
pins = "gpio119";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio119";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
pcie0_clkreq_sleep: pcie0_clkreq_sleep {
|
|
mux {
|
|
pins = "gpio118";
|
|
function = "gpio";
|
|
};
|
|
|
|
config {
|
|
pins = "gpio118";
|
|
drive-strength = <2>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
};
|
|
|
|
|
|
};
|