mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
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719cc9aa79
Add devicetree bindings snapshot to the devicetree project Change-Id: I20b46d194bd3b107ddcb3e35283e6dafa27adec1
43 lines
1.0 KiB
Plaintext
43 lines
1.0 KiB
Plaintext
============================
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C-SKY Multi-processors Timer
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============================
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C-SKY multi-processors timer is designed for C-SKY SMP system and the
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regs is accessed by cpu co-processor 4 registers with mtcr/mfcr.
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- PTIM_CTLR "cr<0, 14>" Control reg to start reset timer.
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- PTIM_TSR "cr<1, 14>" Interrupt cleanup status reg.
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- PTIM_CCVR "cr<3, 14>" Current counter value reg.
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- PTIM_LVR "cr<6, 14>" Window value reg to triger next event.
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==============================
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timer node bindings definition
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==============================
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Description: Describes SMP timer
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PROPERTIES
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- compatible
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Usage: required
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Value type: <string>
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Definition: must be "csky,mptimer"
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- clocks
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Usage: required
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Value type: <node>
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Definition: must be input clk node
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- interrupts
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Usage: required
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Value type: <u32>
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Definition: must be timer irq num defined by soc
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Examples:
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---------
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timer: timer {
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compatible = "csky,mptimer";
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clocks = <&dummy_apb_clk>;
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interrupts = <16>;
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interrupt-parent = <&intc>;
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};
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