mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 04:59:05 +00:00
a9af497c5a
Add initial device tree bindings to support CPU and cluster low power modes on Lahaina. To do low power modes, switch over the enable-method of the CPU to PSCI. Also add bindings for RPMH, master and DDR stats. Since PSCI firmware will read the PSCI state id from cpu nodes, add cpu-idle-states to the cpu DT bindings. Change-Id: I7d9ef6f89e1a9b0987df3b7511f5b0b5ed627abc
130 lines
3.1 KiB
Plaintext
130 lines
3.1 KiB
Plaintext
&soc {
|
|
qcom,lpm-levels {
|
|
compatible = "qcom,lpm-levels";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
qcom,pm-cluster@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
idle-state-name = "L3";
|
|
qcom,clstr-tmr-add = <1000>;
|
|
qcom,psci-mode-shift = <4>;
|
|
qcom,psci-mode-mask = <0xfff>;
|
|
|
|
CLUSTER_WFI: qcom,pm-cluster-level@0 { /* D1 */
|
|
reg = <0>;
|
|
compatible = "arm,idle-state";
|
|
idle-state-name = "l3-wfi";
|
|
entry-latency-us = <48>;
|
|
exit-latency-us = <51>;
|
|
min-residency-us = <99>;
|
|
arm,psci-suspend-param = <0x10>;
|
|
qcom,psci-mode = <0x1>;
|
|
};
|
|
|
|
CLUSTER_OFF: qcom,pm-cluster-level@1 { /* AOSS sleep */
|
|
reg = <1>;
|
|
compatible = "arm,idle-state";
|
|
idle-state-name = "llcc-off";
|
|
entry-latency-us = <3263>;
|
|
exit-latency-us = <6562>;
|
|
min-residency-us = <9987>;
|
|
arm,psci-suspend-param = <0xc240>;
|
|
qcom,psci-mode = <0xc24>;
|
|
qcom,is-reset;
|
|
qcom,notify-rpm;
|
|
qcom,min-child-idx = <1>;
|
|
};
|
|
|
|
qcom,pm-cpu@0 {
|
|
reg = <0>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
qcom,psci-mode-shift = <0>;
|
|
qcom,psci-mode-mask = <0xf>;
|
|
qcom,ref-stddev = <500>;
|
|
qcom,tmr-add = <1000>;
|
|
qcom,ref-premature-cnt = <1>;
|
|
qcom,cpu = <&CPU0 &CPU1 &CPU2 &CPU3>;
|
|
|
|
SLVR_WFI: qcom,pm-cpu-level@0 { /* C1 */
|
|
reg = <0>;
|
|
compatible = "arm,idle-state";
|
|
idle-state-name = "wfi";
|
|
entry-latency-us = <57>;
|
|
exit-latency-us = <43>;
|
|
min-residency-us = <100>;
|
|
arm,psci-suspend-param = <0x1>;
|
|
qcom,psci-cpu-mode = <0x1>;
|
|
};
|
|
|
|
SLVR_RAIL_OFF: qcom,pm-cpu-level@1 { /* C4 */
|
|
reg = <1>;
|
|
compatible = "arm,idle-state";
|
|
idle-state-name = "rail-pc";
|
|
entry-latency-us = <360>;
|
|
exit-latency-us = <531>;
|
|
min-residency-us = <3934>;
|
|
arm,psci-suspend-param = <0x40000004>;
|
|
local-timer-stop;
|
|
qcom,psci-cpu-mode = <0x4>;
|
|
qcom,is-reset;
|
|
qcom,use-broadcast-timer;
|
|
};
|
|
};
|
|
|
|
qcom,pm-cpu@1 {
|
|
reg = <1>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
qcom,psci-mode-shift = <0>;
|
|
qcom,psci-mode-mask = <0xf>;
|
|
qcom,cpu = <&CPU4 &CPU5 &CPU6 &CPU7>;
|
|
|
|
GOLD_WFI: qcom,pm-cpu-level@2 { /* C1 */
|
|
reg = <2>;
|
|
compatible = "arm,idle-state";
|
|
idle-state-name = "wfi";
|
|
entry-latency-us = <57>;
|
|
exit-latency-us = <43>;
|
|
min-residency-us = <83>;
|
|
arm,psci-suspend-param = <0x1>;
|
|
qcom,psci-cpu-mode = <0x1>;
|
|
};
|
|
|
|
GOLD_RAIL_OFF: qcom,pm-cpu-level@3 { /* C4 */
|
|
reg = <3>;
|
|
compatible = "arm,idle-state";
|
|
idle-state-name = "rail-pc";
|
|
entry-latency-us = <702>;
|
|
exit-latency-us = <1061>;
|
|
min-residency-us = <4488>;
|
|
arm,psci-suspend-param = <0x40000004>;
|
|
local-timer-stop;
|
|
qcom,psci-cpu-mode = <0x4>;
|
|
qcom,is-reset;
|
|
qcom,use-broadcast-timer;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
rpmh-master-stats@b221200 {
|
|
compatible = "qcom,rpmh-master-stats-v1";
|
|
reg = <0xb221200 0x60>;
|
|
};
|
|
|
|
soc-sleep-stats@c3f0000 {
|
|
compatible = "qcom,rpmh-sleep-stats";
|
|
reg = <0xc3f0000 0x400>;
|
|
};
|
|
|
|
ddr-stats@c300000 {
|
|
compatible = "qcom,ddr-stats";
|
|
reg = <0xc300000 0x1000>, <0xc3f001c 0x4>;
|
|
reg-names = "phys_addr_base", "offset_addr";
|
|
};
|
|
};
|