Files
kernel_xiaomi_sm8450-device…/bindings/timer/nxp,sysctr-timer.yaml
Elliot Berman b54d17c2f5 bindings: Merge android-mainline (cbf07d5) into msm-waipio
Merge snapshot of bindings from android-mainline commit cbf07d5
("FROMLIST: clk: sunxi-ng: add support for the Allwinner A100 CCU").

Change-Id: Ica9bc8abf055fb28bdcd33dad244e3ba5fe1a04b
2020-09-23 13:47:05 -07:00

55 lines
1.1 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NXP System Counter Module(sys_ctr)
maintainers:
- Bai Ping <ping.bai@nxp.com>
description: |
The system counter(sys_ctr) is a programmable system counter
which provides a shared time base to Cortex A15, A7, A53, A73,
etc. it is intended for use in applications where the counter
is always powered and support multiple, unrelated clocks. The
compare frame inside can be used for timer purpose.
properties:
compatible:
const: nxp,sysctr-timer
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: per
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
timer@306a0000 {
compatible = "nxp,sysctr-timer";
reg = <0x306a0000 0x20000>;
clocks = <&clk_8m>;
clock-names = "per";
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
};