mirror of
https://github.com/Evolution-X-Devices/kernel_xiaomi_sm8450-devicetrees
synced 2026-02-01 08:51:30 +00:00
129 lines
2.5 KiB
Plaintext
129 lines
2.5 KiB
Plaintext
#include "cape.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Ukee SoC";
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compatible = "qcom,ukee";
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qcom,msm-id = <591 0x10000>;
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};
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&msm_gpu {
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qcom,initial-pwrlevel = <6>;
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/delete-node/qcom,gpu-pwrlevels;
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/* Power levels */
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qcom,gpu-pwrlevels {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "qcom,gpu-pwrlevels";
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qcom,gpu-pwrlevel@0 {
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reg = <0>;
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qcom,gpu-freq = <645000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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qcom,bus-freq = <11>;
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qcom,bus-min = <8>;
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qcom,bus-max = <11>;
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qcom,acd-level = <0x882d5ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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};
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qcom,gpu-pwrlevel@1 {
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reg = <1>;
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qcom,gpu-freq = <580000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
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qcom,bus-freq = <8>;
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qcom,bus-min = <6>;
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qcom,bus-max = <11>;
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qcom,acd-level = <0x882e5ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
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};
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qcom,gpu-pwrlevel@2 {
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reg = <2>;
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qcom,gpu-freq = <515000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <6>;
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qcom,bus-max = <8>;
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qcom,acd-level = <0x882e5ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS>;
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};
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qcom,gpu-pwrlevel@3 {
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reg = <3>;
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qcom,gpu-freq = <439000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L2>;
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qcom,bus-freq = <6>;
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qcom,bus-min = <3>;
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qcom,bus-max = <8>;
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qcom,acd-level = <0xc0285ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS>;
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};
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qcom,gpu-pwrlevel@4 {
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reg = <4>;
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qcom,gpu-freq = <364000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
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qcom,bus-freq = <3>;
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qcom,bus-min = <1>;
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qcom,bus-max = <6>;
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qcom,acd-level = <0xc0285ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_SVS>;
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};
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qcom,gpu-pwrlevel@5 {
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reg = <5>;
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qcom,gpu-freq = <324000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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qcom,bus-freq = <2>;
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qcom,bus-min = <1>;
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qcom,bus-max = <6>;
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qcom,acd-level = <0xc02a5ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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};
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qcom,gpu-pwrlevel@6 {
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reg = <6>;
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qcom,gpu-freq = <285000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
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qcom,bus-freq = <2>;
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qcom,bus-min = <1>;
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qcom,bus-max = <5>;
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qcom,acd-level = <0xc02c5ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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};
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qcom,gpu-pwrlevel@7 {
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reg = <7>;
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qcom,gpu-freq = <220000000>;
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qcom,level = <RPMH_REGULATOR_LEVEL_MIN_SVS>;
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qcom,bus-freq = <2>;
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qcom,bus-min = <1>;
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qcom,bus-max = <5>;
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qcom,acd-level = <0xc8285ffd>;
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qcom,cx-level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
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};
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};
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};
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