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thermal: Reconfigure GPU DFS clock to divide by 4

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Program the GPU Light register to make clock divider to be divided
by 4

Bug: 223909471
Test: Local test to verify register value
Signed-off-by: Sayanna Chandula <sayanna@google.com>
Change-Id: If6b3fe9d6cd73cd110e1b6c123b2925c261b5b2a
This commit is contained in:
Sayanna Chandula
2022-04-06 18:42:05 +00:00
parent baed6217b0
commit 14b3315633
1 changed files with 1 additions and 1 deletions
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2
conf/init.gs201.rc
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@@ -873,7 +873,7 @@ on property:vendor.thermal.link_ready=1
write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_light_clk_ratio 0xfff041c1 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu1_heavy_clk_ratio 0xfff041c1 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_heavy_clk_ratio 0xfff041c1 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0xfff04381 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_light_clk_ratio 0xfff041c1 #DFS
write /sys/devices/virtual/pmic/mitigation/clock_ratio/cpu2_light_clk_ratio 0xfff041c3 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/gpu_heavy_clk_ratio 0xfff04385 #OCP
write /sys/devices/virtual/pmic/mitigation/clock_ratio/tpu_heavy_clk_ratio 0xfff041c3 #OCP