mirror of
https://github.com/Evolution-X-Devices/device_google_walleye
synced 2026-01-29 04:45:54 +00:00
kernel-headers: update to 07.00.00.253.024
Change-Id: I4d7e32bc2331159105434f336d443129309d5e55
This commit is contained in:
Thierry Strudel
@@ -416,19 +416,29 @@
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#define WCD9XXX_A_CDC_CLSH_CRC (0xC01)
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#define WCD9XXX_FLYBACK_EN (0x6A4)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_FLYBACK_VNEG_CTRL_1 (0x6A5)
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#define WCD9XXX_FLYBACK_VNEGDAC_CTRL_2 (0x6AF)
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#define WCD9XXX_RX_BIAS_FLYB_BUFF (0x6C7)
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#define WCD9XXX_HPH_L_EN (0x6D3)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_HPH_R_EN (0x6D6)
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#define WCD9XXX_HPH_REFBUFF_UHQA_CTL (0x6DD)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_CLASSH_CTRL_VCL_2 (0x69B)
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#define WCD9XXX_CDC_CLSH_HPH_V_PA (0xC04)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_CDC_RX0_RX_PATH_SEC0 (0xB49)
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#define WCD9XXX_CDC_RX1_RX_PATH_CTL (0xB55)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_CDC_RX2_RX_PATH_CTL (0xB69)
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#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL (0xD41)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_CLASSH_CTRL_CCL_1 (0x69C)
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#define WCD9XXX_CDC_RX1_RX_VOL_CTL (0xB59)
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#define WCD9XXX_CDC_RX1_RX_VOL_MIX_CTL (0xB5C)
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#define WCD9XXX_CDC_RX1_RX_PATH_SEC1 (0xB5E)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define WCD9XXX_CDC_RX2_RX_VOL_CTL (0xB6D)
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#define WCD9XXX_CDC_RX2_RX_VOL_MIX_CTL (0xB70)
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#define WCD9XXX_CDC_RX2_RX_PATH_SEC1 (0xB72)
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#endif
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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@@ -91,66 +91,65 @@ enum cp_mem_usage {
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#define ION_FLAG_FORCE_CONTIGUOUS (1 << 30)
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#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_FLAG_POOL_PREFETCH (1 << 27)
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#define ION_SECURE ION_FLAG_SECURE
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#define ION_FORCE_CONTIGUOUS ION_FLAG_FORCE_CONTIGUOUS
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#define ION_HEAP(bit) (1 << (bit))
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_ADSP_HEAP_NAME "adsp"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_SYSTEM_HEAP_NAME "system"
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#define ION_VMALLOC_HEAP_NAME ION_SYSTEM_HEAP_NAME
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#define ION_KMALLOC_HEAP_NAME "kmalloc"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_AUDIO_HEAP_NAME "audio"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_SF_HEAP_NAME "sf"
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#define ION_MM_HEAP_NAME "mm"
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#define ION_CAMERA_HEAP_NAME "camera_preview"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_IOMMU_HEAP_NAME "iommu"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_MFC_HEAP_NAME "mfc"
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#define ION_SPSS_HEAP_NAME "spss"
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#define ION_WB_HEAP_NAME "wb"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_MM_FIRMWARE_HEAP_NAME "mm_fw"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_PIL1_HEAP_NAME "pil_1"
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#define ION_PIL2_HEAP_NAME "pil_2"
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#define ION_QSECOM_HEAP_NAME "qsecom"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_SECURE_HEAP_NAME "secure_heap"
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_SECURE_DISPLAY_HEAP_NAME "secure_display"
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#define ION_SET_CACHED(__cache) (__cache | ION_FLAG_CACHED)
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#define ION_SET_UNCACHED(__cache) (__cache & ~ION_FLAG_CACHED)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_IS_CACHED(__flags) ((__flags) & ION_FLAG_CACHED)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct ion_flush_data {
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ion_user_handle_t handle;
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int fd;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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void * vaddr;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int offset;
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unsigned int length;
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct ion_prefetch_regions {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int vmid;
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size_t * sizes;
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unsigned int nr_sizes;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct ion_prefetch_data {
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int heap_id;
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unsigned long len;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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struct ion_prefetch_regions * regions;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int nr_regions;
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};
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#define ION_IOC_MSM_MAGIC 'M'
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_IOC_CLEAN_CACHES _IOWR(ION_IOC_MSM_MAGIC, 0, struct ion_flush_data)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_IOC_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 1, struct ion_flush_data)
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#define ION_IOC_CLEAN_INV_CACHES _IOWR(ION_IOC_MSM_MAGIC, 2, struct ion_flush_data)
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#define ION_IOC_PREFETCH _IOWR(ION_IOC_MSM_MAGIC, 3, struct ion_prefetch_data)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define ION_IOC_DRAIN _IOWR(ION_IOC_MSM_MAGIC, 4, struct ion_prefetch_data)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#endif
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File diff suppressed because it is too large
Load Diff
@@ -88,774 +88,833 @@
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMFLAGS_GPUWRITEONLY 0x02000000U
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#define KGSL_MEMFLAGS_FORCE_32BIT 0x100000000ULL
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#define KGSL_SPARSE_BIND_MULTIPLE_TO_PHYS 0x400000000ULL
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#define KGSL_SPARSE_BIND 0x1ULL
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_SPARSE_UNBIND 0x2ULL
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#define KGSL_CACHEMODE_MASK 0x0C000000U
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#define KGSL_CACHEMODE_SHIFT 26
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_CACHEMODE_WRITECOMBINE 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_CACHEMODE_UNCACHED 1
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#define KGSL_CACHEMODE_WRITETHROUGH 2
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#define KGSL_CACHEMODE_WRITEBACK 3
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMFLAGS_USE_CPU_MAP 0x10000000ULL
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMFLAGS_SPARSE_PHYS 0x20000000ULL
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#define KGSL_MEMFLAGS_SPARSE_VIRT 0x40000000ULL
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#define KGSL_MEMTYPE_MASK 0x0000FF00
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#define KGSL_MEMTYPE_SHIFT 8
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#define KGSL_MEMTYPE_OBJECTANY 0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMTYPE_OBJECTANY 0
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#define KGSL_MEMTYPE_FRAMEBUFFER 1
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#define KGSL_MEMTYPE_RENDERBUFFER 2
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#define KGSL_MEMTYPE_ARRAYBUFFER 3
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#define KGSL_MEMTYPE_ELEMENTARRAYBUFFER 4
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMTYPE_ELEMENTARRAYBUFFER 4
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#define KGSL_MEMTYPE_VERTEXARRAYBUFFER 5
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#define KGSL_MEMTYPE_TEXTURE 6
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#define KGSL_MEMTYPE_SURFACE 7
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#define KGSL_MEMTYPE_EGL_SURFACE 8
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMTYPE_EGL_SURFACE 8
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#define KGSL_MEMTYPE_GL 9
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#define KGSL_MEMTYPE_CL 10
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#define KGSL_MEMTYPE_CL_BUFFER_MAP 11
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#define KGSL_MEMTYPE_CL_BUFFER_NOMAP 12
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMTYPE_CL_BUFFER_NOMAP 12
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#define KGSL_MEMTYPE_CL_IMAGE_MAP 13
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#define KGSL_MEMTYPE_CL_IMAGE_NOMAP 14
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#define KGSL_MEMTYPE_CL_KERNEL_STACK 15
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#define KGSL_MEMTYPE_COMMAND 16
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMTYPE_COMMAND 16
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#define KGSL_MEMTYPE_2D 17
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#define KGSL_MEMTYPE_EGL_IMAGE 18
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#define KGSL_MEMTYPE_EGL_SHADOW 19
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#define KGSL_MEMTYPE_MULTISAMPLE 20
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMTYPE_MULTISAMPLE 20
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#define KGSL_MEMTYPE_KERNEL 255
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#define KGSL_MEMALIGN_MASK 0x00FF0000
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#define KGSL_MEMALIGN_SHIFT 16
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enum kgsl_user_mem_type {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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enum kgsl_user_mem_type {
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KGSL_USER_MEM_TYPE_PMEM = 0x00000000,
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KGSL_USER_MEM_TYPE_ASHMEM = 0x00000001,
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KGSL_USER_MEM_TYPE_ADDR = 0x00000002,
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KGSL_USER_MEM_TYPE_ION = 0x00000003,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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KGSL_USER_MEM_TYPE_ION = 0x00000003,
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KGSL_USER_MEM_TYPE_DMABUF = 0x00000003,
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KGSL_USER_MEM_TYPE_MAX = 0x00000007,
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};
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#define KGSL_MEMFLAGS_USERMEM_MASK 0x000000e0
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMFLAGS_USERMEM_MASK 0x000000e0
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#define KGSL_MEMFLAGS_USERMEM_SHIFT 5
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#define KGSL_USERMEM_FLAG(x) (((x) + 1) << KGSL_MEMFLAGS_USERMEM_SHIFT)
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#define KGSL_MEMFLAGS_NOT_USERMEM 0
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#define KGSL_MEMFLAGS_USERMEM_PMEM KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_PMEM)
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_MEMFLAGS_USERMEM_PMEM KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_PMEM)
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#define KGSL_MEMFLAGS_USERMEM_ASHMEM KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ASHMEM)
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#define KGSL_MEMFLAGS_USERMEM_ADDR KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ADDR)
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#define KGSL_MEMFLAGS_USERMEM_ION KGSL_USERMEM_FLAG(KGSL_USER_MEM_TYPE_ION)
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#define KGSL_FLAGS_NORMALMODE 0x00000000
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_FLAGS_NORMALMODE 0x00000000
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#define KGSL_FLAGS_SAFEMODE 0x00000001
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#define KGSL_FLAGS_INITIALIZED0 0x00000002
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#define KGSL_FLAGS_INITIALIZED 0x00000004
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#define KGSL_FLAGS_STARTED 0x00000008
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_FLAGS_STARTED 0x00000008
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#define KGSL_FLAGS_ACTIVE 0x00000010
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#define KGSL_FLAGS_RESERVED0 0x00000020
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#define KGSL_FLAGS_RESERVED1 0x00000040
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#define KGSL_FLAGS_RESERVED2 0x00000080
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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#define KGSL_FLAGS_RESERVED2 0x00000080
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#define KGSL_FLAGS_SOFT_RESET 0x00000100
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#define KGSL_FLAGS_PER_CONTEXT_TIMESTAMPS 0x00000200
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#define KGSL_SYNCOBJ_SERVER_TIMEOUT 2000
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enum kgsl_ctx_reset_stat {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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enum kgsl_ctx_reset_stat {
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KGSL_CTX_STAT_NO_ERROR = 0x00000000,
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KGSL_CTX_STAT_GUILTY_CONTEXT_RESET_EXT = 0x00000001,
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KGSL_CTX_STAT_INNOCENT_CONTEXT_RESET_EXT = 0x00000002,
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KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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KGSL_CTX_STAT_UNKNOWN_CONTEXT_RESET_EXT = 0x00000003
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};
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#define KGSL_CONVERT_TO_MBPS(val) (val * 1000 * 1000U)
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enum kgsl_deviceid {
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KGSL_DEVICE_3D0 = 0x00000000,
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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KGSL_DEVICE_3D0 = 0x00000000,
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KGSL_DEVICE_MAX
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};
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struct kgsl_devinfo {
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unsigned int device_id;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int device_id;
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unsigned int chip_id;
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unsigned int mmu_enabled;
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unsigned long gmem_gpubaseaddr;
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unsigned int gpu_id;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int gpu_id;
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size_t gmem_sizebytes;
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};
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struct kgsl_devmemstore {
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__volatile__ unsigned int soptimestamp;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__volatile__ unsigned int soptimestamp;
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unsigned int sbz;
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__volatile__ unsigned int eoptimestamp;
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unsigned int sbz2;
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__volatile__ unsigned int preempted;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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__volatile__ unsigned int preempted;
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unsigned int sbz3;
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__volatile__ unsigned int ref_wait_ts;
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unsigned int sbz4;
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unsigned int current_context;
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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unsigned int current_context;
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unsigned int sbz5;
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};
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#define KGSL_MEMSTORE_OFFSET(ctxt_id,field) ((ctxt_id) * sizeof(struct kgsl_devmemstore) + offsetof(struct kgsl_devmemstore, field))
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enum kgsl_timestamp_type {
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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enum kgsl_timestamp_type {
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||||
KGSL_TIMESTAMP_CONSUMED = 0x00000001,
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KGSL_TIMESTAMP_RETIRED = 0x00000002,
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KGSL_TIMESTAMP_QUEUED = 0x00000003,
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};
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/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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};
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#define KGSL_PROP_DEVICE_INFO 0x1
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#define KGSL_PROP_DEVICE_SHADOW 0x2
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#define KGSL_PROP_DEVICE_POWER 0x3
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||||
#define KGSL_PROP_SHMEM 0x4
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||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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||||
#define KGSL_PROP_SHMEM 0x4
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||||
#define KGSL_PROP_SHMEM_APERTURES 0x5
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||||
#define KGSL_PROP_MMU_ENABLE 0x6
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#define KGSL_PROP_INTERRUPT_WAITS 0x7
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||||
#define KGSL_PROP_VERSION 0x8
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||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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||||
#define KGSL_PROP_VERSION 0x8
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||||
#define KGSL_PROP_GPU_RESET_STAT 0x9
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#define KGSL_PROP_PWRCTRL 0xE
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#define KGSL_PROP_PWR_CONSTRAINT 0x12
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||||
#define KGSL_PROP_UCHE_GMEM_VADDR 0x13
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||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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||||
#define KGSL_PROP_UCHE_GMEM_VADDR 0x13
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||||
#define KGSL_PROP_SP_GENERIC_MEM 0x14
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#define KGSL_PROP_UCODE_VERSION 0x15
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||||
#define KGSL_PROP_GPMU_VERSION 0x16
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||||
#define KGSL_PROP_HIGHEST_BANK_BIT 0x17
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||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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||||
#define KGSL_PROP_HIGHEST_BANK_BIT 0x17
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||||
#define KGSL_PROP_DEVICE_BITNESS 0x18
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||||
#define KGSL_PROP_DEVICE_QDSS_STM 0x19
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||||
struct kgsl_shadowprop {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
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||||
unsigned long gpuaddr;
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||||
size_t size;
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||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int flags;
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||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_qdss_stm_prop {
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||||
uint64_t gpuaddr;
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||||
uint64_t size;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_version {
|
||||
unsigned int drv_major;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int drv_minor;
|
||||
unsigned int dev_major;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int dev_minor;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_sp_generic_mem {
|
||||
uint64_t local;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t pvt;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_ucode_version {
|
||||
unsigned int pfp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int pm4;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpmu_version {
|
||||
unsigned int major;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int minor;
|
||||
unsigned int features;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define KGSL_PERFCOUNTER_GROUP_CP 0x0
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_RBBM 0x1
|
||||
#define KGSL_PERFCOUNTER_GROUP_PC 0x2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_VFD 0x3
|
||||
#define KGSL_PERFCOUNTER_GROUP_HLSQ 0x4
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_VPC 0x5
|
||||
#define KGSL_PERFCOUNTER_GROUP_TSE 0x6
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_RAS 0x7
|
||||
#define KGSL_PERFCOUNTER_GROUP_UCHE 0x8
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_TP 0x9
|
||||
#define KGSL_PERFCOUNTER_GROUP_SP 0xA
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_RB 0xB
|
||||
#define KGSL_PERFCOUNTER_GROUP_PWR 0xC
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_VBIF 0xD
|
||||
#define KGSL_PERFCOUNTER_GROUP_VBIF_PWR 0xE
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_MH 0xF
|
||||
#define KGSL_PERFCOUNTER_GROUP_PA_SU 0x10
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_SQ 0x11
|
||||
#define KGSL_PERFCOUNTER_GROUP_SX 0x12
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_TCF 0x13
|
||||
#define KGSL_PERFCOUNTER_GROUP_TCM 0x14
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_TCR 0x15
|
||||
#define KGSL_PERFCOUNTER_GROUP_L2 0x16
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_VSC 0x17
|
||||
#define KGSL_PERFCOUNTER_GROUP_CCU 0x18
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_LRZ 0x19
|
||||
#define KGSL_PERFCOUNTER_GROUP_CMP 0x1A
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_ALWAYSON 0x1B
|
||||
#define KGSL_PERFCOUNTER_GROUP_SP_PWR 0x1C
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_TP_PWR 0x1D
|
||||
#define KGSL_PERFCOUNTER_GROUP_RB_PWR 0x1E
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_CCU_PWR 0x1F
|
||||
#define KGSL_PERFCOUNTER_GROUP_UCHE_PWR 0x20
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_CP_PWR 0x21
|
||||
#define KGSL_PERFCOUNTER_GROUP_GPMU_PWR 0x22
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_GROUP_ALWAYSON_PWR 0x23
|
||||
#define KGSL_PERFCOUNTER_GROUP_MAX 0x24
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_PERFCOUNTER_NOT_USED 0xFFFFFFFF
|
||||
#define KGSL_PERFCOUNTER_BROKEN 0xFFFFFFFE
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_ibdesc {
|
||||
unsigned long gpuaddr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long __pad;
|
||||
size_t sizedwords;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int ctrl;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_cmdbatch_profiling_buffer {
|
||||
uint64_t wall_clock_s;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t wall_clock_ns;
|
||||
uint64_t gpu_ticks_queued;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t gpu_ticks_submitted;
|
||||
uint64_t gpu_ticks_retired;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define KGSL_IOC_TYPE 0x09
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_device_getproperty {
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
void * value;
|
||||
size_t sizebytes;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_DEVICE_GETPROPERTY _IOWR(KGSL_IOC_TYPE, 0x2, struct kgsl_device_getproperty)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_device_waittimestamp {
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int timeout;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP _IOW(KGSL_IOC_TYPE, 0x6, struct kgsl_device_waittimestamp)
|
||||
struct kgsl_device_waittimestamp_ctxtid {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int timeout;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID _IOW(KGSL_IOC_TYPE, 0x7, struct kgsl_device_waittimestamp_ctxtid)
|
||||
struct kgsl_ringbuffer_issueibcmds {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int drawctxt_id;
|
||||
unsigned long ibdesc_addr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int numibs;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int flags;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_RINGBUFFER_ISSUEIBCMDS _IOWR(KGSL_IOC_TYPE, 0x10, struct kgsl_ringbuffer_issueibcmds)
|
||||
struct kgsl_cmdstream_readtimestamp {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int type;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_OLD _IOR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP _IOWR(KGSL_IOC_TYPE, 0x11, struct kgsl_cmdstream_readtimestamp)
|
||||
struct kgsl_cmdstream_freememontimestamp {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int timestamp;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP _IOW(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
|
||||
#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_OLD _IOR(KGSL_IOC_TYPE, 0x12, struct kgsl_cmdstream_freememontimestamp)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_drawctxt_create {
|
||||
unsigned int flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int drawctxt_id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_DRAWCTXT_CREATE _IOWR(KGSL_IOC_TYPE, 0x13, struct kgsl_drawctxt_create)
|
||||
struct kgsl_drawctxt_destroy {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int drawctxt_id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_DRAWCTXT_DESTROY _IOW(KGSL_IOC_TYPE, 0x14, struct kgsl_drawctxt_destroy)
|
||||
struct kgsl_map_user_mem {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int fd;
|
||||
unsigned long gpuaddr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
size_t len;
|
||||
size_t offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long hostptr;
|
||||
enum kgsl_user_mem_type memtype;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int flags;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_MAP_USER_MEM _IOWR(KGSL_IOC_TYPE, 0x15, struct kgsl_map_user_mem)
|
||||
struct kgsl_cmdstream_readtimestamp_ctxtid {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int timestamp;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CMDSTREAM_READTIMESTAMP_CTXTID _IOWR(KGSL_IOC_TYPE, 0x16, struct kgsl_cmdstream_readtimestamp_ctxtid)
|
||||
struct kgsl_cmdstream_freememontimestamp_ctxtid {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
unsigned long gpuaddr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int type;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_CMDSTREAM_FREEMEMONTIMESTAMP_CTXTID _IOW(KGSL_IOC_TYPE, 0x17, struct kgsl_cmdstream_freememontimestamp_ctxtid)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_sharedmem_from_pmem {
|
||||
int pmem_fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
unsigned int len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int offset;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_SHAREDMEM_FROM_PMEM _IOWR(KGSL_IOC_TYPE, 0x20, struct kgsl_sharedmem_from_pmem)
|
||||
struct kgsl_sharedmem_free {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_SHAREDMEM_FREE _IOW(KGSL_IOC_TYPE, 0x21, struct kgsl_sharedmem_free)
|
||||
struct kgsl_cff_user_event {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned char cff_opcode;
|
||||
unsigned int op1;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int op2;
|
||||
unsigned int op3;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int op4;
|
||||
unsigned int op5;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[2];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CFF_USER_EVENT _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_cff_user_event)
|
||||
struct kgsl_gmem_desc {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int x;
|
||||
unsigned int y;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int width;
|
||||
unsigned int height;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int pitch;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_buffer_desc {
|
||||
void * hostptr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
int size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int format;
|
||||
unsigned int pitch;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int enabled;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_bind_gmem_shadow {
|
||||
unsigned int drawctxt_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gmem_desc gmem_desc;
|
||||
unsigned int shadow_x;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int shadow_y;
|
||||
struct kgsl_buffer_desc shadow_buffer;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int buffer_id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_DRAWCTXT_BIND_GMEM_SHADOW _IOW(KGSL_IOC_TYPE, 0x22, struct kgsl_bind_gmem_shadow)
|
||||
struct kgsl_sharedmem_from_vmalloc {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
unsigned int hostptr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int flags;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_SHAREDMEM_FROM_VMALLOC _IOWR(KGSL_IOC_TYPE, 0x23, struct kgsl_sharedmem_from_vmalloc)
|
||||
#define IOCTL_KGSL_SHAREDMEM_FLUSH_CACHE _IOW(KGSL_IOC_TYPE, 0x24, struct kgsl_sharedmem_free)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_drawctxt_set_bin_base_offset {
|
||||
unsigned int drawctxt_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int offset;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_DRAWCTXT_SET_BIN_BASE_OFFSET _IOW(KGSL_IOC_TYPE, 0x25, struct kgsl_drawctxt_set_bin_base_offset)
|
||||
enum kgsl_cmdwindow_type {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
KGSL_CMDWINDOW_MIN = 0x00000000,
|
||||
KGSL_CMDWINDOW_2D = 0x00000000,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
KGSL_CMDWINDOW_3D = 0x00000001,
|
||||
KGSL_CMDWINDOW_MMU = 0x00000002,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
KGSL_CMDWINDOW_ARBITER = 0x000000FF,
|
||||
KGSL_CMDWINDOW_MAX = 0x000000FF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_cmdwindow_write {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum kgsl_cmdwindow_type target;
|
||||
unsigned int addr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int data;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CMDWINDOW_WRITE _IOW(KGSL_IOC_TYPE, 0x2e, struct kgsl_cmdwindow_write)
|
||||
struct kgsl_gpumem_alloc {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
size_t size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int flags;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUMEM_ALLOC _IOWR(KGSL_IOC_TYPE, 0x2f, struct kgsl_gpumem_alloc)
|
||||
struct kgsl_cff_syncmem {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
size_t len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[2];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CFF_SYNCMEM _IOW(KGSL_IOC_TYPE, 0x30, struct kgsl_cff_syncmem)
|
||||
struct kgsl_timestamp_event {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int type;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
void * priv;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
size_t len;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_TIMESTAMP_EVENT_OLD _IOW(KGSL_IOC_TYPE, 0x31, struct kgsl_timestamp_event)
|
||||
#define KGSL_TIMESTAMP_EVENT_GENLOCK 1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_timestamp_event_genlock {
|
||||
int handle;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define KGSL_TIMESTAMP_EVENT_FENCE 2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_timestamp_event_fence {
|
||||
int fence_fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SETPROPERTY _IOW(KGSL_IOC_TYPE, 0x32, struct kgsl_device_getproperty)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_TIMESTAMP_EVENT _IOWR(KGSL_IOC_TYPE, 0x33, struct kgsl_timestamp_event)
|
||||
struct kgsl_gpumem_alloc_id {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
unsigned int flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
size_t size;
|
||||
size_t mmapsize;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
unsigned long __pad[2];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_GPUMEM_ALLOC_ID _IOWR(KGSL_IOC_TYPE, 0x34, struct kgsl_gpumem_alloc_id)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpumem_free_id {
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUMEM_FREE_ID _IOWR(KGSL_IOC_TYPE, 0x35, struct kgsl_gpumem_free_id)
|
||||
struct kgsl_gpumem_get_info {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int flags;
|
||||
size_t size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
size_t mmapsize;
|
||||
unsigned long useraddr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long __pad[4];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUMEM_GET_INFO _IOWR(KGSL_IOC_TYPE, 0x36, struct kgsl_gpumem_get_info)
|
||||
struct kgsl_gpumem_sync_cache {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long gpuaddr;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int op;
|
||||
size_t offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
size_t length;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_GPUMEM_CACHE_CLEAN (1 << 0)
|
||||
#define KGSL_GPUMEM_CACHE_TO_GPU KGSL_GPUMEM_CACHE_CLEAN
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_GPUMEM_CACHE_INV (1 << 1)
|
||||
#define KGSL_GPUMEM_CACHE_FROM_GPU KGSL_GPUMEM_CACHE_INV
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_GPUMEM_CACHE_FLUSH (KGSL_GPUMEM_CACHE_CLEAN | KGSL_GPUMEM_CACHE_INV)
|
||||
#define KGSL_GPUMEM_CACHE_RANGE (1 << 31U)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUMEM_SYNC_CACHE _IOW(KGSL_IOC_TYPE, 0x37, struct kgsl_gpumem_sync_cache)
|
||||
struct kgsl_perfcounter_get {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int groupid;
|
||||
unsigned int countable;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int offset;
|
||||
unsigned int offset_hi;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_PERFCOUNTER_GET _IOWR(KGSL_IOC_TYPE, 0x38, struct kgsl_perfcounter_get)
|
||||
struct kgsl_perfcounter_put {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int groupid;
|
||||
unsigned int countable;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[2];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_PERFCOUNTER_PUT _IOW(KGSL_IOC_TYPE, 0x39, struct kgsl_perfcounter_put)
|
||||
struct kgsl_perfcounter_query {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int groupid;
|
||||
unsigned int * countables;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int count;
|
||||
unsigned int max_counters;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[2];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_PERFCOUNTER_QUERY _IOWR(KGSL_IOC_TYPE, 0x3A, struct kgsl_perfcounter_query)
|
||||
struct kgsl_perfcounter_read_group {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int groupid;
|
||||
unsigned int countable;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned long long value;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_perfcounter_read {
|
||||
struct kgsl_perfcounter_read_group * reads;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int count;
|
||||
unsigned int __pad[2];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_PERFCOUNTER_READ _IOWR(KGSL_IOC_TYPE, 0x3B, struct kgsl_perfcounter_read)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpumem_sync_cache_bulk {
|
||||
unsigned int * id_list;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int count;
|
||||
unsigned int op;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[2];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUMEM_SYNC_CACHE_BULK _IOWR(KGSL_IOC_TYPE, 0x3C, struct kgsl_gpumem_sync_cache_bulk)
|
||||
struct kgsl_cmd_syncpoint_timestamp {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_cmd_syncpoint_fence {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int fd;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_cmd_syncpoint {
|
||||
int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
void * priv;
|
||||
size_t size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define KGSL_IBDESC_MEMLIST 0x1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_IBDESC_PROFILING_BUFFER 0x2
|
||||
struct kgsl_submit_commands {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
unsigned int flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_ibdesc * cmdlist;
|
||||
unsigned int numcmds;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_cmd_syncpoint * synclist;
|
||||
unsigned int numsyncs;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int timestamp;
|
||||
unsigned int __pad[4];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SUBMIT_COMMANDS _IOWR(KGSL_IOC_TYPE, 0x3D, struct kgsl_submit_commands)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_device_constraint {
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
void * data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
size_t size;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_CONSTRAINT_NONE 0
|
||||
#define KGSL_CONSTRAINT_PWRLEVEL 1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_CONSTRAINT_PWR_MIN 0
|
||||
#define KGSL_CONSTRAINT_PWR_MAX 1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_device_constraint_pwrlevel {
|
||||
unsigned int level;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_syncsource_create {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
unsigned int __pad[3];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SYNCSOURCE_CREATE _IOWR(KGSL_IOC_TYPE, 0x40, struct kgsl_syncsource_create)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_syncsource_destroy {
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[3];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_SYNCSOURCE_DESTROY _IOWR(KGSL_IOC_TYPE, 0x41, struct kgsl_syncsource_destroy)
|
||||
struct kgsl_syncsource_create_fence {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
int fence_fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[4];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_SYNCSOURCE_CREATE_FENCE _IOWR(KGSL_IOC_TYPE, 0x42, struct kgsl_syncsource_create_fence)
|
||||
struct kgsl_syncsource_signal_fence {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
int fence_fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int __pad[4];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_SYNCSOURCE_SIGNAL_FENCE _IOWR(KGSL_IOC_TYPE, 0x43, struct kgsl_syncsource_signal_fence)
|
||||
struct kgsl_cff_sync_gpuobj {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t offset;
|
||||
uint64_t length;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_CFF_SYNC_GPUOBJ _IOW(KGSL_IOC_TYPE, 0x44, struct kgsl_cff_sync_gpuobj)
|
||||
struct kgsl_gpuobj_alloc {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t size;
|
||||
uint64_t flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t va_len;
|
||||
uint64_t mmapsize;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
unsigned int metadata_len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t metadata;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_GPUOBJ_ALLOC_METADATA_MAX 64
|
||||
#define IOCTL_KGSL_GPUOBJ_ALLOC _IOWR(KGSL_IOC_TYPE, 0x45, struct kgsl_gpuobj_alloc)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpuobj_free {
|
||||
uint64_t flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t priv;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int type;
|
||||
unsigned int len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define KGSL_GPUOBJ_FREE_ON_EVENT 1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_GPU_EVENT_TIMESTAMP 1
|
||||
#define KGSL_GPU_EVENT_FENCE 2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpu_event_timestamp {
|
||||
unsigned int context_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int timestamp;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpu_event_fence {
|
||||
int fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_GPUOBJ_FREE _IOW(KGSL_IOC_TYPE, 0x46, struct kgsl_gpuobj_free)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpuobj_info {
|
||||
uint64_t gpuaddr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t flags;
|
||||
uint64_t size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t va_len;
|
||||
uint64_t va_addr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUOBJ_INFO _IOWR(KGSL_IOC_TYPE, 0x47, struct kgsl_gpuobj_info)
|
||||
struct kgsl_gpuobj_import {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t priv;
|
||||
uint64_t priv_len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t flags;
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_gpuobj_import_dma_buf {
|
||||
int fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_gpuobj_import_useraddr {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t virtaddr;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUOBJ_IMPORT _IOWR(KGSL_IOC_TYPE, 0x48, struct kgsl_gpuobj_import)
|
||||
struct kgsl_gpuobj_sync_obj {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t offset;
|
||||
uint64_t length;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
unsigned int op;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_gpuobj_sync {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t objs;
|
||||
unsigned int obj_len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int count;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUOBJ_SYNC _IOW(KGSL_IOC_TYPE, 0x49, struct kgsl_gpuobj_sync)
|
||||
struct kgsl_command_object {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t offset;
|
||||
uint64_t gpuaddr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t size;
|
||||
unsigned int flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_command_syncpoint {
|
||||
uint64_t priv;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t size;
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_gpu_command {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t flags;
|
||||
uint64_t cmdlist;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int cmdsize;
|
||||
unsigned int numcmds;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t objlist;
|
||||
unsigned int objsize;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int numobjs;
|
||||
uint64_t synclist;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int syncsize;
|
||||
unsigned int numsyncs;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int context_id;
|
||||
unsigned int timestamp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_GPU_COMMAND _IOWR(KGSL_IOC_TYPE, 0x4A, struct kgsl_gpu_command)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct kgsl_preemption_counters_query {
|
||||
uint64_t counters;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int size_user;
|
||||
unsigned int size_priority_level;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int max_priority_level;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_PREEMPTIONCOUNTER_QUERY _IOWR(KGSL_IOC_TYPE, 0x4B, struct kgsl_preemption_counters_query)
|
||||
#define KGSL_GPUOBJ_SET_INFO_METADATA (1 << 0)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define KGSL_GPUOBJ_SET_INFO_TYPE (1 << 1)
|
||||
struct kgsl_gpuobj_set_info {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t flags;
|
||||
uint64_t metadata;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int id;
|
||||
unsigned int metadata_len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int type;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOCTL_KGSL_GPUOBJ_SET_INFO _IOW(KGSL_IOC_TYPE, 0x4C, struct kgsl_gpuobj_set_info)
|
||||
struct kgsl_sparse_phys_alloc {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t size;
|
||||
uint64_t pagesize;
|
||||
uint64_t flags;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SPARSE_PHYS_ALLOC _IOWR(KGSL_IOC_TYPE, 0x50, struct kgsl_sparse_phys_alloc)
|
||||
struct kgsl_sparse_phys_free {
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SPARSE_PHYS_FREE _IOW(KGSL_IOC_TYPE, 0x51, struct kgsl_sparse_phys_free)
|
||||
struct kgsl_sparse_virt_alloc {
|
||||
uint64_t size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t pagesize;
|
||||
uint64_t flags;
|
||||
uint64_t gpuaddr;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SPARSE_VIRT_ALLOC _IOWR(KGSL_IOC_TYPE, 0x52, struct kgsl_sparse_virt_alloc)
|
||||
struct kgsl_sparse_virt_free {
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOCTL_KGSL_SPARSE_VIRT_FREE _IOW(KGSL_IOC_TYPE, 0x53, struct kgsl_sparse_virt_free)
|
||||
struct kgsl_sparse_binding_object {
|
||||
uint64_t virtoffset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t physoffset;
|
||||
uint64_t size;
|
||||
uint64_t flags;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct kgsl_sparse_bind {
|
||||
uint64_t list;
|
||||
unsigned int id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int size;
|
||||
unsigned int count;
|
||||
};
|
||||
#define IOCTL_KGSL_SPARSE_BIND _IOW(KGSL_IOC_TYPE, 0x54, struct kgsl_sparse_bind)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#endif
|
||||
|
||||
|
||||
@@ -1137,6 +1137,11 @@ struct mdss_ad_cfg {
|
||||
uint32_t bl_ctrl_mode;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdss_ad_bl_cfg {
|
||||
uint32_t bl_min_delta;
|
||||
uint32_t bl_low_limit;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdss_ad_init_cfg {
|
||||
uint32_t ops;
|
||||
union {
|
||||
@@ -1186,236 +1191,240 @@ enum {
|
||||
mdp_op_max,
|
||||
mdp_op_pa_dither_cfg,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_op_ad_bl_cfg,
|
||||
mdp_op_pp_max = 255,
|
||||
};
|
||||
#define mdp_op_pa_dither_cfg mdp_op_pa_dither_cfg
|
||||
#define mdp_op_pp_max mdp_op_pp_max
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define mdp_op_pp_max mdp_op_pp_max
|
||||
#define mdp_op_ad_bl_cfg mdp_op_ad_bl_cfg
|
||||
enum {
|
||||
WB_FORMAT_NV12,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
WB_FORMAT_RGB_565,
|
||||
WB_FORMAT_RGB_888,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
WB_FORMAT_xRGB_8888,
|
||||
WB_FORMAT_ARGB_8888,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
WB_FORMAT_BGRA_8888,
|
||||
WB_FORMAT_BGRX_8888,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
WB_FORMAT_ARGB_8888_INPUT_ALPHA
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msmfb_mdp_pp {
|
||||
uint32_t op;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
union {
|
||||
struct mdp_pcc_cfg_data pcc_cfg_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_csc_cfg_data csc_cfg_data;
|
||||
struct mdp_lut_cfg_data lut_cfg_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_qseed_cfg_data qseed_cfg_data;
|
||||
struct mdp_bl_scale_data bl_scale_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_pa_cfg_data pa_cfg_data;
|
||||
struct mdp_pa_v2_cfg_data pa_v2_cfg_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_dither_cfg_data dither_cfg_data;
|
||||
struct mdp_gamut_cfg_data gamut_cfg_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_calib_config_data calib_cfg;
|
||||
struct mdss_ad_init_cfg ad_init_cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdss_calib_cfg mdss_calib_cfg;
|
||||
struct mdss_ad_input ad_input;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_calib_config_buffer calib_buffer;
|
||||
struct mdp_calib_dcm_state calib_dcm;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdss_ad_bl_cfg ad_bl_cfg;
|
||||
} data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define FB_METADATA_VIDEO_INFO_CODE_SUPPORT 1
|
||||
enum {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
metadata_op_none,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
metadata_op_base_blend,
|
||||
metadata_op_frame_rate,
|
||||
metadata_op_vic,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
metadata_op_wb_format,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
metadata_op_wb_secure,
|
||||
metadata_op_get_caps,
|
||||
metadata_op_crc,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
metadata_op_get_ion_fd,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
metadata_op_max
|
||||
};
|
||||
struct mdp_blend_cfg {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t is_premultiplied;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_mixer_cfg {
|
||||
uint32_t writeback_format;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t alpha;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdss_hw_caps {
|
||||
uint32_t mdp_rev;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t rgb_pipes;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t vig_pipes;
|
||||
uint8_t dma_pipes;
|
||||
uint8_t max_smp_cnt;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t smp_per_pipe;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t features;
|
||||
};
|
||||
struct msmfb_metadata {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t op;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t flags;
|
||||
union {
|
||||
struct mdp_misr misr_request;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_blend_cfg blend_cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_mixer_cfg mixer_cfg;
|
||||
uint32_t panel_frame_rate;
|
||||
uint32_t video_info_code;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdss_hw_caps caps;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t secure_en;
|
||||
int fbmem_ionfd;
|
||||
} data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MDP_MAX_FENCE_FD 32
|
||||
#define MDP_BUF_SYNC_FLAG_WAIT 1
|
||||
#define MDP_BUF_SYNC_FLAG_RETIRE_FENCE 0x10
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_buf_sync {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t flags;
|
||||
uint32_t acq_fen_fd_cnt;
|
||||
uint32_t session_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int * acq_fen_fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int * rel_fen_fd;
|
||||
int * retire_fen_fd;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_async_blit_req_list {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_buf_sync sync;
|
||||
uint32_t count;
|
||||
struct mdp_blit_req req[];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MDP_DISPLAY_COMMIT_OVERLAY 1
|
||||
struct mdp_display_commit {
|
||||
uint32_t flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t wait_for_finish;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct fb_var_screeninfo var;
|
||||
struct mdp_rect l_roi;
|
||||
struct mdp_rect r_roi;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_overlay_list {
|
||||
uint32_t num_overlays;
|
||||
struct mdp_overlay * * overlay_list;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t processed_overlays;
|
||||
};
|
||||
struct mdp_page_protection {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t page_protection;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_mixer_info {
|
||||
int pndx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int pnum;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int ptype;
|
||||
int mixer_num;
|
||||
int z_order;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MAX_PIPE_PER_MIXER 7
|
||||
struct msmfb_mixer_info_req {
|
||||
int mixer_num;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int cnt;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_mixer_info info[MAX_PIPE_PER_MIXER];
|
||||
};
|
||||
enum {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
DISPLAY_SUBSYSTEM_ID,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ROTATOR_SUBSYSTEM_ID,
|
||||
};
|
||||
enum {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MDP_IOMMU_DOMAIN_CP,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MDP_IOMMU_DOMAIN_NS,
|
||||
};
|
||||
enum {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MDP_WRITEBACK_MIRROR_OFF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MDP_WRITEBACK_MIRROR_ON,
|
||||
MDP_WRITEBACK_MIRROR_PAUSE,
|
||||
MDP_WRITEBACK_MIRROR_RESUME,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum mdp_color_space {
|
||||
MDP_CSC_ITU_R_601,
|
||||
MDP_CSC_ITU_R_601_FR,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MDP_CSC_ITU_R_709,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum {
|
||||
mdp_igc_v1_7 = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_igc_vmax,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_hist_lut_v1_7,
|
||||
mdp_hist_lut_vmax,
|
||||
mdp_pgc_v1_7,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_pgc_vmax,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_dither_v1_7,
|
||||
mdp_dither_vmax,
|
||||
mdp_gamut_v1_7,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_gamut_vmax,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_pa_v1_7,
|
||||
mdp_pa_vmax,
|
||||
mdp_pcc_v1_7,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_pcc_vmax,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_pp_legacy,
|
||||
mdp_dither_pa_v1_7,
|
||||
mdp_igc_v3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
mdp_pp_unknown = 255
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define mdp_dither_pa_v1_7 mdp_dither_pa_v1_7
|
||||
#define mdp_pp_unknown mdp_pp_unknown
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define mdp_igc_v3 mdp_igc_v3
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum {
|
||||
IGC = 1,
|
||||
PCC,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
GC,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
PA,
|
||||
GAMUT,
|
||||
DITHER,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
QSEED,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
HIST_LUT,
|
||||
HIST,
|
||||
PP_FEATURE_MAX,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
PA_DITHER,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
PP_MAX_FEATURES = 25,
|
||||
};
|
||||
#define PA_DITHER PA_DITHER
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define PP_MAX_FEATURES PP_MAX_FEATURES
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_pp_feature_version {
|
||||
uint32_t pp_feature;
|
||||
uint32_t version_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#endif
|
||||
|
||||
|
||||
@@ -56,215 +56,217 @@
|
||||
#define MDP_COMMIT_WAIT_FOR_FINISH 0x02
|
||||
#define MDP_COMMIT_SYNC_FENCE_WAIT 0x04
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MDP_COMMIT_AVR_EN 0x08
|
||||
#define MDP_COMMIT_AVR_ONE_SHOT_MODE 0x10
|
||||
#define MDP_COMMIT_CWB_EN 0x800
|
||||
#define MDP_COMMIT_CWB_DSPP 0x1000
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MDP_COMMIT_VERSION_1_0 0x00010000
|
||||
struct mdp_layer_plane {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int fd;
|
||||
uint32_t offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stride;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_layer_buffer {
|
||||
uint32_t width;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t height;
|
||||
uint32_t format;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_layer_plane planes[MAX_PLANES];
|
||||
uint32_t plane_count;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mult_factor comp_ratio;
|
||||
int fence;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t reserved;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_input_layer {
|
||||
uint32_t flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t pipe_ndx;
|
||||
uint8_t horz_deci;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t vert_deci;
|
||||
uint8_t alpha;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t z_order;
|
||||
uint32_t transp_mask;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t bg_color;
|
||||
enum mdss_mdp_blend_op blend_op;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum mdp_color_space color_space;
|
||||
struct mdp_rect src_rect;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_rect dst_rect;
|
||||
void * scale;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_layer_buffer buffer;
|
||||
void * pp_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int error_code;
|
||||
uint32_t reserved[6];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_output_layer {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t flags;
|
||||
uint32_t writeback_ndx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_layer_buffer buffer;
|
||||
uint32_t reserved[6];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_destination_scaler_data {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t flags;
|
||||
uint32_t dest_scaler_ndx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t lm_width;
|
||||
uint32_t lm_height;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t scale;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_layer_commit_v1 {
|
||||
uint32_t flags;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int release_fence;
|
||||
struct mdp_rect left_roi;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_rect right_roi;
|
||||
struct mdp_input_layer * input_layers;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t input_layer_cnt;
|
||||
struct mdp_output_layer * output_layer;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int retire_fence;
|
||||
void * dest_scaler;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t dest_scaler_cnt;
|
||||
uint32_t reserved[MDP_LAYER_COMMIT_V1_PAD];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_layer_commit {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t version;
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_layer_commit_v1 commit_v1;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_point {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t x;
|
||||
uint32_t y;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_async_layer {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t flags;
|
||||
uint32_t pipe_ndx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_point src;
|
||||
struct mdp_point dst;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int error_code;
|
||||
uint32_t reserved[3];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct mdp_position_update {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_async_layer * input_layers;
|
||||
uint32_t input_layer_cnt;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define MAX_DET_CURVES 3
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_det_enhance_data {
|
||||
uint32_t enable;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int16_t sharpen_level1;
|
||||
int16_t sharpen_level2;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t clip;
|
||||
uint16_t limit;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t thr_quiet;
|
||||
uint16_t thr_dieout;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t thr_low;
|
||||
uint16_t thr_high;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t prec_shift;
|
||||
int16_t adjust_a[MAX_DET_CURVES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int16_t adjust_b[MAX_DET_CURVES];
|
||||
int16_t adjust_c[MAX_DET_CURVES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define ENABLE_SCALE 0x1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ENABLE_DETAIL_ENHANCE 0x2
|
||||
#define ENABLE_DIRECTION_DETECTION 0x4
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SCALER_LUT_SWAP 0x1
|
||||
#define SCALER_LUT_DIR_WR 0x2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SCALER_LUT_Y_CIR_WR 0x4
|
||||
#define SCALER_LUT_UV_CIR_WR 0x8
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SCALER_LUT_Y_SEP_WR 0x10
|
||||
#define SCALER_LUT_UV_SEP_WR 0x20
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define FILTER_EDGE_DIRECTED_2D 0x0
|
||||
#define FILTER_CIRCULAR_2D 0x1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define FILTER_SEPARABLE_1D 0x2
|
||||
#define FILTER_BILINEAR 0x3
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define FILTER_ALPHA_DROP_REPEAT 0x0
|
||||
#define FILTER_ALPHA_BILINEAR 0x1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_scale_data_v2 {
|
||||
uint32_t enable;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int32_t init_phase_x[MAX_PLANES];
|
||||
int32_t phase_step_x[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int32_t init_phase_y[MAX_PLANES];
|
||||
int32_t phase_step_y[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t num_ext_pxls_left[MAX_PLANES];
|
||||
uint32_t num_ext_pxls_right[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t num_ext_pxls_top[MAX_PLANES];
|
||||
uint32_t num_ext_pxls_btm[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int32_t left_ftch[MAX_PLANES];
|
||||
int32_t left_rpt[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int32_t right_ftch[MAX_PLANES];
|
||||
int32_t right_rpt[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t top_rpt[MAX_PLANES];
|
||||
uint32_t btm_rpt[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t top_ftch[MAX_PLANES];
|
||||
uint32_t btm_ftch[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t roi_w[MAX_PLANES];
|
||||
uint32_t preload_x[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t preload_y[MAX_PLANES];
|
||||
uint32_t src_width[MAX_PLANES];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t src_height[MAX_PLANES];
|
||||
uint32_t dst_width;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t dst_height;
|
||||
uint32_t y_rgb_filter_cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t uv_filter_cfg;
|
||||
uint32_t alpha_filter_cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t blend_cfg;
|
||||
uint32_t lut_flag;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t dir_lut_idx;
|
||||
uint32_t y_rgb_cir_lut_idx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t uv_cir_lut_idx;
|
||||
uint32_t y_rgb_sep_lut_idx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t uv_sep_lut_idx;
|
||||
struct mdp_det_enhance_data detail_enhance;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t reserved[8];
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct mdp_scale_luts_info {
|
||||
uint64_t dir_lut;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t cir_lut;
|
||||
uint64_t sep_lut;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t dir_lut_size;
|
||||
uint32_t cir_lut_size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t sep_lut_size;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MDP_QSEED3_LUT_CFG 0x1
|
||||
struct mdp_set_cfg {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t flags;
|
||||
uint32_t len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint64_t payload;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#endif
|
||||
|
||||
|
||||
@@ -861,592 +861,616 @@ enum v4l2_mpeg_vidc_extradata {
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI V4L2_MPEG_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI
|
||||
V4L2_MPEG_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI = 27,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_PQ_INFO V4L2_MPEG_VIDC_EXTRADATA_PQ_INFO
|
||||
V4L2_MPEG_VIDC_EXTRADATA_PQ_INFO = 28,
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_VUI_DISPLAY V4L2_MPEG_VIDC_EXTRADATA_VUI_DISPLAY
|
||||
V4L2_MPEG_VIDC_EXTRADATA_VUI_DISPLAY = 29,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_VPX_COLORSPACE V4L2_MPEG_VIDC_EXTRADATA_VPX_COLORSPACE
|
||||
V4L2_MPEG_VIDC_EXTRADATA_VPX_COLORSPACE = 30,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 26)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_perf_level {
|
||||
V4L2_CID_MPEG_VIDC_PERF_LEVEL_NOMINAL = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_PERF_LEVEL_PERFORMANCE = 1,
|
||||
V4L2_CID_MPEG_VIDC_PERF_LEVEL_TURBO = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_GOB (V4L2_CID_MPEG_MSM_VIDC_BASE + 27)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDEO_MULTI_SLICE_DELIVERY_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 28)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_H264_VUI_TIMING_INFO (V4L2_CID_MPEG_MSM_VIDC_BASE + 29)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_h264_vui_timing_info {
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_VUI_TIMING_INFO_DISABLED = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_VUI_TIMING_INFO_ENABLED = 1
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_ALLOC_MODE_INPUT (V4L2_CID_MPEG_MSM_VIDC_BASE + 30)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_ALLOC_MODE_OUTPUT (V4L2_CID_MPEG_MSM_VIDC_BASE + 31)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_alloc_mode_type {
|
||||
V4L2_MPEG_VIDC_VIDEO_STATIC = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_RING = 1,
|
||||
V4L2_MPEG_VIDC_VIDEO_DYNAMIC = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_FRAME_ASSEMBLY (V4L2_CID_MPEG_MSM_VIDC_BASE + 32)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_assembly {
|
||||
V4L2_MPEG_VIDC_FRAME_ASSEMBLY_DISABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_FRAME_ASSEMBLY_ENABLE = 1,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VP8_PROFILE_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 33)
|
||||
enum v4l2_mpeg_vidc_video_vp8_profile_level {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_VP8_UNUSED,
|
||||
V4L2_MPEG_VIDC_VIDEO_VP8_VERSION_0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_VP8_VERSION_1,
|
||||
V4L2_MPEG_VIDC_VIDEO_VP8_VERSION_2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_VP8_VERSION_3,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_H264_VUI_BITSTREAM_RESTRICT (V4L2_CID_MPEG_MSM_VIDC_BASE + 34)
|
||||
enum v4l2_mpeg_vidc_video_h264_vui_bitstream_restrict {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_VUI_BITSTREAM_RESTRICT_DISABLED = 0,
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_VUI_BITSTREAM_RESTRICT_ENABLED = 1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_PRESERVE_TEXT_QUALITY (V4L2_CID_MPEG_MSM_VIDC_BASE + 35)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_preserve_text_quality {
|
||||
V4L2_MPEG_VIDC_VIDEO_PRESERVE_TEXT_QUALITY_DISABLED = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_PRESERVE_TEXT_QUALITY_ENABLED = 1
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_DEINTERLACE (V4L2_CID_MPEG_MSM_VIDC_BASE + 36)
|
||||
enum v4l2_mpeg_vidc_video_deinterlace {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_DEINTERLACE_DISABLED = 0,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_DEINTERLACE_ENABLED = 1
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MPEG4_TIME_RESOLUTION (V4L2_CID_MPEG_MSM_VIDC_BASE + 37)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_STREAM_OUTPUT_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 38)
|
||||
enum v4l2_mpeg_vidc_video_decoder_multi_stream {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_STREAM_OUTPUT_PRIMARY = 0,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_STREAM_OUTPUT_SECONDARY = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_SCS_THRESHOLD (V4L2_CID_MPEG_MSM_VIDC_BASE + 39)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MPEG2_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 40)
|
||||
enum v4l2_mpeg_vidc_video_mpeg2_level {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_LEVEL_0 = 0,
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_LEVEL_1 = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_LEVEL_2 = 2,
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_LEVEL_3 = 3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MPEG2_PROFILE (V4L2_CID_MPEG_MSM_VIDC_BASE + 41)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_mpeg2_profile {
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_PROFILE_SIMPLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_PROFILE_MAIN = 1,
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_PROFILE_422 = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_PROFILE_SNR_SCALABLE = 3,
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_PROFILE_SPATIAL_SCALABLE = 4,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_MPEG2_PROFILE_HIGH = 5,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_REQUEST_SEQ_HEADER (V4L2_CID_MPEG_MSM_VIDC_BASE + 42)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MVC_BUFFER_LAYOUT (V4L2_CID_MPEG_MSM_VIDC_BASE + 43)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_mvc_layout {
|
||||
V4L2_MPEG_VIDC_VIDEO_MVC_SEQUENTIAL = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_MVC_TOP_BOTTOM = 1
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VP8_MIN_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 44)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VP8_MAX_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 45)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_CONCEAL_COLOR (V4L2_CID_MPEG_MSM_VIDC_BASE + 46)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_LTRMODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 47)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_ltrmode {
|
||||
V4L2_MPEG_VIDC_VIDEO_LTR_MODE_DISABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_LTR_MODE_MANUAL = 1,
|
||||
V4L2_MPEG_VIDC_VIDEO_LTR_MODE_PERIODIC = 2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_LTRCOUNT (V4L2_CID_MPEG_MSM_VIDC_BASE + 48)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_USELTRFRAME (V4L2_CID_MPEG_MSM_VIDC_BASE + 49)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MARKLTRFRAME (V4L2_CID_MPEG_MSM_VIDC_BASE + 50)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_HIER_P_NUM_LAYERS (V4L2_CID_MPEG_MSM_VIDC_BASE + 51)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 52)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_rate_control_timestamp_mode {
|
||||
V4L2_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE_HONOR = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_RATE_CONTROL_TIMESTAMP_MODE_IGNORE = 1,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_ENABLE_INITIAL_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 53)
|
||||
enum vl42_mpeg_vidc_video_enable_initial_qp {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_ENABLE_INITIAL_QP_IFRAME = 0x1,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_ENABLE_INITIAL_QP_PFRAME = 0x2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_ENABLE_INITIAL_QP_BFRAME = 0x4,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_I_FRAME_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 54)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_P_FRAME_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 55)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_B_FRAME_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 56)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_IFRAME_X_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 57)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_PFRAME_X_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 58)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_BFRAME_X_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 59)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_IFRAME_Y_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 60)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_PFRAME_Y_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 61)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_BFRAME_Y_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 62)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE (V4L2_CID_MPEG_MSM_VIDC_BASE + 63)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_BUFFER_SIZE_LIMIT (V4L2_CID_MPEG_MSM_VIDC_BASE + 64)
|
||||
enum vl42_mpeg_vidc_video_vpx_error_resilience {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_DISABLED = 0,
|
||||
V4L2_MPEG_VIDC_VIDEO_VPX_ERROR_RESILIENCE_ENABLED = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_HEVC_PROFILE (V4L2_CID_MPEG_MSM_VIDC_BASE + 65)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_video_hevc_profile {
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_PROFILE_MAIN = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_PROFILE_MAIN10 = 1,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_PROFILE_MAIN_STILL_PIC = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_HEVC_TIER_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 66)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_video_hevc_level {
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_1 = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_1 = 1,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_2 = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_2 = 3,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_2_1 = 4,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_2_1 = 5,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_3 = 6,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_3 = 7,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_3_1 = 8,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_3_1 = 9,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_4 = 10,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_4 = 11,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_4_1 = 12,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_4_1 = 13,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_5 = 14,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_5 = 15,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_5_1 = 16,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_5_1 = 17,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_5_2 = 18,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_5_2 = 19,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_6 = 20,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_6 = 21,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_6_1 = 22,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_6_1 = 23,
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_MAIN_TIER_LEVEL_6_2 = 24,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_HEVC_LEVEL_HIGH_TIER_LEVEL_6_2 = 25,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_H264_NAL_SVC (V4L2_CID_MPEG_MSM_VIDC_BASE + 67)
|
||||
enum vl42_mpeg_vidc_video_h264_svc_nal {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_H264_NAL_SVC_DISABLED = 0,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_H264_NAL_SVC_ENABLED = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_PERF_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 68)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_perf_mode {
|
||||
V4L2_MPEG_VIDC_VIDEO_PERF_MAX_QUALITY = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_PERF_POWER_SAVE = 2
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_HIER_B_NUM_LAYERS (V4L2_CID_MPEG_MSM_VIDC_BASE + 69)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_SECURE_SCALING_THRESHOLD (V4L2_CID_MPEG_MSM_VIDC_BASE + 70)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_NON_SECURE_OUTPUT2 (V4L2_CID_MPEG_MSM_VIDC_BASE + 71)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_HYBRID_HIERP_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 72)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_DPB_COLOR_FORMAT (V4L2_CID_MPEG_MSM_VIDC_BASE + 73)
|
||||
enum v4l2_mpeg_vidc_video_dpb_color_format {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_DPB_COLOR_FMT_NONE = 0,
|
||||
V4L2_MPEG_VIDC_VIDEO_DPB_COLOR_FMT_UBWC = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_DPB_COLOR_FMT_TP10_UBWC = 2
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MBI_STATISTICS_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 74)
|
||||
enum v4l2_mpeg_vidc_video_mbi_statistics_mode {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_MBI_MODE_DEFAULT = 0,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_MBI_MODE_1 = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_MBI_MODE_2 = 2,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_MBI_MODE_3 = 3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_VIDC_QBUF_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 75)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_vidc_qbuf_mode {
|
||||
V4L2_VIDC_QBUF_STANDARD = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_VIDC_QBUF_BATCHED = 1,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MAX_HIERP_LAYERS (V4L2_CID_MPEG_MSM_VIDC_BASE + 76)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_BASELAYER_ID (V4L2_CID_MPEG_MSM_VIDC_BASE + 77)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_CONFIG_QP (V4L2_CID_MPEG_MSM_VIDC_BASE + 78)
|
||||
#define V4L2_CID_MPEG_VIDC_VENC_PARAM_SAR_WIDTH (V4L2_CID_MPEG_MSM_VIDC_BASE + 79)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VENC_PARAM_SAR_HEIGHT (V4L2_CID_MPEG_MSM_VIDC_BASE + 80)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VQZIP_SEI (V4L2_CID_MPEG_MSM_VIDC_BASE + 81)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_vqzip_sei_enable {
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_VQZIP_SEI_DISABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_VQZIP_SEI_ENABLE = 1
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VENC_PARAM_LAYER_BITRATE (V4L2_CID_MPEG_MSM_VIDC_BASE + 82)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_PRIORITY (V4L2_CID_MPEG_MSM_VIDC_BASE + 83)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_priority {
|
||||
V4L2_MPEG_VIDC_VIDEO_PRIORITY_REALTIME_ENABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_MPEG_VIDC_VIDEO_PRIORITY_REALTIME_DISABLE = 1,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_OPERATING_RATE (V4L2_CID_MPEG_MSM_VIDC_BASE + 84)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VENC_BITRATE_TYPE (V4L2_CID_MPEG_MSM_VIDC_BASE + 85)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_venc_bitrate_type_enable {
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_VENC_BITRATE_DISABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_VENC_BITRATE_ENABLE = 1
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_H264_PIC_ORDER_CNT (V4L2_CID_MPEG_MSM_VIDC_BASE + 86)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC (V4L2_CID_MPEG_MSM_VIDC_BASE + 87)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_cid_mpeg_vidc_video_vpe_csc_type_enable {
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_DISABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_VPE_CSC_ENABLE = 1
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_MODE (V4L2_CID_MPEG_MSM_VIDC_BASE + 88)
|
||||
enum v4l2_mpeg_vidc_video_lowlatency_mode {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_DISABLE = 0,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_LOWLATENCY_ENABLE = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_WIDTH (V4L2_CID_MPEG_MSM_VIDC_BASE + 89)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_BLUR_HEIGHT (V4L2_CID_MPEG_MSM_VIDC_BASE + 90)
|
||||
#define V4L2_CID_MPEG_VIDEO_MIN_QP_PACKED (V4L2_CID_MPEG_MSM_VIDC_BASE + 91)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDEO_MAX_QP_PACKED (V4L2_CID_MPEG_MSM_VIDC_BASE + 92)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_H264_TRANSFORM_8x8 (V4L2_CID_MPEG_MSM_VIDC_BASE + 93)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_mpeg_vidc_video_h264_transform_8x8 {
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_TRANSFORM_8x8_DISABLE = 0,
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_TRANSFORM_8x8_ENABLE = 1,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_COLOR_SPACE (V4L2_CID_MPEG_MSM_VIDC_BASE + 94)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_FULL_RANGE (V4L2_CID_MPEG_MSM_VIDC_BASE + 95)
|
||||
enum v4l2_cid_mpeg_vidc_video_full_range {
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_FULL_RANGE_DISABLE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_FULL_RANGE_ENABLE = 1,
|
||||
};
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_TRANSFER_CHARS (V4L2_CID_MPEG_MSM_VIDC_BASE + 96)
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MATRIX_COEFFS (V4L2_CID_MPEG_MSM_VIDC_BASE + 97)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
|
||||
#define V4L2_CID_CAMERA_CLASS (V4L2_CTRL_CLASS_CAMERA | 1)
|
||||
#define V4L2_CID_EXPOSURE_AUTO (V4L2_CID_CAMERA_CLASS_BASE + 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_exposure_auto_type {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_EXPOSURE_AUTO = 0,
|
||||
V4L2_EXPOSURE_MANUAL = 1,
|
||||
V4L2_EXPOSURE_SHUTTER_PRIORITY = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_EXPOSURE_APERTURE_PRIORITY = 3
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_EXPOSURE_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE + 2)
|
||||
#define V4L2_CID_EXPOSURE_AUTO_PRIORITY (V4L2_CID_CAMERA_CLASS_BASE + 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_PAN_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE + 4)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TILT_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE + 5)
|
||||
#define V4L2_CID_PAN_RESET (V4L2_CID_CAMERA_CLASS_BASE + 6)
|
||||
#define V4L2_CID_TILT_RESET (V4L2_CID_CAMERA_CLASS_BASE + 7)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_PAN_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE + 8)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TILT_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE + 9)
|
||||
#define V4L2_CID_FOCUS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE + 10)
|
||||
#define V4L2_CID_FOCUS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE + 11)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FOCUS_AUTO (V4L2_CID_CAMERA_CLASS_BASE + 12)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_ZOOM_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE + 13)
|
||||
#define V4L2_CID_ZOOM_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE + 14)
|
||||
#define V4L2_CID_ZOOM_CONTINUOUS (V4L2_CID_CAMERA_CLASS_BASE + 15)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_PRIVACY (V4L2_CID_CAMERA_CLASS_BASE + 16)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_IRIS_ABSOLUTE (V4L2_CID_CAMERA_CLASS_BASE + 17)
|
||||
#define V4L2_CID_IRIS_RELATIVE (V4L2_CID_CAMERA_CLASS_BASE + 18)
|
||||
#define V4L2_CID_AUTO_EXPOSURE_BIAS (V4L2_CID_CAMERA_CLASS_BASE + 19)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUTO_N_PRESET_WHITE_BALANCE (V4L2_CID_CAMERA_CLASS_BASE + 20)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_auto_n_preset_white_balance {
|
||||
V4L2_WHITE_BALANCE_MANUAL = 0,
|
||||
V4L2_WHITE_BALANCE_AUTO = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_WHITE_BALANCE_INCANDESCENT = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_WHITE_BALANCE_FLUORESCENT = 3,
|
||||
V4L2_WHITE_BALANCE_FLUORESCENT_H = 4,
|
||||
V4L2_WHITE_BALANCE_HORIZON = 5,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_WHITE_BALANCE_DAYLIGHT = 6,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_WHITE_BALANCE_FLASH = 7,
|
||||
V4L2_WHITE_BALANCE_CLOUDY = 8,
|
||||
V4L2_WHITE_BALANCE_SHADE = 9,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_WIDE_DYNAMIC_RANGE (V4L2_CID_CAMERA_CLASS_BASE + 21)
|
||||
#define V4L2_CID_IMAGE_STABILIZATION (V4L2_CID_CAMERA_CLASS_BASE + 22)
|
||||
#define V4L2_CID_ISO_SENSITIVITY (V4L2_CID_CAMERA_CLASS_BASE + 23)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_ISO_SENSITIVITY_AUTO (V4L2_CID_CAMERA_CLASS_BASE + 24)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_iso_sensitivity_auto_type {
|
||||
V4L2_ISO_SENSITIVITY_MANUAL = 0,
|
||||
V4L2_ISO_SENSITIVITY_AUTO = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_EXPOSURE_METERING (V4L2_CID_CAMERA_CLASS_BASE + 25)
|
||||
enum v4l2_exposure_metering {
|
||||
V4L2_EXPOSURE_METERING_AVERAGE = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_EXPOSURE_METERING_CENTER_WEIGHTED = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_EXPOSURE_METERING_SPOT = 2,
|
||||
V4L2_EXPOSURE_METERING_MATRIX = 3,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_SCENE_MODE (V4L2_CID_CAMERA_CLASS_BASE + 26)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_scene_mode {
|
||||
V4L2_SCENE_MODE_NONE = 0,
|
||||
V4L2_SCENE_MODE_BACKLIGHT = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_SCENE_MODE_BEACH_SNOW = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_SCENE_MODE_CANDLE_LIGHT = 3,
|
||||
V4L2_SCENE_MODE_DAWN_DUSK = 4,
|
||||
V4L2_SCENE_MODE_FALL_COLORS = 5,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_SCENE_MODE_FIREWORKS = 6,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_SCENE_MODE_LANDSCAPE = 7,
|
||||
V4L2_SCENE_MODE_NIGHT = 8,
|
||||
V4L2_SCENE_MODE_PARTY_INDOOR = 9,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_SCENE_MODE_PORTRAIT = 10,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_SCENE_MODE_SPORTS = 11,
|
||||
V4L2_SCENE_MODE_SUNSET = 12,
|
||||
V4L2_SCENE_MODE_TEXT = 13,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_3A_LOCK (V4L2_CID_CAMERA_CLASS_BASE + 27)
|
||||
#define V4L2_LOCK_EXPOSURE (1 << 0)
|
||||
#define V4L2_LOCK_WHITE_BALANCE (1 << 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_LOCK_FOCUS (1 << 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUTO_FOCUS_START (V4L2_CID_CAMERA_CLASS_BASE + 28)
|
||||
#define V4L2_CID_AUTO_FOCUS_STOP (V4L2_CID_CAMERA_CLASS_BASE + 29)
|
||||
#define V4L2_CID_AUTO_FOCUS_STATUS (V4L2_CID_CAMERA_CLASS_BASE + 30)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_AUTO_FOCUS_STATUS_IDLE (0 << 0)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_AUTO_FOCUS_STATUS_BUSY (1 << 0)
|
||||
#define V4L2_AUTO_FOCUS_STATUS_REACHED (1 << 1)
|
||||
#define V4L2_AUTO_FOCUS_STATUS_FAILED (1 << 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUTO_FOCUS_RANGE (V4L2_CID_CAMERA_CLASS_BASE + 31)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_auto_focus_range {
|
||||
V4L2_AUTO_FOCUS_RANGE_AUTO = 0,
|
||||
V4L2_AUTO_FOCUS_RANGE_NORMAL = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_AUTO_FOCUS_RANGE_MACRO = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_AUTO_FOCUS_RANGE_INFINITY = 3,
|
||||
};
|
||||
#define V4L2_CID_PAN_SPEED (V4L2_CID_CAMERA_CLASS_BASE + 32)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TILT_SPEED (V4L2_CID_CAMERA_CLASS_BASE + 33)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FM_TX_CLASS_BASE (V4L2_CTRL_CLASS_FM_TX | 0x900)
|
||||
#define V4L2_CID_FM_TX_CLASS (V4L2_CTRL_CLASS_FM_TX | 1)
|
||||
#define V4L2_CID_RDS_TX_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_PI (V4L2_CID_FM_TX_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_PTY (V4L2_CID_FM_TX_CLASS_BASE + 3)
|
||||
#define V4L2_CID_RDS_TX_PS_NAME (V4L2_CID_FM_TX_CLASS_BASE + 5)
|
||||
#define V4L2_CID_RDS_TX_RADIO_TEXT (V4L2_CID_FM_TX_CLASS_BASE + 6)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_MONO_STEREO (V4L2_CID_FM_TX_CLASS_BASE + 7)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_ARTIFICIAL_HEAD (V4L2_CID_FM_TX_CLASS_BASE + 8)
|
||||
#define V4L2_CID_RDS_TX_COMPRESSED (V4L2_CID_FM_TX_CLASS_BASE + 9)
|
||||
#define V4L2_CID_RDS_TX_DYNAMIC_PTY (V4L2_CID_FM_TX_CLASS_BASE + 10)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_TRAFFIC_ANNOUNCEMENT (V4L2_CID_FM_TX_CLASS_BASE + 11)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_TRAFFIC_PROGRAM (V4L2_CID_FM_TX_CLASS_BASE + 12)
|
||||
#define V4L2_CID_RDS_TX_MUSIC_SPEECH (V4L2_CID_FM_TX_CLASS_BASE + 13)
|
||||
#define V4L2_CID_RDS_TX_ALT_FREQS_ENABLE (V4L2_CID_FM_TX_CLASS_BASE + 14)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_TX_ALT_FREQS (V4L2_CID_FM_TX_CLASS_BASE + 15)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUDIO_LIMITER_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 64)
|
||||
#define V4L2_CID_AUDIO_LIMITER_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 65)
|
||||
#define V4L2_CID_AUDIO_LIMITER_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 66)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUDIO_COMPRESSION_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 80)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUDIO_COMPRESSION_GAIN (V4L2_CID_FM_TX_CLASS_BASE + 81)
|
||||
#define V4L2_CID_AUDIO_COMPRESSION_THRESHOLD (V4L2_CID_FM_TX_CLASS_BASE + 82)
|
||||
#define V4L2_CID_AUDIO_COMPRESSION_ATTACK_TIME (V4L2_CID_FM_TX_CLASS_BASE + 83)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_AUDIO_COMPRESSION_RELEASE_TIME (V4L2_CID_FM_TX_CLASS_BASE + 84)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_PILOT_TONE_ENABLED (V4L2_CID_FM_TX_CLASS_BASE + 96)
|
||||
#define V4L2_CID_PILOT_TONE_DEVIATION (V4L2_CID_FM_TX_CLASS_BASE + 97)
|
||||
#define V4L2_CID_PILOT_TONE_FREQUENCY (V4L2_CID_FM_TX_CLASS_BASE + 98)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TUNE_PREEMPHASIS (V4L2_CID_FM_TX_CLASS_BASE + 112)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_preemphasis {
|
||||
V4L2_PREEMPHASIS_DISABLED = 0,
|
||||
V4L2_PREEMPHASIS_50_uS = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_PREEMPHASIS_75_uS = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define V4L2_CID_TUNE_POWER_LEVEL (V4L2_CID_FM_TX_CLASS_BASE + 113)
|
||||
#define V4L2_CID_TUNE_ANTENNA_CAPACITOR (V4L2_CID_FM_TX_CLASS_BASE + 114)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_CLASS_BASE (V4L2_CTRL_CLASS_FLASH | 0x900)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_CLASS (V4L2_CTRL_CLASS_FLASH | 1)
|
||||
#define V4L2_CID_FLASH_LED_MODE (V4L2_CID_FLASH_CLASS_BASE + 1)
|
||||
enum v4l2_flash_led_mode {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_FLASH_LED_MODE_NONE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_FLASH_LED_MODE_FLASH,
|
||||
V4L2_FLASH_LED_MODE_TORCH,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_STROBE_SOURCE (V4L2_CID_FLASH_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_flash_strobe_source {
|
||||
V4L2_FLASH_STROBE_SOURCE_SOFTWARE,
|
||||
V4L2_FLASH_STROBE_SOURCE_EXTERNAL,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_STROBE (V4L2_CID_FLASH_CLASS_BASE + 3)
|
||||
#define V4L2_CID_FLASH_STROBE_STOP (V4L2_CID_FLASH_CLASS_BASE + 4)
|
||||
#define V4L2_CID_FLASH_STROBE_STATUS (V4L2_CID_FLASH_CLASS_BASE + 5)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_TIMEOUT (V4L2_CID_FLASH_CLASS_BASE + 6)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 7)
|
||||
#define V4L2_CID_FLASH_TORCH_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 8)
|
||||
#define V4L2_CID_FLASH_INDICATOR_INTENSITY (V4L2_CID_FLASH_CLASS_BASE + 9)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FLASH_FAULT (V4L2_CID_FLASH_CLASS_BASE + 10)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_FLASH_FAULT_OVER_VOLTAGE (1 << 0)
|
||||
#define V4L2_FLASH_FAULT_TIMEOUT (1 << 1)
|
||||
#define V4L2_FLASH_FAULT_OVER_TEMPERATURE (1 << 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_FLASH_FAULT_SHORT_CIRCUIT (1 << 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_FLASH_FAULT_OVER_CURRENT (1 << 4)
|
||||
#define V4L2_FLASH_FAULT_INDICATOR (1 << 5)
|
||||
#define V4L2_FLASH_FAULT_UNDER_VOLTAGE (1 << 6)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_FLASH_FAULT_INPUT_VOLTAGE (1 << 7)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_FLASH_FAULT_LED_OVER_TEMPERATURE (1 << 8)
|
||||
#define V4L2_CID_FLASH_CHARGE (V4L2_CID_FLASH_CLASS_BASE + 11)
|
||||
#define V4L2_CID_FLASH_READY (V4L2_CID_FLASH_CLASS_BASE + 12)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_JPEG_CLASS_BASE (V4L2_CTRL_CLASS_JPEG | 0x900)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_JPEG_CLASS (V4L2_CTRL_CLASS_JPEG | 1)
|
||||
#define V4L2_CID_JPEG_CHROMA_SUBSAMPLING (V4L2_CID_JPEG_CLASS_BASE + 1)
|
||||
enum v4l2_jpeg_chroma_subsampling {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_JPEG_CHROMA_SUBSAMPLING_444 = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_JPEG_CHROMA_SUBSAMPLING_422 = 1,
|
||||
V4L2_JPEG_CHROMA_SUBSAMPLING_420 = 2,
|
||||
V4L2_JPEG_CHROMA_SUBSAMPLING_411 = 3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_JPEG_CHROMA_SUBSAMPLING_410 = 4,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_JPEG_CHROMA_SUBSAMPLING_GRAY = 5,
|
||||
};
|
||||
#define V4L2_CID_JPEG_RESTART_INTERVAL (V4L2_CID_JPEG_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_JPEG_COMPRESSION_QUALITY (V4L2_CID_JPEG_CLASS_BASE + 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_JPEG_ACTIVE_MARKER (V4L2_CID_JPEG_CLASS_BASE + 4)
|
||||
#define V4L2_JPEG_ACTIVE_MARKER_APP0 (1 << 0)
|
||||
#define V4L2_JPEG_ACTIVE_MARKER_APP1 (1 << 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_JPEG_ACTIVE_MARKER_COM (1 << 16)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_JPEG_ACTIVE_MARKER_DQT (1 << 17)
|
||||
#define V4L2_JPEG_ACTIVE_MARKER_DHT (1 << 18)
|
||||
#define V4L2_CID_IMAGE_SOURCE_CLASS_BASE (V4L2_CTRL_CLASS_IMAGE_SOURCE | 0x900)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_IMAGE_SOURCE_CLASS (V4L2_CTRL_CLASS_IMAGE_SOURCE | 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_VBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 1)
|
||||
#define V4L2_CID_HBLANK (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 2)
|
||||
#define V4L2_CID_ANALOGUE_GAIN (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TEST_PATTERN_RED (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 4)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TEST_PATTERN_GREENR (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 5)
|
||||
#define V4L2_CID_TEST_PATTERN_BLUE (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 6)
|
||||
#define V4L2_CID_TEST_PATTERN_GREENB (V4L2_CID_IMAGE_SOURCE_CLASS_BASE + 7)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_IMAGE_PROC_CLASS_BASE (V4L2_CTRL_CLASS_IMAGE_PROC | 0x900)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_IMAGE_PROC_CLASS (V4L2_CTRL_CLASS_IMAGE_PROC | 1)
|
||||
#define V4L2_CID_LINK_FREQ (V4L2_CID_IMAGE_PROC_CLASS_BASE + 1)
|
||||
#define V4L2_CID_PIXEL_RATE (V4L2_CID_IMAGE_PROC_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TEST_PATTERN (V4L2_CID_IMAGE_PROC_CLASS_BASE + 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DV_CLASS_BASE (V4L2_CTRL_CLASS_DV | 0x900)
|
||||
#define V4L2_CID_DV_CLASS (V4L2_CTRL_CLASS_DV | 1)
|
||||
#define V4L2_CID_DV_TX_HOTPLUG (V4L2_CID_DV_CLASS_BASE + 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DV_TX_RXSENSE (V4L2_CID_DV_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DV_TX_EDID_PRESENT (V4L2_CID_DV_CLASS_BASE + 3)
|
||||
#define V4L2_CID_DV_TX_MODE (V4L2_CID_DV_CLASS_BASE + 4)
|
||||
enum v4l2_dv_tx_mode {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DV_TX_MODE_DVI_D = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DV_TX_MODE_HDMI = 1,
|
||||
};
|
||||
#define V4L2_CID_DV_TX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 5)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_dv_rgb_range {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DV_RGB_RANGE_AUTO = 0,
|
||||
V4L2_DV_RGB_RANGE_LIMITED = 1,
|
||||
V4L2_DV_RGB_RANGE_FULL = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DV_RX_POWER_PRESENT (V4L2_CID_DV_CLASS_BASE + 100)
|
||||
#define V4L2_CID_DV_RX_RGB_RANGE (V4L2_CID_DV_CLASS_BASE + 101)
|
||||
#define V4L2_CID_FM_RX_CLASS_BASE (V4L2_CTRL_CLASS_FM_RX | 0x900)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_FM_RX_CLASS (V4L2_CTRL_CLASS_FM_RX | 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_TUNE_DEEMPHASIS (V4L2_CID_FM_RX_CLASS_BASE + 1)
|
||||
enum v4l2_deemphasis {
|
||||
V4L2_DEEMPHASIS_DISABLED = V4L2_PREEMPHASIS_DISABLED,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DEEMPHASIS_50_uS = V4L2_PREEMPHASIS_50_uS,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DEEMPHASIS_75_uS = V4L2_PREEMPHASIS_75_uS,
|
||||
};
|
||||
#define V4L2_CID_RDS_RECEPTION (V4L2_CID_FM_RX_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_RX_PTY (V4L2_CID_FM_RX_CLASS_BASE + 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_RX_PS_NAME (V4L2_CID_FM_RX_CLASS_BASE + 4)
|
||||
#define V4L2_CID_RDS_RX_RADIO_TEXT (V4L2_CID_FM_RX_CLASS_BASE + 5)
|
||||
#define V4L2_CID_RDS_RX_TRAFFIC_ANNOUNCEMENT (V4L2_CID_FM_RX_CLASS_BASE + 6)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_RX_TRAFFIC_PROGRAM (V4L2_CID_FM_RX_CLASS_BASE + 7)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RDS_RX_MUSIC_SPEECH (V4L2_CID_FM_RX_CLASS_BASE + 8)
|
||||
#define V4L2_CID_RF_TUNER_CLASS_BASE (V4L2_CTRL_CLASS_RF_TUNER | 0x900)
|
||||
#define V4L2_CID_RF_TUNER_CLASS (V4L2_CTRL_CLASS_RF_TUNER | 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RF_TUNER_BANDWIDTH_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 11)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RF_TUNER_BANDWIDTH (V4L2_CID_RF_TUNER_CLASS_BASE + 12)
|
||||
#define V4L2_CID_RF_TUNER_RF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 32)
|
||||
#define V4L2_CID_RF_TUNER_LNA_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 41)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RF_TUNER_LNA_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 42)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RF_TUNER_MIXER_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 51)
|
||||
#define V4L2_CID_RF_TUNER_MIXER_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 52)
|
||||
#define V4L2_CID_RF_TUNER_IF_GAIN_AUTO (V4L2_CID_RF_TUNER_CLASS_BASE + 61)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RF_TUNER_IF_GAIN (V4L2_CID_RF_TUNER_CLASS_BASE + 62)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_RF_TUNER_PLL_LOCK (V4L2_CID_RF_TUNER_CLASS_BASE + 91)
|
||||
#define V4L2_CID_DETECT_CLASS_BASE (V4L2_CTRL_CLASS_DETECT | 0x900)
|
||||
#define V4L2_CID_DETECT_CLASS (V4L2_CTRL_CLASS_DETECT | 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DETECT_MD_MODE (V4L2_CID_DETECT_CLASS_BASE + 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum v4l2_detect_md_mode {
|
||||
V4L2_DETECT_MD_MODE_DISABLED = 0,
|
||||
V4L2_DETECT_MD_MODE_GLOBAL = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DETECT_MD_MODE_THRESHOLD_GRID = 2,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
V4L2_DETECT_MD_MODE_REGION_GRID = 3,
|
||||
};
|
||||
#define V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD (V4L2_CID_DETECT_CLASS_BASE + 2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DETECT_MD_THRESHOLD_GRID (V4L2_CID_DETECT_CLASS_BASE + 3)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_CID_DETECT_MD_REGION_GRID (V4L2_CID_DETECT_CLASS_BASE + 4)
|
||||
#endif
|
||||
|
||||
|
||||
@@ -404,6 +404,51 @@ struct v4l2_pix_format {
|
||||
#define V4L2_PIX_FMT_JPGL v4l2_fourcc('J', 'P', 'G', 'L')
|
||||
#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1')
|
||||
#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I')
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_8888 v4l2_fourcc('R', 'A', '2', '4')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_8888 v4l2_fourcc('A', 'B', '2', '4')
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_8888 v4l2_fourcc('X', 'B', '2', '4')
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_8888 v4l2_fourcc('R', 'X', '2', '4')
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_5551 v4l2_fourcc('R', 'A', '1', '5')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_1555 v4l2_fourcc('A', 'B', '1', '5')
|
||||
#define V4L2_PIX_FMT_SDE_BGRA_5551 v4l2_fourcc('B', 'A', '1', '5')
|
||||
#define V4L2_PIX_FMT_SDE_BGRX_5551 v4l2_fourcc('B', 'X', '1', '5')
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_5551 v4l2_fourcc('R', 'X', '1', '5')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_1555 v4l2_fourcc('X', 'B', '1', '5')
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_4444 v4l2_fourcc('R', 'A', '1', '2')
|
||||
#define V4L2_PIX_FMT_SDE_BGRA_4444 v4l2_fourcc('b', 'A', '1', '2')
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_4444 v4l2_fourcc('A', 'B', '1', '2')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_4444 v4l2_fourcc('R', 'X', '1', '2')
|
||||
#define V4L2_PIX_FMT_SDE_BGRX_4444 v4l2_fourcc('B', 'X', '1', '2')
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_4444 v4l2_fourcc('X', 'B', '1', '2')
|
||||
#define V4L2_PIX_FMT_SDE_BGR_565 v4l2_fourcc('B', 'G', '1', '6')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CR_CB_GH2V2 v4l2_fourcc('Y', 'U', '4', '2')
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H1V2 v4l2_fourcc('N', 'H', '1', '6')
|
||||
#define V4L2_PIX_FMT_SDE_Y_CRCB_H1V2 v4l2_fourcc('N', 'H', '6', '1')
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '2')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CRCB_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '1')
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_8888_UBWC v4l2_fourcc('Q', 'X', 'B', '4')
|
||||
#define V4L2_PIX_FMT_SDE_RGB_565_UBWC v4l2_fourcc('Q', 'R', 'G', '6')
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_1010102 v4l2_fourcc('A', 'B', '3', '0')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_1010102 v4l2_fourcc('X', 'B', '3', '0')
|
||||
#define V4L2_PIX_FMT_SDE_ARGB_2101010 v4l2_fourcc('A', 'R', '3', '0')
|
||||
#define V4L2_PIX_FMT_SDE_XRGB_2101010 v4l2_fourcc('X', 'R', '3', '0')
|
||||
#define V4L2_PIX_FMT_SDE_BGRA_1010102 v4l2_fourcc('B', 'A', '3', '0')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_BGRX_1010102 v4l2_fourcc('B', 'X', '3', '0')
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_2101010 v4l2_fourcc('R', 'A', '3', '0')
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_2101010 v4l2_fourcc('R', 'X', '3', '0')
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_1010102_UBWC v4l2_fourcc('Q', 'R', 'B', 'A')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_1010102_UBWC v4l2_fourcc('Q', 'X', 'B', 'A')
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_TP10 v4l2_fourcc('T', 'P', '1', '0')
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010 v4l2_fourcc('P', '0', '1', '0')
|
||||
#define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6')
|
||||
|
||||
@@ -47,584 +47,585 @@
|
||||
#define MAX_REGULATOR 5
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A')
|
||||
#define MSM_V4L2_PIX_FMT_META10 v4l2_fourcc('M', 'E', '1', '0')
|
||||
#define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
|
||||
#define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
|
||||
#define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
|
||||
#define MSM_V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
|
||||
enum flash_type {
|
||||
LED_FLASH = 1,
|
||||
STROBE_FLASH,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
STROBE_FLASH,
|
||||
GPIO_FLASH
|
||||
};
|
||||
enum msm_sensor_resolution_t {
|
||||
MSM_SENSOR_RES_FULL,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_SENSOR_RES_FULL,
|
||||
MSM_SENSOR_RES_QTR,
|
||||
MSM_SENSOR_RES_2,
|
||||
MSM_SENSOR_RES_3,
|
||||
MSM_SENSOR_RES_4,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_SENSOR_RES_4,
|
||||
MSM_SENSOR_RES_5,
|
||||
MSM_SENSOR_RES_6,
|
||||
MSM_SENSOR_RES_7,
|
||||
MSM_SENSOR_INVALID_RES,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_SENSOR_INVALID_RES,
|
||||
};
|
||||
enum msm_camera_stream_type_t {
|
||||
MSM_CAMERA_STREAM_PREVIEW,
|
||||
MSM_CAMERA_STREAM_SNAPSHOT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_STREAM_SNAPSHOT,
|
||||
MSM_CAMERA_STREAM_VIDEO,
|
||||
MSM_CAMERA_STREAM_INVALID,
|
||||
};
|
||||
enum sensor_sub_module_t {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum sensor_sub_module_t {
|
||||
SUB_MODULE_SENSOR,
|
||||
SUB_MODULE_CHROMATIX,
|
||||
SUB_MODULE_ACTUATOR,
|
||||
SUB_MODULE_EEPROM,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
SUB_MODULE_EEPROM,
|
||||
SUB_MODULE_LED_FLASH,
|
||||
SUB_MODULE_STROBE_FLASH,
|
||||
SUB_MODULE_CSID,
|
||||
SUB_MODULE_CSID_3D,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
SUB_MODULE_CSID_3D,
|
||||
SUB_MODULE_CSIPHY,
|
||||
SUB_MODULE_CSIPHY_3D,
|
||||
SUB_MODULE_OIS,
|
||||
SUB_MODULE_EXT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
SUB_MODULE_EXT,
|
||||
SUB_MODULE_MAX,
|
||||
};
|
||||
enum {
|
||||
MSM_CAMERA_EFFECT_MODE_OFF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_EFFECT_MODE_OFF,
|
||||
MSM_CAMERA_EFFECT_MODE_MONO,
|
||||
MSM_CAMERA_EFFECT_MODE_NEGATIVE,
|
||||
MSM_CAMERA_EFFECT_MODE_SOLARIZE,
|
||||
MSM_CAMERA_EFFECT_MODE_SEPIA,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_EFFECT_MODE_SEPIA,
|
||||
MSM_CAMERA_EFFECT_MODE_POSTERIZE,
|
||||
MSM_CAMERA_EFFECT_MODE_WHITEBOARD,
|
||||
MSM_CAMERA_EFFECT_MODE_BLACKBOARD,
|
||||
MSM_CAMERA_EFFECT_MODE_AQUA,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_EFFECT_MODE_AQUA,
|
||||
MSM_CAMERA_EFFECT_MODE_EMBOSS,
|
||||
MSM_CAMERA_EFFECT_MODE_SKETCH,
|
||||
MSM_CAMERA_EFFECT_MODE_NEON,
|
||||
MSM_CAMERA_EFFECT_MODE_MAX
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_EFFECT_MODE_MAX
|
||||
};
|
||||
enum {
|
||||
MSM_CAMERA_WB_MODE_AUTO,
|
||||
MSM_CAMERA_WB_MODE_CUSTOM,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_WB_MODE_CUSTOM,
|
||||
MSM_CAMERA_WB_MODE_INCANDESCENT,
|
||||
MSM_CAMERA_WB_MODE_FLUORESCENT,
|
||||
MSM_CAMERA_WB_MODE_WARM_FLUORESCENT,
|
||||
MSM_CAMERA_WB_MODE_DAYLIGHT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_WB_MODE_DAYLIGHT,
|
||||
MSM_CAMERA_WB_MODE_CLOUDY_DAYLIGHT,
|
||||
MSM_CAMERA_WB_MODE_TWILIGHT,
|
||||
MSM_CAMERA_WB_MODE_SHADE,
|
||||
MSM_CAMERA_WB_MODE_OFF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_WB_MODE_OFF,
|
||||
MSM_CAMERA_WB_MODE_MAX
|
||||
};
|
||||
enum {
|
||||
MSM_CAMERA_SCENE_MODE_OFF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_SCENE_MODE_OFF,
|
||||
MSM_CAMERA_SCENE_MODE_AUTO,
|
||||
MSM_CAMERA_SCENE_MODE_LANDSCAPE,
|
||||
MSM_CAMERA_SCENE_MODE_SNOW,
|
||||
MSM_CAMERA_SCENE_MODE_BEACH,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_SCENE_MODE_BEACH,
|
||||
MSM_CAMERA_SCENE_MODE_SUNSET,
|
||||
MSM_CAMERA_SCENE_MODE_NIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_PORTRAIT,
|
||||
MSM_CAMERA_SCENE_MODE_BACKLIGHT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_SCENE_MODE_BACKLIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_SPORTS,
|
||||
MSM_CAMERA_SCENE_MODE_ANTISHAKE,
|
||||
MSM_CAMERA_SCENE_MODE_FLOWERS,
|
||||
MSM_CAMERA_SCENE_MODE_CANDLELIGHT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_SCENE_MODE_CANDLELIGHT,
|
||||
MSM_CAMERA_SCENE_MODE_FIREWORKS,
|
||||
MSM_CAMERA_SCENE_MODE_PARTY,
|
||||
MSM_CAMERA_SCENE_MODE_NIGHT_PORTRAIT,
|
||||
MSM_CAMERA_SCENE_MODE_THEATRE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_SCENE_MODE_THEATRE,
|
||||
MSM_CAMERA_SCENE_MODE_ACTION,
|
||||
MSM_CAMERA_SCENE_MODE_AR,
|
||||
MSM_CAMERA_SCENE_MODE_FACE_PRIORITY,
|
||||
MSM_CAMERA_SCENE_MODE_BARCODE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_SCENE_MODE_BARCODE,
|
||||
MSM_CAMERA_SCENE_MODE_HDR,
|
||||
MSM_CAMERA_SCENE_MODE_MAX
|
||||
};
|
||||
enum csid_cfg_type_t {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum csid_cfg_type_t {
|
||||
CSID_INIT,
|
||||
CSID_CFG,
|
||||
CSID_TESTMODE_CFG,
|
||||
CSID_RELEASE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CSID_RELEASE,
|
||||
};
|
||||
enum csiphy_cfg_type_t {
|
||||
CSIPHY_INIT,
|
||||
CSIPHY_CFG,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CSIPHY_CFG,
|
||||
CSIPHY_RELEASE,
|
||||
};
|
||||
enum camera_vreg_type {
|
||||
VREG_TYPE_DEFAULT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VREG_TYPE_DEFAULT,
|
||||
VREG_TYPE_CUSTOM,
|
||||
};
|
||||
enum sensor_af_t {
|
||||
SENSOR_AF_FOCUSSED,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
SENSOR_AF_FOCUSSED,
|
||||
SENSOR_AF_NOT_FOCUSSED,
|
||||
};
|
||||
enum cci_i2c_master_t {
|
||||
MASTER_0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MASTER_0,
|
||||
MASTER_1,
|
||||
MASTER_MAX,
|
||||
};
|
||||
struct msm_camera_i2c_array_write_config {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_i2c_array_write_config {
|
||||
struct msm_camera_i2c_reg_setting conf_array;
|
||||
uint16_t slave_addr;
|
||||
};
|
||||
struct msm_camera_i2c_read_config {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_i2c_read_config {
|
||||
uint16_t slave_addr;
|
||||
uint16_t reg_addr;
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
uint16_t data;
|
||||
};
|
||||
struct msm_camera_csi2_params {
|
||||
struct msm_camera_csid_params csid_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_csid_params csid_params;
|
||||
struct msm_camera_csiphy_params csiphy_params;
|
||||
uint8_t csi_clk_scale_enable;
|
||||
};
|
||||
struct msm_camera_csi_lane_params {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_csi_lane_params {
|
||||
uint16_t csi_lane_assign;
|
||||
uint16_t csi_lane_mask;
|
||||
};
|
||||
struct csi_lane_params_t {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct csi_lane_params_t {
|
||||
uint16_t csi_lane_assign;
|
||||
uint8_t csi_lane_mask;
|
||||
uint8_t csi_if;
|
||||
int8_t csid_core[2];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int8_t csid_core[2];
|
||||
uint8_t csi_phy_sel;
|
||||
};
|
||||
struct msm_sensor_info_t {
|
||||
char sensor_name[MAX_SENSOR_NAME];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
char sensor_name[MAX_SENSOR_NAME];
|
||||
uint32_t session_id;
|
||||
int32_t subdev_id[SUB_MODULE_MAX];
|
||||
int32_t subdev_intf[SUB_MODULE_MAX];
|
||||
uint8_t is_mount_angle_valid;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t is_mount_angle_valid;
|
||||
uint32_t sensor_mount_angle;
|
||||
int modes_supported;
|
||||
enum camb_position_t position;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct camera_vreg_t {
|
||||
const char * reg_name;
|
||||
int min_voltage;
|
||||
int max_voltage;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int max_voltage;
|
||||
int op_mode;
|
||||
uint32_t delay;
|
||||
const char * custom_vreg_name;
|
||||
enum camera_vreg_type type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum camera_vreg_type type;
|
||||
};
|
||||
struct sensorb_cfg_data {
|
||||
int cfgtype;
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
union {
|
||||
struct msm_sensor_info_t sensor_info;
|
||||
struct msm_sensor_init_params sensor_init_params;
|
||||
void * setting;
|
||||
struct msm_sensor_i2c_sync_params sensor_i2c_sync_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_sensor_i2c_sync_params sensor_i2c_sync_params;
|
||||
} cfg;
|
||||
};
|
||||
struct csid_cfg_data {
|
||||
enum csid_cfg_type_t cfgtype;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum csid_cfg_type_t cfgtype;
|
||||
union {
|
||||
uint32_t csid_version;
|
||||
struct msm_camera_csid_params * csid_params;
|
||||
struct msm_camera_csid_testmode_parms * csid_testmode_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_csid_testmode_parms * csid_testmode_params;
|
||||
} cfg;
|
||||
};
|
||||
struct csiphy_cfg_data {
|
||||
enum csiphy_cfg_type_t cfgtype;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum csiphy_cfg_type_t cfgtype;
|
||||
union {
|
||||
struct msm_camera_csiphy_params * csiphy_params;
|
||||
struct msm_camera_csi_lane_params * csi_lane_params;
|
||||
} cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
} cfg;
|
||||
};
|
||||
enum eeprom_cfg_type_t {
|
||||
CFG_EEPROM_GET_INFO,
|
||||
CFG_EEPROM_GET_CAL_DATA,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_EEPROM_GET_CAL_DATA,
|
||||
CFG_EEPROM_READ_CAL_DATA,
|
||||
CFG_EEPROM_WRITE_DATA,
|
||||
CFG_EEPROM_GET_MM_INFO,
|
||||
CFG_EEPROM_INIT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_EEPROM_INIT,
|
||||
};
|
||||
struct eeprom_get_t {
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct eeprom_read_t {
|
||||
uint8_t * dbuffer;
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct eeprom_write_t {
|
||||
uint8_t * dbuffer;
|
||||
uint32_t num_bytes;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct eeprom_get_cmm_t {
|
||||
uint32_t cmm_support;
|
||||
uint32_t cmm_compression;
|
||||
uint32_t cmm_size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t cmm_size;
|
||||
};
|
||||
struct msm_eeprom_info_t {
|
||||
struct msm_sensor_power_setting_array * power_setting_array;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
struct msm_eeprom_memory_map_array * mem_map_array;
|
||||
};
|
||||
struct msm_eeprom_cfg_data {
|
||||
enum eeprom_cfg_type_t cfgtype;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum eeprom_cfg_type_t cfgtype;
|
||||
uint8_t is_supported;
|
||||
union {
|
||||
char eeprom_name[MAX_SENSOR_NAME];
|
||||
struct eeprom_get_t get_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct eeprom_get_t get_data;
|
||||
struct eeprom_read_t read_data;
|
||||
struct eeprom_write_t write_data;
|
||||
struct eeprom_get_cmm_t get_cmm_data;
|
||||
struct msm_eeprom_info_t eeprom_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_eeprom_info_t eeprom_info;
|
||||
} cfg;
|
||||
};
|
||||
enum msm_sensor_cfg_type_t {
|
||||
CFG_SET_SLAVE_INFO,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_SET_SLAVE_INFO,
|
||||
CFG_SLAVE_READ_I2C,
|
||||
CFG_WRITE_I2C_ARRAY,
|
||||
CFG_SLAVE_WRITE_I2C_ARRAY,
|
||||
CFG_WRITE_I2C_SEQ_ARRAY,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_WRITE_I2C_SEQ_ARRAY,
|
||||
CFG_POWER_UP,
|
||||
CFG_POWER_DOWN,
|
||||
CFG_SET_STOP_STREAM_SETTING,
|
||||
CFG_GET_SENSOR_INFO,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_GET_SENSOR_INFO,
|
||||
CFG_GET_SENSOR_INIT_PARAMS,
|
||||
CFG_SET_INIT_SETTING,
|
||||
CFG_SET_RESOLUTION,
|
||||
CFG_SET_STOP_STREAM,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_SET_STOP_STREAM,
|
||||
CFG_SET_START_STREAM,
|
||||
CFG_SET_SATURATION,
|
||||
CFG_SET_CONTRAST,
|
||||
CFG_SET_SHARPNESS,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_SET_SHARPNESS,
|
||||
CFG_SET_ISO,
|
||||
CFG_SET_EXPOSURE_COMPENSATION,
|
||||
CFG_SET_ANTIBANDING,
|
||||
CFG_SET_BESTSHOT_MODE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_SET_BESTSHOT_MODE,
|
||||
CFG_SET_EFFECT,
|
||||
CFG_SET_WHITE_BALANCE,
|
||||
CFG_SET_AUTOFOCUS,
|
||||
CFG_CANCEL_AUTOFOCUS,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_CANCEL_AUTOFOCUS,
|
||||
CFG_SET_STREAM_TYPE,
|
||||
CFG_SET_I2C_SYNC_PARAM,
|
||||
CFG_WRITE_I2C_ARRAY_ASYNC,
|
||||
CFG_WRITE_I2C_ARRAY_SYNC,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_WRITE_I2C_ARRAY_SYNC,
|
||||
CFG_WRITE_I2C_ARRAY_SYNC_BLOCK,
|
||||
};
|
||||
enum msm_actuator_cfg_type_t {
|
||||
CFG_GET_ACTUATOR_INFO,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_GET_ACTUATOR_INFO,
|
||||
CFG_SET_ACTUATOR_INFO,
|
||||
CFG_SET_DEFAULT_FOCUS,
|
||||
CFG_MOVE_FOCUS,
|
||||
CFG_SET_POSITION,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_SET_POSITION,
|
||||
CFG_ACTUATOR_POWERDOWN,
|
||||
CFG_ACTUATOR_POWERUP,
|
||||
CFG_ACTUATOR_INIT,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_ois_opcode {
|
||||
uint32_t prog;
|
||||
uint32_t coeff;
|
||||
uint32_t pheripheral;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t pheripheral;
|
||||
uint32_t memory;
|
||||
};
|
||||
enum msm_ois_cfg_type_t {
|
||||
CFG_OIS_INIT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_OIS_INIT,
|
||||
CFG_OIS_POWERDOWN,
|
||||
CFG_OIS_POWERUP,
|
||||
CFG_OIS_CONTROL,
|
||||
CFG_OIS_I2C_WRITE_SEQ_TABLE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_OIS_I2C_WRITE_SEQ_TABLE,
|
||||
};
|
||||
enum msm_ois_cfg_download_type_t {
|
||||
CFG_OIS_DOWNLOAD,
|
||||
CFG_OIS_DATA_CONFIG,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_OIS_DATA_CONFIG,
|
||||
};
|
||||
enum msm_ois_i2c_operation {
|
||||
MSM_OIS_WRITE = 0,
|
||||
MSM_OIS_POLL,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_OIS_POLL,
|
||||
};
|
||||
struct reg_settings_ois_t {
|
||||
uint16_t reg_addr;
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_camera_i2c_reg_addr_type addr_type;
|
||||
uint32_t reg_data;
|
||||
enum msm_camera_i2c_data_type data_type;
|
||||
enum msm_ois_i2c_operation i2c_operation;
|
||||
uint32_t delay;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t delay;
|
||||
};
|
||||
struct msm_ois_params_t {
|
||||
uint16_t data_size;
|
||||
uint16_t setting_size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t setting_size;
|
||||
uint32_t i2c_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
enum msm_camera_i2c_reg_addr_type i2c_addr_type;
|
||||
enum msm_camera_i2c_data_type i2c_data_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_camera_i2c_data_type i2c_data_type;
|
||||
struct reg_settings_ois_t * settings;
|
||||
};
|
||||
struct msm_ois_set_info_t {
|
||||
struct msm_ois_params_t ois_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_ois_params_t ois_params;
|
||||
};
|
||||
struct msm_actuator_move_params_t {
|
||||
int8_t dir;
|
||||
int8_t sign_dir;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int8_t sign_dir;
|
||||
int16_t dest_step_pos;
|
||||
int32_t num_steps;
|
||||
uint16_t curr_lens_pos;
|
||||
struct damping_params_t * ringing_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct damping_params_t * ringing_params;
|
||||
};
|
||||
struct msm_actuator_tuning_params_t {
|
||||
int16_t initial_code;
|
||||
uint16_t pwd_step;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t pwd_step;
|
||||
uint16_t region_size;
|
||||
uint32_t total_steps;
|
||||
struct region_params_t * region_params;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct park_lens_data_t {
|
||||
uint32_t damping_step;
|
||||
uint32_t damping_delay;
|
||||
uint32_t hw_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t hw_params;
|
||||
uint32_t max_step;
|
||||
};
|
||||
struct msm_actuator_params_t {
|
||||
enum actuator_type act_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum actuator_type act_type;
|
||||
uint8_t reg_tbl_size;
|
||||
uint16_t data_size;
|
||||
uint16_t init_setting_size;
|
||||
uint32_t i2c_addr;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t i2c_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
enum msm_camera_i2c_reg_addr_type i2c_addr_type;
|
||||
enum msm_camera_i2c_data_type i2c_data_type;
|
||||
struct msm_actuator_reg_params_t * reg_tbl_params;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_actuator_reg_params_t * reg_tbl_params;
|
||||
struct reg_settings_t * init_settings;
|
||||
struct park_lens_data_t park_lens;
|
||||
};
|
||||
struct msm_actuator_set_info_t {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_actuator_set_info_t {
|
||||
struct msm_actuator_params_t actuator_params;
|
||||
struct msm_actuator_tuning_params_t af_tuning_params;
|
||||
};
|
||||
struct msm_actuator_get_info_t {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_actuator_get_info_t {
|
||||
uint32_t focal_length_num;
|
||||
uint32_t focal_length_den;
|
||||
uint32_t f_number_num;
|
||||
uint32_t f_number_den;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t f_number_den;
|
||||
uint32_t f_pix_num;
|
||||
uint32_t f_pix_den;
|
||||
uint32_t total_f_dist_num;
|
||||
uint32_t total_f_dist_den;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t total_f_dist_den;
|
||||
uint32_t hor_view_angle_num;
|
||||
uint32_t hor_view_angle_den;
|
||||
uint32_t ver_view_angle_num;
|
||||
uint32_t ver_view_angle_den;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t ver_view_angle_den;
|
||||
};
|
||||
enum af_camera_name {
|
||||
ACTUATOR_MAIN_CAM_0,
|
||||
ACTUATOR_MAIN_CAM_1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ACTUATOR_MAIN_CAM_1,
|
||||
ACTUATOR_MAIN_CAM_2,
|
||||
ACTUATOR_MAIN_CAM_3,
|
||||
ACTUATOR_MAIN_CAM_4,
|
||||
ACTUATOR_MAIN_CAM_5,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ACTUATOR_MAIN_CAM_5,
|
||||
ACTUATOR_WEB_CAM_0,
|
||||
ACTUATOR_WEB_CAM_1,
|
||||
ACTUATOR_WEB_CAM_2,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_ois_slave_info {
|
||||
char ois_name[MAX_OIS_NAME_SIZE];
|
||||
uint32_t i2c_addr;
|
||||
struct msm_ois_opcode opcode;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_ois_opcode opcode;
|
||||
};
|
||||
struct msm_ois_cfg_data {
|
||||
int cfgtype;
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
union {
|
||||
struct msm_ois_set_info_t set_info;
|
||||
struct msm_camera_i2c_seq_reg_setting * settings;
|
||||
} cfg;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_ois_cfg_download_data {
|
||||
int cfgtype;
|
||||
struct msm_ois_slave_info slave_info;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_actuator_set_position_t {
|
||||
uint16_t number_of_steps;
|
||||
uint32_t hw_params;
|
||||
uint16_t pos[MAX_NUMBER_OF_STEPS];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint16_t pos[MAX_NUMBER_OF_STEPS];
|
||||
uint16_t delay[MAX_NUMBER_OF_STEPS];
|
||||
};
|
||||
struct msm_actuator_cfg_data {
|
||||
int cfgtype;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int cfgtype;
|
||||
uint8_t is_af_supported;
|
||||
union {
|
||||
struct msm_actuator_move_params_t move;
|
||||
struct msm_actuator_set_info_t set_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_actuator_set_info_t set_info;
|
||||
struct msm_actuator_get_info_t get_info;
|
||||
struct msm_actuator_set_position_t setpos;
|
||||
enum af_camera_name cam_name;
|
||||
} cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
} cfg;
|
||||
};
|
||||
enum msm_camera_led_config_t {
|
||||
MSM_CAMERA_LED_OFF,
|
||||
MSM_CAMERA_LED_LOW,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_CAMERA_LED_LOW,
|
||||
MSM_CAMERA_LED_HIGH,
|
||||
MSM_CAMERA_LED_INIT,
|
||||
MSM_CAMERA_LED_RELEASE,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_camera_led_cfg_t {
|
||||
enum msm_camera_led_config_t cfgtype;
|
||||
int32_t torch_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_duration[MAX_LED_TRIGGERS];
|
||||
};
|
||||
struct msm_flash_init_info_t {
|
||||
enum msm_flash_driver_type flash_driver_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_flash_driver_type flash_driver_type;
|
||||
uint32_t slave_addr;
|
||||
enum i2c_freq_mode_t i2c_freq_mode;
|
||||
struct msm_sensor_power_setting_array * power_setting_array;
|
||||
struct msm_camera_i2c_reg_setting_array * settings;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_i2c_reg_setting_array * settings;
|
||||
};
|
||||
struct msm_flash_cfg_data_t {
|
||||
enum msm_flash_cfg_type_t cfg_type;
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
int32_t flash_current[MAX_LED_TRIGGERS];
|
||||
int32_t flash_duration[MAX_LED_TRIGGERS];
|
||||
union {
|
||||
struct msm_flash_init_info_t * flash_init_info;
|
||||
struct msm_camera_i2c_reg_setting_array * settings;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_camera_i2c_reg_setting_array * settings;
|
||||
} cfg;
|
||||
};
|
||||
enum msm_sensor_init_cfg_type_t {
|
||||
CFG_SINIT_PROBE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CFG_SINIT_PROBE,
|
||||
CFG_SINIT_PROBE_DONE,
|
||||
CFG_SINIT_PROBE_WAIT_DONE,
|
||||
};
|
||||
struct sensor_init_cfg_data {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct sensor_init_cfg_data {
|
||||
enum msm_sensor_init_cfg_type_t cfgtype;
|
||||
struct msm_sensor_info_t probed_info;
|
||||
char entity_name[MAX_SENSOR_NAME];
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
union {
|
||||
void * setting;
|
||||
} cfg;
|
||||
};
|
||||
#define VIDIOC_MSM_SENSOR_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct sensorb_cfg_data)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_SENSOR_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct sensorb_cfg_data)
|
||||
#define VIDIOC_MSM_SENSOR_RELEASE _IO('V', BASE_VIDIOC_PRIVATE + 2)
|
||||
#define VIDIOC_MSM_SENSOR_GET_SUBDEV_ID _IOWR('V', BASE_VIDIOC_PRIVATE + 3, uint32_t)
|
||||
#define VIDIOC_MSM_CSIPHY_IO_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct csiphy_cfg_data)
|
||||
#define VIDIOC_MSM_CSID_IO_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct csid_cfg_data)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_CSID_IO_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct csid_cfg_data)
|
||||
#define VIDIOC_MSM_ACTUATOR_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_actuator_cfg_data)
|
||||
#define VIDIOC_MSM_FLASH_LED_DATA_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_camera_led_cfg_t)
|
||||
#define VIDIOC_MSM_EEPROM_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_eeprom_cfg_data)
|
||||
#define VIDIOC_MSM_SENSOR_GET_AF_STATUS _IOWR('V', BASE_VIDIOC_PRIVATE + 9, uint32_t)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_SENSOR_GET_AF_STATUS _IOWR('V', BASE_VIDIOC_PRIVATE + 9, uint32_t)
|
||||
#define VIDIOC_MSM_SENSOR_INIT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct sensor_init_cfg_data)
|
||||
#define VIDIOC_MSM_OIS_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_ois_cfg_data)
|
||||
#define VIDIOC_MSM_FLASH_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_flash_cfg_data_t)
|
||||
#define VIDIOC_MSM_OIS_CFG_DOWNLOAD _IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_ois_cfg_download_data)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_OIS_CFG_DOWNLOAD _IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_ois_cfg_download_data)
|
||||
#endif
|
||||
|
||||
|
||||
@@ -24,84 +24,86 @@
|
||||
#include <linux/ioctl.h>
|
||||
#define SDE_PIX_FMT_XRGB_8888 V4L2_PIX_FMT_XBGR32
|
||||
#define SDE_PIX_FMT_ARGB_8888 V4L2_PIX_FMT_ABGR32
|
||||
#define SDE_PIX_FMT_ABGR_8888 v4l2_fourcc('R', 'A', '2', '4')
|
||||
#define SDE_PIX_FMT_ABGR_8888 V4L2_PIX_FMT_SDE_ABGR_8888
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_RGBA_8888 v4l2_fourcc('A', 'B', '2', '4')
|
||||
#define SDE_PIX_FMT_RGBA_8888 V4L2_PIX_FMT_SDE_RGBA_8888
|
||||
#define SDE_PIX_FMT_BGRA_8888 V4L2_PIX_FMT_ARGB32
|
||||
#define SDE_PIX_FMT_RGBX_8888 v4l2_fourcc('X', 'B', '2', '4')
|
||||
#define SDE_PIX_FMT_RGBX_8888 V4L2_PIX_FMT_SDE_RGBX_8888
|
||||
#define SDE_PIX_FMT_BGRX_8888 V4L2_PIX_FMT_XRGB32
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_XBGR_8888 v4l2_fourcc('R', 'X', '2', '4')
|
||||
#define SDE_PIX_FMT_RGBA_5551 v4l2_fourcc('R', 'A', '1', '5')
|
||||
#define SDE_PIX_FMT_XBGR_8888 V4L2_PIX_FMT_SDE_XBGR_8888
|
||||
#define SDE_PIX_FMT_RGBA_5551 V4L2_PIX_FMT_SDE_RGBA_5551
|
||||
#define SDE_PIX_FMT_ARGB_1555 V4L2_PIX_FMT_ARGB555
|
||||
#define SDE_PIX_FMT_ABGR_1555 v4l2_fourcc('A', 'B', '1', '5')
|
||||
#define SDE_PIX_FMT_ABGR_1555 V4L2_PIX_FMT_SDE_ABGR_1555
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_BGRA_5551 v4l2_fourcc('B', 'A', '1', '5')
|
||||
#define SDE_PIX_FMT_BGRX_5551 v4l2_fourcc('B', 'X', '1', '5')
|
||||
#define SDE_PIX_FMT_RGBX_5551 v4l2_fourcc('R', 'X', '1', '5')
|
||||
#define SDE_PIX_FMT_XBGR_1555 v4l2_fourcc('X', 'B', '1', '5')
|
||||
#define SDE_PIX_FMT_BGRA_5551 V4L2_PIX_FMT_SDE_BGRA_5551
|
||||
#define SDE_PIX_FMT_BGRX_5551 V4L2_PIX_FMT_SDE_BGRX_5551
|
||||
#define SDE_PIX_FMT_RGBX_5551 V4L2_PIX_FMT_SDE_RGBX_5551
|
||||
#define SDE_PIX_FMT_XBGR_1555 V4L2_PIX_FMT_SDE_XBGR_1555
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_XRGB_1555 V4L2_PIX_FMT_XRGB555
|
||||
#define SDE_PIX_FMT_ARGB_4444 V4L2_PIX_FMT_ARGB444
|
||||
#define SDE_PIX_FMT_RGBA_4444 v4l2_fourcc('R', 'A', '1', '2')
|
||||
#define SDE_PIX_FMT_BGRA_4444 v4l2_fourcc('B', 'A', '1', '2')
|
||||
#define SDE_PIX_FMT_RGBA_4444 V4L2_PIX_FMT_SDE_RGBA_4444
|
||||
#define SDE_PIX_FMT_BGRA_4444 V4L2_PIX_FMT_SDE_BGRA_4444
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_ABGR_4444 v4l2_fourcc('A', 'B', '1', '2')
|
||||
#define SDE_PIX_FMT_RGBX_4444 v4l2_fourcc('R', 'X', '1', '2')
|
||||
#define SDE_PIX_FMT_ABGR_4444 V4L2_PIX_FMT_SDE_ABGR_4444
|
||||
#define SDE_PIX_FMT_RGBX_4444 V4L2_PIX_FMT_SDE_RGBX_4444
|
||||
#define SDE_PIX_FMT_XRGB_4444 V4L2_PIX_FMT_XRGB444
|
||||
#define SDE_PIX_FMT_BGRX_4444 v4l2_fourcc('B', 'X', '1', '2')
|
||||
#define SDE_PIX_FMT_BGRX_4444 V4L2_PIX_FMT_SDE_BGRX_4444
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_XBGR_4444 v4l2_fourcc('X', 'B', '1', '2')
|
||||
#define SDE_PIX_FMT_XBGR_4444 V4L2_PIX_FMT_SDE_XBGR_4444
|
||||
#define SDE_PIX_FMT_RGB_888 V4L2_PIX_FMT_RGB24
|
||||
#define SDE_PIX_FMT_BGR_888 V4L2_PIX_FMT_BGR24
|
||||
#define SDE_PIX_FMT_RGB_565 V4L2_PIX_FMT_RGB565
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_BGR_565 v4l2_fourcc('B', 'G', '1', '6')
|
||||
#define SDE_PIX_FMT_BGR_565 V4L2_PIX_FMT_SDE_BGR_565
|
||||
#define SDE_PIX_FMT_Y_CB_CR_H2V2 V4L2_PIX_FMT_YUV420
|
||||
#define SDE_PIX_FMT_Y_CR_CB_H2V2 V4L2_PIX_FMT_YVU420
|
||||
#define SDE_PIX_FMT_Y_CR_CB_GH2V2 v4l2_fourcc('Y', 'U', '4', '2')
|
||||
#define SDE_PIX_FMT_Y_CR_CB_GH2V2 V4L2_PIX_FMT_SDE_Y_CR_CB_GH2V2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2 V4L2_PIX_FMT_NV12
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V2 V4L2_PIX_FMT_NV21
|
||||
#define SDE_PIX_FMT_Y_CBCR_H1V2 v4l2_fourcc('N', 'H', '1', '6')
|
||||
#define SDE_PIX_FMT_Y_CRCB_H1V2 v4l2_fourcc('N', 'H', '6', '1')
|
||||
#define SDE_PIX_FMT_Y_CBCR_H1V2 V4L2_PIX_FMT_SDE_Y_CBCR_H1V2
|
||||
#define SDE_PIX_FMT_Y_CRCB_H1V2 V4L2_PIX_FMT_SDE_Y_CRCB_H1V2
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V1 V4L2_PIX_FMT_NV16
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V1 V4L2_PIX_FMT_NV61
|
||||
#define SDE_PIX_FMT_YCBYCR_H2V1 V4L2_PIX_FMT_YUYV
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '2')
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_VENUS V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_VENUS
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '1')
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V2_VENUS V4L2_PIX_FMT_SDE_Y_CRCB_H2V2_VENUS
|
||||
#define SDE_PIX_FMT_RGBA_8888_UBWC V4L2_PIX_FMT_RGBA8888_UBWC
|
||||
#define SDE_PIX_FMT_RGBX_8888_UBWC v4l2_fourcc('Q', 'X', 'B', '4')
|
||||
#define SDE_PIX_FMT_RGB_565_UBWC v4l2_fourcc('Q', 'R', 'G', '6')
|
||||
#define SDE_PIX_FMT_RGBX_8888_UBWC V4L2_PIX_FMT_SDE_RGBX_8888_UBWC
|
||||
#define SDE_PIX_FMT_RGB_565_UBWC V4L2_PIX_FMT_SDE_RGB_565_UBWC
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_UBWC V4L2_PIX_FMT_NV12_UBWC
|
||||
#define SDE_PIX_FMT_RGBA_1010102 v4l2_fourcc('A', 'B', '3', '0')
|
||||
#define SDE_PIX_FMT_RGBX_1010102 v4l2_fourcc('X', 'B', '3', '0')
|
||||
#define SDE_PIX_FMT_ARGB_2101010 v4l2_fourcc('A', 'R', '3', '0')
|
||||
#define SDE_PIX_FMT_RGBA_1010102 V4L2_PIX_FMT_SDE_RGBA_1010102
|
||||
#define SDE_PIX_FMT_RGBX_1010102 V4L2_PIX_FMT_SDE_RGBX_1010102
|
||||
#define SDE_PIX_FMT_ARGB_2101010 V4L2_PIX_FMT_SDE_ARGB_2101010
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_XRGB_2101010 v4l2_fourcc('X', 'R', '3', '0')
|
||||
#define SDE_PIX_FMT_BGRA_1010102 v4l2_fourcc('B', 'A', '3', '0')
|
||||
#define SDE_PIX_FMT_BGRX_1010102 v4l2_fourcc('B', 'X', '3', '0')
|
||||
#define SDE_PIX_FMT_ABGR_2101010 v4l2_fourcc('R', 'A', '3', '0')
|
||||
#define SDE_PIX_FMT_XRGB_2101010 V4L2_PIX_FMT_SDE_XRGB_2101010
|
||||
#define SDE_PIX_FMT_BGRA_1010102 V4L2_PIX_FMT_SDE_BGRA_1010102
|
||||
#define SDE_PIX_FMT_BGRX_1010102 V4L2_PIX_FMT_SDE_BGRX_1010102
|
||||
#define SDE_PIX_FMT_ABGR_2101010 V4L2_PIX_FMT_SDE_ABGR_2101010
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_XBGR_2101010 v4l2_fourcc('R', 'X', '3', '0')
|
||||
#define SDE_PIX_FMT_RGBA_1010102_UBWC v4l2_fourcc('Q', 'R', 'B', 'A')
|
||||
#define SDE_PIX_FMT_RGBX_1010102_UBWC v4l2_fourcc('Q', 'X', 'B', 'A')
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_P010 v4l2_fourcc('P', '0', '1', '0')
|
||||
#define SDE_PIX_FMT_XBGR_2101010 V4L2_PIX_FMT_SDE_XBGR_2101010
|
||||
#define SDE_PIX_FMT_RGBA_1010102_UBWC V4L2_PIX_FMT_SDE_RGBA_1010102_UBWC
|
||||
#define SDE_PIX_FMT_RGBX_1010102_UBWC V4L2_PIX_FMT_SDE_RGBX_1010102_UBWC
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_P010 V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_TP10 V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_TP10
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_TP10_UBWC V4L2_PIX_FMT_NV12_TP10_UBWC
|
||||
struct msm_sde_rotator_fence {
|
||||
__u32 index;
|
||||
__u32 type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
__u32 type;
|
||||
__s32 fd;
|
||||
__u32 reserved[5];
|
||||
};
|
||||
#define VIDIOC_G_SDE_ROTATOR_FENCE _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_sde_rotator_fence)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_G_SDE_ROTATOR_FENCE _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_sde_rotator_fence)
|
||||
#define VIDIOC_S_SDE_ROTATOR_FENCE _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_sde_rotator_fence)
|
||||
#define V4L2_CID_SDE_ROTATOR_SECURE (V4L2_CID_USER_BASE + 0x1000)
|
||||
#endif
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
|
||||
|
||||
@@ -73,208 +73,328 @@ struct msm_vidc_mpeg2_seqdisp_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int disp_height;
|
||||
};
|
||||
struct msm_vidc_vc1_seqdisp_payload {
|
||||
unsigned int prog_seg_format;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int uv_sampl_fmt;
|
||||
unsigned int color_format;
|
||||
unsigned int color_primaries;
|
||||
unsigned int transfer_char;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int matrix_coeffs;
|
||||
unsigned int aspect_ratio;
|
||||
unsigned int aspect_horiz;
|
||||
unsigned int aspect_vert;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_input_crop_payload {
|
||||
unsigned int size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int version;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int port_index;
|
||||
unsigned int left;
|
||||
unsigned int top;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int width;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int height;
|
||||
};
|
||||
struct msm_vidc_output_crop_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int version;
|
||||
unsigned int port_index;
|
||||
unsigned int left;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int top;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int display_width;
|
||||
unsigned int display_height;
|
||||
unsigned int width;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int height;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_digital_zoom_payload {
|
||||
unsigned int size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int version;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int port_index;
|
||||
unsigned int zoom_width;
|
||||
unsigned int zoom_height;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_extradata_index {
|
||||
unsigned int type;
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_input_crop_payload input_crop;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_digital_zoom_payload digital_zoom;
|
||||
struct msm_vidc_aspect_ratio_payload aspect_ratio;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_panscan_window {
|
||||
unsigned int panscan_height_offset;
|
||||
unsigned int panscan_width_offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int panscan_window_width;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int panscan_window_height;
|
||||
};
|
||||
struct msm_vidc_panscan_window_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int num_panscan_windows;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_panscan_window wnd[1];
|
||||
};
|
||||
struct msm_vidc_stream_userdata_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int data[1];
|
||||
};
|
||||
struct msm_vidc_frame_qp_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int frame_qp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_frame_bits_info_payload {
|
||||
unsigned int frame_bits;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int header_bits;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_s3d_frame_packing_payload {
|
||||
unsigned int fpa_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int cancel_flag;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int fpa_type;
|
||||
unsigned int quin_cunx_flag;
|
||||
unsigned int content_interprtation_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int spatial_flipping_flag;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int frame0_flipped_flag;
|
||||
unsigned int field_views_flag;
|
||||
unsigned int current_frame_is_frame0_flag;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int frame0_self_contained_flag;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int frame1_self_contained_flag;
|
||||
unsigned int frame0_graid_pos_x;
|
||||
unsigned int frame0_graid_pos_y;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int frame1_graid_pos_x;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int frame1_graid_pos_y;
|
||||
unsigned int fpa_reserved_byte;
|
||||
unsigned int fpa_repetition_period;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int fpa_extension_flag;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_vqzip_sei_payload {
|
||||
unsigned int size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int data[1];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_yuv_stats_payload {
|
||||
unsigned int frame_qp;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int texture;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int luma_in_q16;
|
||||
unsigned int frame_difference;
|
||||
};
|
||||
struct msm_vidc_vpx_colorspace_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int color_space;
|
||||
unsigned int yuv_range_flag;
|
||||
unsigned int sumsampling_x;
|
||||
unsigned int sumsampling_y;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vidc_roi_qp_payload {
|
||||
int upper_qp_offset;
|
||||
int lower_qp_offset;
|
||||
unsigned int b_roi_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int b_roi_info;
|
||||
int mbi_info_size;
|
||||
unsigned int data[1];
|
||||
};
|
||||
struct msm_vidc_mastering_display_colour_sei_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_mastering_display_colour_sei_payload {
|
||||
unsigned int nDisplayPrimariesX[3];
|
||||
unsigned int nDisplayPrimariesY[3];
|
||||
unsigned int nWhitePointX;
|
||||
unsigned int nWhitePointY;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int nWhitePointY;
|
||||
unsigned int nMaxDisplayMasteringLuminance;
|
||||
unsigned int nMinDisplayMasteringLuminance;
|
||||
};
|
||||
struct msm_vidc_content_light_level_sei_payload {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_content_light_level_sei_payload {
|
||||
unsigned int nMaxContentLight;
|
||||
unsigned int nMaxPicAverageLight;
|
||||
};
|
||||
enum msm_vidc_extradata_type {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vidc_vui_display_info_payload {
|
||||
unsigned int video_signal_present_flag;
|
||||
unsigned int video_format;
|
||||
unsigned int bit_depth_y;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int bit_depth_c;
|
||||
unsigned int video_full_range_flag;
|
||||
unsigned int color_description_present_flag;
|
||||
unsigned int color_primaries;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int transfer_characteristics;
|
||||
unsigned int matrix_coefficients;
|
||||
unsigned int chroma_location_info_present_flag;
|
||||
unsigned int chroma_format_idc;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
unsigned int separate_color_plane_flag;
|
||||
unsigned int chroma_sample_loc_type_top_field;
|
||||
unsigned int chroma_sample_loc_type_bottom_field;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vidc_extradata_type {
|
||||
MSM_VIDC_EXTRADATA_NONE = 0x00000000,
|
||||
MSM_VIDC_EXTRADATA_MB_QUANTIZATION = 0x00000001,
|
||||
MSM_VIDC_EXTRADATA_INTERLACE_VIDEO = 0x00000002,
|
||||
MSM_VIDC_EXTRADATA_VC1_FRAMEDISP = 0x00000003,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_VC1_FRAMEDISP = 0x00000003,
|
||||
MSM_VIDC_EXTRADATA_VC1_SEQDISP = 0x00000004,
|
||||
MSM_VIDC_EXTRADATA_TIMESTAMP = 0x00000005,
|
||||
MSM_VIDC_EXTRADATA_S3D_FRAME_PACKING = 0x00000006,
|
||||
MSM_VIDC_EXTRADATA_FRAME_RATE = 0x00000007,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_FRAME_RATE = 0x00000007,
|
||||
MSM_VIDC_EXTRADATA_PANSCAN_WINDOW = 0x00000008,
|
||||
MSM_VIDC_EXTRADATA_RECOVERY_POINT_SEI = 0x00000009,
|
||||
MSM_VIDC_EXTRADATA_MPEG2_SEQDISP = 0x0000000D,
|
||||
MSM_VIDC_EXTRADATA_STREAM_USERDATA = 0x0000000E,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_STREAM_USERDATA = 0x0000000E,
|
||||
MSM_VIDC_EXTRADATA_FRAME_QP = 0x0000000F,
|
||||
MSM_VIDC_EXTRADATA_FRAME_BITS_INFO = 0x00000010,
|
||||
MSM_VIDC_EXTRADATA_VQZIP_SEI = 0x00000011,
|
||||
MSM_VIDC_EXTRADATA_ROI_QP = 0x00000013,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_ROI_QP = 0x00000013,
|
||||
#define MSM_VIDC_EXTRADATA_MASTERING_DISPLAY_COLOUR_SEI MSM_VIDC_EXTRADATA_MASTERING_DISPLAY_COLOUR_SEI
|
||||
MSM_VIDC_EXTRADATA_MASTERING_DISPLAY_COLOUR_SEI = 0x00000015,
|
||||
#define MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI
|
||||
MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI = 0x00000016,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI = 0x00000016,
|
||||
#define MSM_VIDC_EXTRADATA_PQ_INFO MSM_VIDC_EXTRADATA_PQ_INFO
|
||||
MSM_VIDC_EXTRADATA_PQ_INFO = 0x00000017,
|
||||
MSM_VIDC_EXTRADATA_INPUT_CROP = 0x0700000E,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_EXTRADATA_OUTPUT_CROP MSM_VIDC_EXTRADATA_OUTPUT_CROP
|
||||
MSM_VIDC_EXTRADATA_OUTPUT_CROP = 0x0700000F,
|
||||
MSM_VIDC_EXTRADATA_DIGITAL_ZOOM = 0x07000010,
|
||||
#define MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO = 0x070000011,
|
||||
MSM_VIDC_EXTRADATA_MULTISLICE_INFO = 0x7F100000,
|
||||
MSM_VIDC_EXTRADATA_NUM_CONCEALED_MB = 0x7F100001,
|
||||
MSM_VIDC_EXTRADATA_INDEX = 0x7F100002,
|
||||
MSM_VIDC_EXTRADATA_ASPECT_RATIO = 0x7F100003,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_EXTRADATA_ASPECT_RATIO = 0x7F100003,
|
||||
MSM_VIDC_EXTRADATA_METADATA_LTR = 0x7F100004,
|
||||
MSM_VIDC_EXTRADATA_METADATA_FILLER = 0x7FE00002,
|
||||
MSM_VIDC_EXTRADATA_METADATA_MBI = 0x7F100005,
|
||||
MSM_VIDC_EXTRADATA_YUVSTATS_INFO = 0x7F100007,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_EXTRADATA_VUI_DISPLAY_INFO MSM_VIDC_EXTRADATA_VUI_DISPLAY_INFO
|
||||
MSM_VIDC_EXTRADATA_VUI_DISPLAY_INFO = 0x7F100006,
|
||||
MSM_VIDC_EXTRADATA_YUVSTATS_INFO = 0x7F100007,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vidc_interlace_type {
|
||||
MSM_VIDC_INTERLACE_FRAME_PROGRESSIVE = 0x01,
|
||||
MSM_VIDC_INTERLACE_INTERLEAVE_FRAME_TOPFIELDFIRST = 0x02,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_INTERLACE_INTERLEAVE_FRAME_BOTTOMFIELDFIRST = 0x04,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_INTERLACE_FRAME_TOPFIELDFIRST = 0x08,
|
||||
MSM_VIDC_INTERLACE_FRAME_BOTTOMFIELDFIRST = 0x10,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_FRAMEPACK_CHECKERBOARD 0x00
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_FRAMEPACK_COLUMN_INTERLEAVE 0x01
|
||||
#define MSM_VIDC_FRAMEPACK_ROW_INTERLEAVE 0x02
|
||||
#define MSM_VIDC_FRAMEPACK_SIDE_BY_SIDE 0x03
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_FRAMEPACK_TOP_BOTTOM 0x04
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_FRAMEPACK_TEMPORAL_INTERLEAVE 0x05
|
||||
enum msm_vidc_recovery_sei {
|
||||
MSM_VIDC_FRAME_RECONSTRUCTION_INCORRECT = 0x0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_FRAME_RECONSTRUCTION_CORRECT = 0x01,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_FRAME_RECONSTRUCTION_APPROXIMATELY_CORRECT = 0x02,
|
||||
};
|
||||
enum msm_vidc_userdata_type {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_USERDATA_TYPE_FRAME = 0x1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_USERDATA_TYPE_TOP_FIELD = 0x2,
|
||||
MSM_VIDC_USERDATA_TYPE_BOTTOM_FIELD = 0x3,
|
||||
};
|
||||
enum msm_vidc_h264_color_primaries_values {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_RESERVED_1 = 0,
|
||||
MSM_VIDC_BT709_5 = 1,
|
||||
MSM_VIDC_UNSPECIFIED = 2,
|
||||
MSM_VIDC_RESERVED_2 = 3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_BT470_6_M = 4,
|
||||
MSM_VIDC_BT601_6_625 = 5,
|
||||
MSM_VIDC_BT470_6_BG = MSM_VIDC_BT601_6_625,
|
||||
MSM_VIDC_BT601_6_525 = 6,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_SMPTE_240M = 7,
|
||||
MSM_VIDC_GENERIC_FILM = 8,
|
||||
MSM_VIDC_BT2020 = 9,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vidc_vp9_color_primaries_values {
|
||||
MSM_VIDC_CS_UNKNOWN,
|
||||
MSM_VIDC_CS_BT_601,
|
||||
MSM_VIDC_CS_BT_709,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_CS_SMPTE_170,
|
||||
MSM_VIDC_CS_SMPTE_240,
|
||||
MSM_VIDC_CS_BT_2020,
|
||||
MSM_VIDC_CS_RESERVED,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_CS_RGB,
|
||||
};
|
||||
enum msm_vidc_h264_matrix_coeff_values {
|
||||
MSM_VIDC_MATRIX_RGB = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_MATRIX_BT_709_5 = 1,
|
||||
MSM_VIDC_MATRIX_UNSPECIFIED = 2,
|
||||
MSM_VIDC_MATRIX_RESERVED = 3,
|
||||
MSM_VIDC_MATRIX_FCC_47 = 4,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_MATRIX_601_6_625 = 5,
|
||||
MSM_VIDC_MATRIX_BT470_BG = MSM_VIDC_MATRIX_601_6_625,
|
||||
MSM_VIDC_MATRIX_601_6_525 = 6,
|
||||
MSM_VIDC_MATRIX_SMPTE_170M = MSM_VIDC_MATRIX_601_6_525,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_MATRIX_SMPTE_240M = 7,
|
||||
MSM_VIDC_MATRIX_Y_CG_CO = 8,
|
||||
MSM_VIDC_MATRIX_BT_2020 = 9,
|
||||
MSM_VIDC_MATRIX_BT_2020_CONST = 10,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vidc_h264_transfer_chars_values {
|
||||
MSM_VIDC_TRANSFER_RESERVED_1 = 0,
|
||||
MSM_VIDC_TRANSFER_BT709_5 = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_TRANSFER_UNSPECIFIED = 2,
|
||||
MSM_VIDC_TRANSFER_RESERVED_2 = 3,
|
||||
MSM_VIDC_TRANSFER_BT_470_6_M = 4,
|
||||
MSM_VIDC_TRANSFER_BT_470_6_BG = 5,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_TRANSFER_601_6_625 = 6,
|
||||
MSM_VIDC_TRANSFER_601_6_525 = MSM_VIDC_TRANSFER_601_6_625,
|
||||
MSM_VIDC_TRANSFER_SMPTE_240M = 7,
|
||||
MSM_VIDC_TRANSFER_LINEAR = 8,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_TRANSFER_LOG_100_1 = 9,
|
||||
MSM_VIDC_TRANSFER_LOG_100_SQRT10_1 = 10,
|
||||
MSM_VIDC_TRANSFER_IEC_61966 = 11,
|
||||
MSM_VIDC_TRANSFER_BT_1361 = 12,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_TRANSFER_SRGB = 13,
|
||||
MSM_VIDC_TRANSFER_BT_2020_10 = 14,
|
||||
MSM_VIDC_TRANSFER_BT_2020_12 = 15,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vidc_pixel_depth {
|
||||
MSM_VIDC_BIT_DEPTH_8,
|
||||
@@ -282,8 +402,25 @@ enum msm_vidc_pixel_depth {
|
||||
MSM_VIDC_BIT_DEPTH_UNSUPPORTED = 0XFFFFFFFF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vidc_video_format {
|
||||
MSM_VIDC_COMPONENT,
|
||||
MSM_VIDC_PAL,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_NTSC,
|
||||
MSM_VIDC_SECAM,
|
||||
MSM_VIDC_MAC,
|
||||
MSM_VIDC_UNSPECIFIED_FORMAT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_RESERVED_1_FORMAT,
|
||||
MSM_VIDC_RESERVED_2_FORMAT,
|
||||
};
|
||||
enum msm_vidc_color_desc_flag {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_VIDC_COLOR_DESC_NOT_PRESENT,
|
||||
MSM_VIDC_COLOR_DESC_PRESENT,
|
||||
};
|
||||
#define MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED 0x0
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MSM_VIDC_PIC_STRUCT_PROGRESSIVE 0x1
|
||||
#endif
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
|
||||
|
||||
@@ -22,818 +22,820 @@
|
||||
#define MAX_PLANES_PER_STREAM 3
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define MAX_NUM_STREAM 7
|
||||
#define ISP_VERSION_48 48
|
||||
#define ISP_VERSION_47 47
|
||||
#define ISP_VERSION_46 46
|
||||
#define ISP_VERSION_44 44
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_VERSION_44 44
|
||||
#define ISP_VERSION_40 40
|
||||
#define ISP_VERSION_32 32
|
||||
#define ISP_NATIVE_BUF_BIT (0x10000 << 0)
|
||||
#define ISP0_BIT (0x10000 << 1)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP0_BIT (0x10000 << 1)
|
||||
#define ISP1_BIT (0x10000 << 2)
|
||||
#define ISP_META_CHANNEL_BIT (0x10000 << 3)
|
||||
#define ISP_SCRATCH_BUF_BIT (0x10000 << 4)
|
||||
#define ISP_OFFLINE_STATS_BIT (0x10000 << 5)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_OFFLINE_STATS_BIT (0x10000 << 5)
|
||||
#define ISP_STATS_STREAM_BIT 0x80000000
|
||||
struct msm_vfe_cfg_cmd_list;
|
||||
enum ISP_START_PIXEL_PATTERN {
|
||||
ISP_BAYER_RGRGRG,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_BAYER_RGRGRG,
|
||||
ISP_BAYER_GRGRGR,
|
||||
ISP_BAYER_BGBGBG,
|
||||
ISP_BAYER_GBGBGB,
|
||||
ISP_YUV_YCbYCr,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_YUV_YCbYCr,
|
||||
ISP_YUV_YCrYCb,
|
||||
ISP_YUV_CbYCrY,
|
||||
ISP_YUV_CrYCbY,
|
||||
ISP_PIX_PATTERN_MAX
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_PIX_PATTERN_MAX
|
||||
};
|
||||
enum msm_vfe_plane_fmt {
|
||||
Y_PLANE,
|
||||
CB_PLANE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CB_PLANE,
|
||||
CR_PLANE,
|
||||
CRCB_PLANE,
|
||||
CBCR_PLANE,
|
||||
VFE_PLANE_FMT_MAX
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_PLANE_FMT_MAX
|
||||
};
|
||||
enum msm_vfe_input_src {
|
||||
VFE_PIX_0,
|
||||
VFE_RAW_0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_RAW_0,
|
||||
VFE_RAW_1,
|
||||
VFE_RAW_2,
|
||||
VFE_SRC_MAX,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_axi_stream_src {
|
||||
PIX_ENCODER,
|
||||
PIX_VIEWFINDER,
|
||||
PIX_VIDEO,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
PIX_VIDEO,
|
||||
CAMIF_RAW,
|
||||
IDEAL_RAW,
|
||||
RDI_INTF_0,
|
||||
RDI_INTF_1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
RDI_INTF_1,
|
||||
RDI_INTF_2,
|
||||
VFE_AXI_SRC_MAX
|
||||
};
|
||||
enum msm_vfe_frame_skip_pattern {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vfe_frame_skip_pattern {
|
||||
NO_SKIP,
|
||||
EVERY_2FRAME,
|
||||
EVERY_3FRAME,
|
||||
EVERY_4FRAME,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
EVERY_4FRAME,
|
||||
EVERY_5FRAME,
|
||||
EVERY_6FRAME,
|
||||
EVERY_7FRAME,
|
||||
EVERY_8FRAME,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
EVERY_8FRAME,
|
||||
EVERY_16FRAME,
|
||||
EVERY_32FRAME,
|
||||
SKIP_ALL,
|
||||
SKIP_RANGE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
SKIP_RANGE,
|
||||
MAX_SKIP,
|
||||
};
|
||||
#define MSM_VFE_STREAM_STOP_PERIOD 15
|
||||
enum msm_isp_stats_type {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_isp_stats_type {
|
||||
MSM_ISP_STATS_AEC,
|
||||
MSM_ISP_STATS_AF,
|
||||
MSM_ISP_STATS_AWB,
|
||||
MSM_ISP_STATS_RS,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_ISP_STATS_RS,
|
||||
MSM_ISP_STATS_CS,
|
||||
MSM_ISP_STATS_IHIST,
|
||||
MSM_ISP_STATS_SKIN,
|
||||
MSM_ISP_STATS_BG,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_ISP_STATS_BG,
|
||||
MSM_ISP_STATS_BF,
|
||||
MSM_ISP_STATS_BE,
|
||||
MSM_ISP_STATS_BHIST,
|
||||
MSM_ISP_STATS_BF_SCALE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_ISP_STATS_BF_SCALE,
|
||||
MSM_ISP_STATS_HDR_BE,
|
||||
MSM_ISP_STATS_HDR_BHIST,
|
||||
MSM_ISP_STATS_AEC_BG,
|
||||
MSM_ISP_STATS_MAX
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_ISP_STATS_MAX
|
||||
};
|
||||
struct msm_isp_sw_framskip {
|
||||
uint32_t stats_type_mask;
|
||||
uint32_t stream_src_mask;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stream_src_mask;
|
||||
enum msm_vfe_frame_skip_pattern skip_mode;
|
||||
uint32_t min_frame_id;
|
||||
uint32_t max_frame_id;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_testgen_color_pattern {
|
||||
COLOR_BAR_8_COLOR,
|
||||
UNICOLOR_WHITE,
|
||||
UNICOLOR_YELLOW,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
UNICOLOR_YELLOW,
|
||||
UNICOLOR_CYAN,
|
||||
UNICOLOR_GREEN,
|
||||
UNICOLOR_MAGENTA,
|
||||
UNICOLOR_RED,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
UNICOLOR_RED,
|
||||
UNICOLOR_BLUE,
|
||||
UNICOLOR_BLACK,
|
||||
MAX_COLOR,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_camif_input {
|
||||
CAMIF_DISABLED,
|
||||
CAMIF_PAD_REG_INPUT,
|
||||
CAMIF_MIDDI_INPUT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CAMIF_MIDDI_INPUT,
|
||||
CAMIF_MIPI_INPUT,
|
||||
};
|
||||
struct msm_vfe_fetch_engine_cfg {
|
||||
uint32_t input_format;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t input_format;
|
||||
uint32_t buf_width;
|
||||
uint32_t buf_height;
|
||||
uint32_t fetch_width;
|
||||
uint32_t fetch_height;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t fetch_height;
|
||||
uint32_t x_offset;
|
||||
uint32_t y_offset;
|
||||
uint32_t buf_stride;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_camif_output_format {
|
||||
CAMIF_QCOM_RAW,
|
||||
CAMIF_MIPI_RAW,
|
||||
CAMIF_PLAIN_8,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CAMIF_PLAIN_8,
|
||||
CAMIF_PLAIN_16,
|
||||
CAMIF_MAX_FORMAT,
|
||||
};
|
||||
struct msm_vfe_camif_subsample_cfg {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_camif_subsample_cfg {
|
||||
uint32_t irq_subsample_period;
|
||||
uint32_t irq_subsample_pattern;
|
||||
uint32_t sof_counter_step;
|
||||
uint32_t pixel_skip;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t pixel_skip;
|
||||
uint32_t line_skip;
|
||||
uint32_t first_line;
|
||||
uint32_t last_line;
|
||||
uint32_t first_pixel;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t first_pixel;
|
||||
uint32_t last_pixel;
|
||||
enum msm_vfe_camif_output_format output_format;
|
||||
};
|
||||
struct msm_vfe_camif_cfg {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_camif_cfg {
|
||||
uint32_t lines_per_frame;
|
||||
uint32_t pixels_per_line;
|
||||
uint32_t first_pixel;
|
||||
uint32_t last_pixel;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t last_pixel;
|
||||
uint32_t first_line;
|
||||
uint32_t last_line;
|
||||
uint32_t epoch_line0;
|
||||
uint32_t epoch_line1;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t epoch_line1;
|
||||
uint32_t is_split;
|
||||
enum msm_vfe_camif_input camif_input;
|
||||
struct msm_vfe_camif_subsample_cfg subsample_cfg;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_testgen_cfg {
|
||||
uint32_t lines_per_frame;
|
||||
uint32_t pixels_per_line;
|
||||
uint32_t v_blank;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t v_blank;
|
||||
uint32_t h_blank;
|
||||
enum ISP_START_PIXEL_PATTERN pixel_bayer_pattern;
|
||||
uint32_t rotate_period;
|
||||
enum msm_vfe_testgen_color_pattern color_bar_pattern;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vfe_testgen_color_pattern color_bar_pattern;
|
||||
uint32_t burst_num_frame;
|
||||
};
|
||||
enum msm_vfe_inputmux {
|
||||
CAMIF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
CAMIF,
|
||||
TESTGEN,
|
||||
EXTERNAL_READ,
|
||||
};
|
||||
enum msm_vfe_stats_composite_group {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vfe_stats_composite_group {
|
||||
STATS_COMPOSITE_GRP_NONE,
|
||||
STATS_COMPOSITE_GRP_1,
|
||||
STATS_COMPOSITE_GRP_2,
|
||||
STATS_COMPOSITE_GRP_MAX,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
STATS_COMPOSITE_GRP_MAX,
|
||||
};
|
||||
enum msm_vfe_hvx_streaming_cmd {
|
||||
HVX_DISABLE,
|
||||
HVX_ONE_WAY,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
HVX_ONE_WAY,
|
||||
HVX_ROUND_TRIP
|
||||
};
|
||||
struct msm_vfe_pix_cfg {
|
||||
struct msm_vfe_camif_cfg camif_cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_camif_cfg camif_cfg;
|
||||
struct msm_vfe_testgen_cfg testgen_cfg;
|
||||
struct msm_vfe_fetch_engine_cfg fetch_engine_cfg;
|
||||
enum msm_vfe_inputmux input_mux;
|
||||
enum ISP_START_PIXEL_PATTERN pixel_pattern;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum ISP_START_PIXEL_PATTERN pixel_pattern;
|
||||
uint32_t input_format;
|
||||
enum msm_vfe_hvx_streaming_cmd hvx_cmd;
|
||||
uint32_t is_split;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_rdi_cfg {
|
||||
uint8_t cid;
|
||||
uint8_t frame_based;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_input_cfg {
|
||||
union {
|
||||
struct msm_vfe_pix_cfg pix_cfg;
|
||||
struct msm_vfe_rdi_cfg rdi_cfg;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_rdi_cfg rdi_cfg;
|
||||
} d;
|
||||
enum msm_vfe_input_src input_src;
|
||||
uint32_t input_pix_clk;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_fetch_eng_start {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t buf_idx;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t buf_idx;
|
||||
uint8_t offline_mode;
|
||||
uint32_t fd;
|
||||
uint32_t buf_addr;
|
||||
uint32_t frame_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t frame_id;
|
||||
};
|
||||
struct msm_vfe_axi_plane_cfg {
|
||||
uint32_t output_width;
|
||||
uint32_t output_height;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t output_height;
|
||||
uint32_t output_stride;
|
||||
uint32_t output_scan_lines;
|
||||
uint32_t output_plane_format;
|
||||
uint32_t plane_addr_offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t plane_addr_offset;
|
||||
uint8_t csid_src;
|
||||
uint8_t rdi_cid;
|
||||
};
|
||||
enum msm_stream_memory_input_t {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_stream_memory_input_t {
|
||||
MEMORY_INPUT_DISABLED,
|
||||
MEMORY_INPUT_ENABLED
|
||||
};
|
||||
struct msm_vfe_axi_stream_request_cmd {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_axi_stream_request_cmd {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t vt_enable;
|
||||
uint32_t output_format;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t output_format;
|
||||
enum msm_vfe_axi_stream_src stream_src;
|
||||
struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
|
||||
uint32_t burst_count;
|
||||
uint32_t hfr_mode;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t hfr_mode;
|
||||
uint8_t frame_base;
|
||||
uint32_t init_frame_drop;
|
||||
enum msm_vfe_frame_skip_pattern frame_skip_pattern;
|
||||
uint8_t buf_divert;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t buf_divert;
|
||||
uint32_t axi_stream_handle;
|
||||
uint32_t controllable_output;
|
||||
uint32_t burst_len;
|
||||
enum msm_stream_memory_input_t memory_input;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_stream_memory_input_t memory_input;
|
||||
};
|
||||
struct msm_vfe_axi_stream_release_cmd {
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_axi_stream_cmd {
|
||||
STOP_STREAM,
|
||||
START_STREAM,
|
||||
STOP_IMMEDIATELY,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
STOP_IMMEDIATELY,
|
||||
};
|
||||
struct msm_vfe_axi_stream_cfg_cmd {
|
||||
uint8_t num_streams;
|
||||
uint32_t stream_handle[VFE_AXI_SRC_MAX];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stream_handle[VFE_AXI_SRC_MAX];
|
||||
enum msm_vfe_axi_stream_cmd cmd;
|
||||
uint8_t sync_frame_id_src;
|
||||
};
|
||||
enum msm_vfe_axi_stream_update_type {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vfe_axi_stream_update_type {
|
||||
ENABLE_STREAM_BUF_DIVERT,
|
||||
DISABLE_STREAM_BUF_DIVERT,
|
||||
UPDATE_STREAM_FRAMEDROP_PATTERN,
|
||||
UPDATE_STREAM_STATS_FRAMEDROP_PATTERN,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
UPDATE_STREAM_STATS_FRAMEDROP_PATTERN,
|
||||
UPDATE_STREAM_AXI_CONFIG,
|
||||
UPDATE_STREAM_REQUEST_FRAMES,
|
||||
UPDATE_STREAM_ADD_BUFQ,
|
||||
UPDATE_STREAM_REMOVE_BUFQ,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
UPDATE_STREAM_REMOVE_BUFQ,
|
||||
UPDATE_STREAM_SW_FRAME_DROP,
|
||||
};
|
||||
enum msm_vfe_iommu_type {
|
||||
IOMMU_ATTACH,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
IOMMU_ATTACH,
|
||||
IOMMU_DETACH,
|
||||
};
|
||||
enum msm_vfe_buff_queue_id {
|
||||
VFE_BUF_QUEUE_DEFAULT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_BUF_QUEUE_DEFAULT,
|
||||
VFE_BUF_QUEUE_SHARED,
|
||||
VFE_BUF_QUEUE_MAX,
|
||||
};
|
||||
struct msm_vfe_axi_stream_cfg_update_info {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_axi_stream_cfg_update_info {
|
||||
uint32_t stream_handle;
|
||||
uint32_t output_format;
|
||||
uint32_t user_stream_id;
|
||||
uint32_t frame_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t frame_id;
|
||||
enum msm_vfe_frame_skip_pattern skip_pattern;
|
||||
struct msm_vfe_axi_plane_cfg plane_cfg[MAX_PLANES_PER_STREAM];
|
||||
struct msm_isp_sw_framskip sw_skip_info;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_axi_halt_cmd {
|
||||
uint32_t stop_camif;
|
||||
uint32_t overflow_detected;
|
||||
uint32_t blocking_halt;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t blocking_halt;
|
||||
};
|
||||
struct msm_vfe_axi_reset_cmd {
|
||||
uint32_t blocking;
|
||||
uint32_t frame_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t frame_id;
|
||||
};
|
||||
struct msm_vfe_axi_restart_cmd {
|
||||
uint32_t enable_camif;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_axi_stream_update_cmd {
|
||||
uint32_t num_streams;
|
||||
enum msm_vfe_axi_stream_update_type update_type;
|
||||
struct msm_vfe_axi_stream_cfg_update_info update_info[MSM_ISP_STATS_MAX];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_axi_stream_cfg_update_info update_info[MSM_ISP_STATS_MAX];
|
||||
};
|
||||
struct msm_vfe_smmu_attach_cmd {
|
||||
uint32_t security_mode;
|
||||
uint32_t iommu_attach_mode;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t iommu_attach_mode;
|
||||
};
|
||||
struct msm_vfe_stats_stream_request_cmd {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stream_id;
|
||||
enum msm_isp_stats_type stats_type;
|
||||
uint32_t composite_flag;
|
||||
uint32_t framedrop_pattern;
|
||||
uint32_t init_frame_drop;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t init_frame_drop;
|
||||
uint32_t irq_subsample_pattern;
|
||||
uint32_t buffer_offset;
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_stats_stream_release_cmd {
|
||||
uint32_t stream_handle;
|
||||
};
|
||||
struct msm_vfe_stats_stream_cfg_cmd {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_stats_stream_cfg_cmd {
|
||||
uint8_t num_streams;
|
||||
uint32_t stream_handle[MSM_ISP_STATS_MAX];
|
||||
uint8_t enable;
|
||||
uint32_t stats_burst_len;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stats_burst_len;
|
||||
};
|
||||
enum msm_vfe_reg_cfg_type {
|
||||
VFE_WRITE,
|
||||
VFE_WRITE_MB,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_WRITE_MB,
|
||||
VFE_READ,
|
||||
VFE_CFG_MASK,
|
||||
VFE_WRITE_DMI_16BIT,
|
||||
VFE_WRITE_DMI_32BIT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_WRITE_DMI_32BIT,
|
||||
VFE_WRITE_DMI_64BIT,
|
||||
VFE_READ_DMI_16BIT,
|
||||
VFE_READ_DMI_32BIT,
|
||||
VFE_READ_DMI_64BIT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_READ_DMI_64BIT,
|
||||
GET_MAX_CLK_RATE,
|
||||
GET_CLK_RATES,
|
||||
GET_ISP_ID,
|
||||
VFE_HW_UPDATE_LOCK,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_HW_UPDATE_LOCK,
|
||||
VFE_HW_UPDATE_UNLOCK,
|
||||
SET_WM_UB_SIZE,
|
||||
SET_UB_POLICY,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_cfg_cmd2 {
|
||||
uint16_t num_cfg;
|
||||
uint16_t cmd_len;
|
||||
void * cfg_data;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
void * cfg_data;
|
||||
void * cfg_cmd;
|
||||
};
|
||||
struct msm_vfe_cfg_cmd_list {
|
||||
struct msm_vfe_cfg_cmd2 cfg_cmd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_cfg_cmd2 cfg_cmd;
|
||||
struct msm_vfe_cfg_cmd_list * next;
|
||||
uint32_t next_size;
|
||||
};
|
||||
struct msm_vfe_reg_rw_info {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_vfe_reg_rw_info {
|
||||
uint32_t reg_offset;
|
||||
uint32_t cmd_data_offset;
|
||||
uint32_t len;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_vfe_reg_mask_info {
|
||||
uint32_t reg_offset;
|
||||
uint32_t mask;
|
||||
uint32_t val;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t val;
|
||||
};
|
||||
struct msm_vfe_reg_dmi_info {
|
||||
uint32_t hi_tbl_offset;
|
||||
uint32_t lo_tbl_offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t lo_tbl_offset;
|
||||
uint32_t len;
|
||||
};
|
||||
struct msm_vfe_reg_cfg_cmd {
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
union {
|
||||
struct msm_vfe_reg_rw_info rw_info;
|
||||
struct msm_vfe_reg_mask_info mask_info;
|
||||
struct msm_vfe_reg_dmi_info dmi_info;
|
||||
} u;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
} u;
|
||||
enum msm_vfe_reg_cfg_type cmd_type;
|
||||
};
|
||||
enum vfe_sd_type {
|
||||
VFE_SD_0 = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
VFE_SD_0 = 0,
|
||||
VFE_SD_1,
|
||||
VFE_SD_COMMON,
|
||||
VFE_SD_MAX,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define MS_NUM_SLAVE_MAX 1
|
||||
enum msm_vfe_dual_hw_type {
|
||||
DUAL_NONE = 0,
|
||||
DUAL_HW_VFE_SPLIT = 1,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
DUAL_HW_VFE_SPLIT = 1,
|
||||
DUAL_HW_MASTER_SLAVE = 2,
|
||||
};
|
||||
enum msm_vfe_dual_hw_ms_type {
|
||||
MS_TYPE_NONE,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MS_TYPE_NONE,
|
||||
MS_TYPE_MASTER,
|
||||
MS_TYPE_SLAVE,
|
||||
};
|
||||
struct msm_isp_set_dual_hw_ms_cmd {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_set_dual_hw_ms_cmd {
|
||||
uint8_t num_src;
|
||||
enum msm_vfe_dual_hw_ms_type dual_hw_ms_type;
|
||||
enum msm_vfe_input_src primary_intf;
|
||||
enum msm_vfe_input_src input_src[VFE_SRC_MAX];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_vfe_input_src input_src[VFE_SRC_MAX];
|
||||
uint32_t sof_delta_threshold;
|
||||
};
|
||||
enum msm_isp_buf_type {
|
||||
ISP_PRIVATE_BUF,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_PRIVATE_BUF,
|
||||
ISP_SHARE_BUF,
|
||||
MAX_ISP_BUF_TYPE,
|
||||
};
|
||||
struct msm_isp_unmap_buf_req {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_unmap_buf_req {
|
||||
uint32_t fd;
|
||||
};
|
||||
struct msm_isp_buf_request {
|
||||
uint32_t session_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint8_t num_buf;
|
||||
uint32_t handle;
|
||||
enum msm_isp_buf_type buf_type;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_isp_buf_type buf_type;
|
||||
};
|
||||
struct msm_isp_qbuf_plane {
|
||||
uint32_t addr;
|
||||
uint32_t offset;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t offset;
|
||||
uint32_t length;
|
||||
};
|
||||
struct msm_isp_qbuf_buffer {
|
||||
struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM];
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_qbuf_plane planes[MAX_PLANES_PER_STREAM];
|
||||
uint32_t num_planes;
|
||||
};
|
||||
struct msm_isp_qbuf_info {
|
||||
uint32_t handle;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t handle;
|
||||
int32_t buf_idx;
|
||||
struct msm_isp_qbuf_buffer buffer;
|
||||
uint32_t dirty_buf;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_isp_clk_rates {
|
||||
uint32_t svs_rate;
|
||||
uint32_t nominal_rate;
|
||||
uint32_t high_rate;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t high_rate;
|
||||
};
|
||||
struct msm_vfe_axi_src_state {
|
||||
enum msm_vfe_input_src input_src;
|
||||
uint32_t src_active;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t src_active;
|
||||
uint32_t src_frame_id;
|
||||
};
|
||||
enum msm_isp_event_mask_index {
|
||||
ISP_EVENT_MASK_INDEX_STATS_NOTIFY = 0,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_EVENT_MASK_INDEX_STATS_NOTIFY = 0,
|
||||
ISP_EVENT_MASK_INDEX_ERROR = 1,
|
||||
ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT = 2,
|
||||
ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE = 3,
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE = 4,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE = 4,
|
||||
ISP_EVENT_MASK_INDEX_SOF = 5,
|
||||
ISP_EVENT_MASK_INDEX_BUF_DIVERT = 6,
|
||||
ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY = 7,
|
||||
ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE = 8,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE = 8,
|
||||
ISP_EVENT_MASK_INDEX_BUF_DONE = 9,
|
||||
ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING = 10,
|
||||
ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH = 11,
|
||||
ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR = 12,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR = 12,
|
||||
};
|
||||
#define ISP_EVENT_SUBS_MASK_NONE 0
|
||||
#define ISP_EVENT_SUBS_MASK_STATS_NOTIFY (1 << ISP_EVENT_MASK_INDEX_STATS_NOTIFY)
|
||||
#define ISP_EVENT_SUBS_MASK_ERROR (1 << ISP_EVENT_MASK_INDEX_ERROR)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_SUBS_MASK_ERROR (1 << ISP_EVENT_MASK_INDEX_ERROR)
|
||||
#define ISP_EVENT_SUBS_MASK_IOMMU_P_FAULT (1 << ISP_EVENT_MASK_INDEX_IOMMU_P_FAULT)
|
||||
#define ISP_EVENT_SUBS_MASK_STREAM_UPDATE_DONE (1 << ISP_EVENT_MASK_INDEX_STREAM_UPDATE_DONE)
|
||||
#define ISP_EVENT_SUBS_MASK_REG_UPDATE (1 << ISP_EVENT_MASK_INDEX_REG_UPDATE)
|
||||
#define ISP_EVENT_SUBS_MASK_SOF (1 << ISP_EVENT_MASK_INDEX_SOF)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_SUBS_MASK_SOF (1 << ISP_EVENT_MASK_INDEX_SOF)
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DIVERT (1 << ISP_EVENT_MASK_INDEX_BUF_DIVERT)
|
||||
#define ISP_EVENT_SUBS_MASK_COMP_STATS_NOTIFY (1 << ISP_EVENT_MASK_INDEX_COMP_STATS_NOTIFY)
|
||||
#define ISP_EVENT_SUBS_MASK_FE_READ_DONE (1 << ISP_EVENT_MASK_INDEX_MASK_FE_READ_DONE)
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DONE (1 << ISP_EVENT_MASK_INDEX_BUF_DONE)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_DONE (1 << ISP_EVENT_MASK_INDEX_BUF_DONE)
|
||||
#define ISP_EVENT_SUBS_MASK_REG_UPDATE_MISSING (1 << ISP_EVENT_MASK_INDEX_REG_UPDATE_MISSING)
|
||||
#define ISP_EVENT_SUBS_MASK_PING_PONG_MISMATCH (1 << ISP_EVENT_MASK_INDEX_PING_PONG_MISMATCH)
|
||||
#define ISP_EVENT_SUBS_MASK_BUF_FATAL_ERROR (1 << ISP_EVENT_MASK_INDEX_BUF_FATAL_ERROR)
|
||||
enum msm_isp_event_idx {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum msm_isp_event_idx {
|
||||
ISP_REG_UPDATE = 0,
|
||||
ISP_EPOCH_0 = 1,
|
||||
ISP_EPOCH_1 = 2,
|
||||
ISP_START_ACK = 3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_START_ACK = 3,
|
||||
ISP_STOP_ACK = 4,
|
||||
ISP_IRQ_VIOLATION = 5,
|
||||
ISP_STATS_OVERFLOW = 6,
|
||||
ISP_BUF_DONE = 7,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_BUF_DONE = 7,
|
||||
ISP_FE_RD_DONE = 8,
|
||||
ISP_IOMMU_P_FAULT = 9,
|
||||
ISP_ERROR = 10,
|
||||
ISP_HW_FATAL_ERROR = 11,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_HW_FATAL_ERROR = 11,
|
||||
ISP_PING_PONG_MISMATCH = 12,
|
||||
ISP_REG_UPDATE_MISSING = 13,
|
||||
ISP_BUF_FATAL_ERROR = 14,
|
||||
ISP_EVENT_MAX = 15
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_EVENT_MAX = 15
|
||||
};
|
||||
#define ISP_EVENT_OFFSET 8
|
||||
#define ISP_EVENT_BASE (V4L2_EVENT_PRIVATE_START)
|
||||
#define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_BUF_EVENT_BASE (ISP_EVENT_BASE + (1 << ISP_EVENT_OFFSET))
|
||||
#define ISP_STATS_EVENT_BASE (ISP_EVENT_BASE + (2 << ISP_EVENT_OFFSET))
|
||||
#define ISP_CAMIF_EVENT_BASE (ISP_EVENT_BASE + (3 << ISP_EVENT_OFFSET))
|
||||
#define ISP_STREAM_EVENT_BASE (ISP_EVENT_BASE + (4 << ISP_EVENT_OFFSET))
|
||||
#define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_REG_UPDATE (ISP_EVENT_BASE + ISP_REG_UPDATE)
|
||||
#define ISP_EVENT_EPOCH_0 (ISP_EVENT_BASE + ISP_EPOCH_0)
|
||||
#define ISP_EVENT_EPOCH_1 (ISP_EVENT_BASE + ISP_EPOCH_1)
|
||||
#define ISP_EVENT_START_ACK (ISP_EVENT_BASE + ISP_START_ACK)
|
||||
#define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_STOP_ACK (ISP_EVENT_BASE + ISP_STOP_ACK)
|
||||
#define ISP_EVENT_IRQ_VIOLATION (ISP_EVENT_BASE + ISP_IRQ_VIOLATION)
|
||||
#define ISP_EVENT_STATS_OVERFLOW (ISP_EVENT_BASE + ISP_STATS_OVERFLOW)
|
||||
#define ISP_EVENT_ERROR (ISP_EVENT_BASE + ISP_ERROR)
|
||||
#define ISP_EVENT_SOF (ISP_CAMIF_EVENT_BASE)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_SOF (ISP_CAMIF_EVENT_BASE)
|
||||
#define ISP_EVENT_EOF (ISP_CAMIF_EVENT_BASE + 1)
|
||||
#define ISP_EVENT_BUF_DONE (ISP_EVENT_BASE + ISP_BUF_DONE)
|
||||
#define ISP_EVENT_BUF_DIVERT (ISP_BUF_EVENT_BASE)
|
||||
#define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_STATS_NOTIFY (ISP_STATS_EVENT_BASE)
|
||||
#define ISP_EVENT_COMP_STATS_NOTIFY (ISP_EVENT_STATS_NOTIFY + MSM_ISP_STATS_MAX)
|
||||
#define ISP_EVENT_FE_READ_DONE (ISP_EVENT_BASE + ISP_FE_RD_DONE)
|
||||
#define ISP_EVENT_IOMMU_P_FAULT (ISP_EVENT_BASE + ISP_IOMMU_P_FAULT)
|
||||
#define ISP_EVENT_HW_FATAL_ERROR (ISP_EVENT_BASE + ISP_HW_FATAL_ERROR)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_HW_FATAL_ERROR (ISP_EVENT_BASE + ISP_HW_FATAL_ERROR)
|
||||
#define ISP_EVENT_PING_PONG_MISMATCH (ISP_EVENT_BASE + ISP_PING_PONG_MISMATCH)
|
||||
#define ISP_EVENT_REG_UPDATE_MISSING (ISP_EVENT_BASE + ISP_REG_UPDATE_MISSING)
|
||||
#define ISP_EVENT_BUF_FATAL_ERROR (ISP_EVENT_BASE + ISP_BUF_FATAL_ERROR)
|
||||
#define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ISP_EVENT_STREAM_UPDATE_DONE (ISP_STREAM_EVENT_BASE)
|
||||
struct msm_isp_buf_event {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t handle;
|
||||
uint32_t output_format;
|
||||
int8_t buf_idx;
|
||||
};
|
||||
struct msm_isp_fetch_eng_event {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_fetch_eng_event {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
uint32_t fd;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t fd;
|
||||
int8_t buf_idx;
|
||||
int8_t offline_mode;
|
||||
};
|
||||
struct msm_isp_stats_event {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_stats_event {
|
||||
uint32_t stats_mask;
|
||||
uint8_t stats_buf_idxs[MSM_ISP_STATS_MAX];
|
||||
};
|
||||
struct msm_isp_stream_ack {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_stream_ack {
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
uint32_t handle;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_error_type {
|
||||
ISP_ERROR_NONE,
|
||||
ISP_ERROR_CAMIF,
|
||||
ISP_ERROR_BUS_OVERFLOW,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
ISP_ERROR_BUS_OVERFLOW,
|
||||
ISP_ERROR_RETURN_EMPTY_BUFFER,
|
||||
ISP_ERROR_FRAME_ID_MISMATCH,
|
||||
ISP_ERROR_MAX,
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_isp_error_info {
|
||||
enum msm_vfe_error_type err_type;
|
||||
uint32_t session_id;
|
||||
uint32_t stream_id;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stream_id;
|
||||
uint32_t stream_id_mask;
|
||||
};
|
||||
struct msm_isp_ms_delta_info {
|
||||
uint8_t num_delta_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t num_delta_info;
|
||||
uint32_t delta[MS_NUM_SLAVE_MAX];
|
||||
};
|
||||
struct msm_isp_output_info {
|
||||
uint8_t regs_not_updated;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint8_t regs_not_updated;
|
||||
uint16_t output_err_mask;
|
||||
uint8_t stream_framedrop_mask;
|
||||
uint16_t stats_framedrop_mask;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
struct msm_isp_sof_info {
|
||||
uint8_t regs_not_updated;
|
||||
uint16_t reg_update_fail_mask;
|
||||
uint32_t stream_get_buf_fail_mask;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t stream_get_buf_fail_mask;
|
||||
uint16_t stats_get_buf_fail_mask;
|
||||
struct msm_isp_ms_delta_info ms_delta_info;
|
||||
uint16_t axi_updating_mask;
|
||||
uint32_t reg_update_fail_mask_ext;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t reg_update_fail_mask_ext;
|
||||
};
|
||||
#define AXI_UPDATING_MASK 1
|
||||
#define REG_UPDATE_FAIL_MASK_EXT 1
|
||||
struct msm_isp_event_data {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_event_data {
|
||||
struct timeval timestamp;
|
||||
struct timeval mono_timestamp;
|
||||
uint32_t frame_id;
|
||||
union {
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
union {
|
||||
struct msm_isp_stats_event stats;
|
||||
struct msm_isp_buf_event buf_done;
|
||||
struct msm_isp_fetch_eng_event fetch_done;
|
||||
struct msm_isp_error_info error_info;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
struct msm_isp_error_info error_info;
|
||||
struct msm_isp_output_info output_info;
|
||||
struct msm_isp_sof_info sof_info;
|
||||
} u;
|
||||
};
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
enum msm_vfe_ahb_clk_vote {
|
||||
MSM_ISP_CAMERA_AHB_SVS_VOTE = 1,
|
||||
MSM_ISP_CAMERA_AHB_TURBO_VOTE = 2,
|
||||
MSM_ISP_CAMERA_AHB_NOMINAL_VOTE = 3,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
MSM_ISP_CAMERA_AHB_NOMINAL_VOTE = 3,
|
||||
MSM_ISP_CAMERA_AHB_SUSPEND_VOTE = 4,
|
||||
};
|
||||
struct msm_isp_ahb_clk_cfg {
|
||||
uint32_t vote;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
uint32_t vote;
|
||||
uint32_t reserved[2];
|
||||
};
|
||||
#define V4L2_PIX_FMT_QBGGR8 v4l2_fourcc('Q', 'B', 'G', '8')
|
||||
#define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_QGBRG8 v4l2_fourcc('Q', 'G', 'B', '8')
|
||||
#define V4L2_PIX_FMT_QGRBG8 v4l2_fourcc('Q', 'G', 'R', '8')
|
||||
#define V4L2_PIX_FMT_QRGGB8 v4l2_fourcc('Q', 'R', 'G', '8')
|
||||
#define V4L2_PIX_FMT_QBGGR10 v4l2_fourcc('Q', 'B', 'G', '0')
|
||||
#define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_QGBRG10 v4l2_fourcc('Q', 'G', 'B', '0')
|
||||
#define V4L2_PIX_FMT_QGRBG10 v4l2_fourcc('Q', 'G', 'R', '0')
|
||||
#define V4L2_PIX_FMT_QRGGB10 v4l2_fourcc('Q', 'R', 'G', '0')
|
||||
#define V4L2_PIX_FMT_QBGGR12 v4l2_fourcc('Q', 'B', 'G', '2')
|
||||
#define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_QGBRG12 v4l2_fourcc('Q', 'G', 'B', '2')
|
||||
#define V4L2_PIX_FMT_QGRBG12 v4l2_fourcc('Q', 'G', 'R', '2')
|
||||
#define V4L2_PIX_FMT_QRGGB12 v4l2_fourcc('Q', 'R', 'G', '2')
|
||||
#define V4L2_PIX_FMT_QBGGR14 v4l2_fourcc('Q', 'B', 'G', '4')
|
||||
#define V4L2_PIX_FMT_QGBRG14 v4l2_fourcc('Q', 'G', 'B', '4')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_QGBRG14 v4l2_fourcc('Q', 'G', 'B', '4')
|
||||
#define V4L2_PIX_FMT_QGRBG14 v4l2_fourcc('Q', 'G', 'R', '4')
|
||||
#define V4L2_PIX_FMT_QRGGB14 v4l2_fourcc('Q', 'R', 'G', '4')
|
||||
#define V4L2_PIX_FMT_P16BGGR10 v4l2_fourcc('P', 'B', 'G', '0')
|
||||
#define V4L2_PIX_FMT_P16GBRG10 v4l2_fourcc('P', 'G', 'B', '0')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_P16GBRG10 v4l2_fourcc('P', 'G', 'B', '0')
|
||||
#define V4L2_PIX_FMT_P16GRBG10 v4l2_fourcc('P', 'G', 'R', '0')
|
||||
#define V4L2_PIX_FMT_P16RGGB10 v4l2_fourcc('P', 'R', 'G', '0')
|
||||
#define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4')
|
||||
#define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
|
||||
#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T')
|
||||
#define V4L2_PIX_FMT_META10 v4l2_fourcc('Q', 'M', '1', '0')
|
||||
#define V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
|
||||
#define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4')
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define V4L2_PIX_FMT_SRGGB14 v4l2_fourcc('R', 'G', '1', '4')
|
||||
#define VIDIOC_MSM_VFE_REG_CFG _IOWR('V', BASE_VIDIOC_PRIVATE, struct msm_vfe_cfg_cmd2)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_REQUEST_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 1, struct msm_isp_buf_request)
|
||||
#define VIDIOC_MSM_ISP_ENQUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 2, struct msm_isp_qbuf_info)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_RELEASE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 3, struct msm_isp_buf_request)
|
||||
#define VIDIOC_MSM_ISP_REQUEST_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 4, struct msm_vfe_axi_stream_request_cmd)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_CFG_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 5, struct msm_vfe_axi_stream_cfg_cmd)
|
||||
#define VIDIOC_MSM_ISP_RELEASE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 6, struct msm_vfe_axi_stream_release_cmd)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_INPUT_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 7, struct msm_vfe_input_cfg)
|
||||
#define VIDIOC_MSM_ISP_SET_SRC_STATE _IOWR('V', BASE_VIDIOC_PRIVATE + 8, struct msm_vfe_axi_src_state)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_REQUEST_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 9, struct msm_vfe_stats_stream_request_cmd)
|
||||
#define VIDIOC_MSM_ISP_CFG_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 10, struct msm_vfe_stats_stream_cfg_cmd)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_RELEASE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 11, struct msm_vfe_stats_stream_release_cmd)
|
||||
#define VIDIOC_MSM_ISP_REG_UPDATE_CMD _IOWR('V', BASE_VIDIOC_PRIVATE + 12, enum msm_vfe_input_src)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_UPDATE_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 13, struct msm_vfe_axi_stream_update_cmd)
|
||||
#define VIDIOC_MSM_VFE_REG_LIST_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 14, struct msm_vfe_cfg_cmd_list)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_SMMU_ATTACH _IOWR('V', BASE_VIDIOC_PRIVATE + 15, struct msm_vfe_smmu_attach_cmd)
|
||||
#define VIDIOC_MSM_ISP_UPDATE_STATS_STREAM _IOWR('V', BASE_VIDIOC_PRIVATE + 16, struct msm_vfe_axi_stream_update_cmd)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_AXI_HALT _IOWR('V', BASE_VIDIOC_PRIVATE + 17, struct msm_vfe_axi_halt_cmd)
|
||||
#define VIDIOC_MSM_ISP_AXI_RESET _IOWR('V', BASE_VIDIOC_PRIVATE + 18, struct msm_vfe_axi_reset_cmd)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_AXI_RESTART _IOWR('V', BASE_VIDIOC_PRIVATE + 19, struct msm_vfe_axi_restart_cmd)
|
||||
#define VIDIOC_MSM_ISP_FETCH_ENG_START _IOWR('V', BASE_VIDIOC_PRIVATE + 20, struct msm_vfe_fetch_eng_start)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_DEQUEUE_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 21, struct msm_isp_qbuf_info)
|
||||
#define VIDIOC_MSM_ISP_SET_DUAL_HW_MASTER_SLAVE _IOWR('V', BASE_VIDIOC_PRIVATE + 22, struct msm_isp_set_dual_hw_ms_cmd)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_MAP_BUF_START_FE _IOWR('V', BASE_VIDIOC_PRIVATE + 23, struct msm_vfe_fetch_eng_start)
|
||||
#define VIDIOC_MSM_ISP_UNMAP_BUF _IOWR('V', BASE_VIDIOC_PRIVATE + 24, struct msm_isp_unmap_buf_req)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define VIDIOC_MSM_ISP_AHB_CLK_CFG _IOWR('V', BASE_VIDIOC_PRIVATE + 25, struct msm_isp_ahb_clk_cfg)
|
||||
#endif
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
|
||||
|
||||
@@ -16,31 +16,17 @@
|
||||
***
|
||||
****************************************************************************
|
||||
****************************************************************************/
|
||||
#ifndef _UAPI_LINUX_IOPRIO_H
|
||||
#define _UAPI_LINUX_IOPRIO_H
|
||||
#define IOPRIO_BITS (16)
|
||||
#define IOPRIO_CLASS_SHIFT (13)
|
||||
#ifndef UAPI_UFS_IOCTL_H_
|
||||
#define UAPI_UFS_IOCTL_H_
|
||||
#include <linux/types.h>
|
||||
#define UFS_IOCTL_QUERY 0x5388
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define IOPRIO_PRIO_MASK ((1UL << IOPRIO_CLASS_SHIFT) - 1)
|
||||
#define IOPRIO_PRIO_CLASS(mask) ((mask) >> IOPRIO_CLASS_SHIFT)
|
||||
#define IOPRIO_PRIO_DATA(mask) ((mask) & IOPRIO_PRIO_MASK)
|
||||
#define IOPRIO_PRIO_VALUE(class,data) (((class) << IOPRIO_CLASS_SHIFT) | data)
|
||||
struct ufs_ioctl_query_data {
|
||||
__u32 opcode;
|
||||
__u8 idn;
|
||||
__u16 buf_size;
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
#define ioprio_valid(mask) (IOPRIO_PRIO_CLASS((mask)) != IOPRIO_CLASS_NONE)
|
||||
enum {
|
||||
IOPRIO_CLASS_NONE,
|
||||
IOPRIO_CLASS_RT,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
IOPRIO_CLASS_BE,
|
||||
IOPRIO_CLASS_IDLE,
|
||||
__u8 buffer[0];
|
||||
};
|
||||
#define IOPRIO_BE_NR (8)
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
enum {
|
||||
IOPRIO_WHO_PROCESS = 1,
|
||||
IOPRIO_WHO_PGRP,
|
||||
IOPRIO_WHO_USER,
|
||||
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
|
||||
};
|
||||
#define IOPRIO_NORM (4)
|
||||
#endif
|
||||
|
||||
0
kernel-headers/scsi/ufs/ufs.h
Normal file
0
kernel-headers/scsi/ufs/ufs.h
Normal file
@@ -1,46 +0,0 @@
|
||||
#ifndef _UAPI_LINUX_IOPRIO_H
|
||||
#define _UAPI_LINUX_IOPRIO_H
|
||||
|
||||
/*
|
||||
* Gives us 8 prio classes with 13-bits of data for each class
|
||||
*/
|
||||
#define IOPRIO_BITS (16)
|
||||
#define IOPRIO_CLASS_SHIFT (13)
|
||||
#define IOPRIO_PRIO_MASK ((1UL << IOPRIO_CLASS_SHIFT) - 1)
|
||||
|
||||
#define IOPRIO_PRIO_CLASS(mask) ((mask) >> IOPRIO_CLASS_SHIFT)
|
||||
#define IOPRIO_PRIO_DATA(mask) ((mask) & IOPRIO_PRIO_MASK)
|
||||
#define IOPRIO_PRIO_VALUE(class, data) (((class) << IOPRIO_CLASS_SHIFT) | data)
|
||||
|
||||
#define ioprio_valid(mask) (IOPRIO_PRIO_CLASS((mask)) != IOPRIO_CLASS_NONE)
|
||||
|
||||
/*
|
||||
* These are the io priority groups as implemented by CFQ. RT is the realtime
|
||||
* class, it always gets premium service. BE is the best-effort scheduling
|
||||
* class, the default for any process. IDLE is the idle scheduling class, it
|
||||
* is only served when no one else is using the disk.
|
||||
*/
|
||||
enum {
|
||||
IOPRIO_CLASS_NONE,
|
||||
IOPRIO_CLASS_RT,
|
||||
IOPRIO_CLASS_BE,
|
||||
IOPRIO_CLASS_IDLE,
|
||||
};
|
||||
|
||||
/*
|
||||
* 8 best effort priority levels are supported
|
||||
*/
|
||||
#define IOPRIO_BE_NR (8)
|
||||
|
||||
enum {
|
||||
IOPRIO_WHO_PROCESS = 1,
|
||||
IOPRIO_WHO_PGRP,
|
||||
IOPRIO_WHO_USER,
|
||||
};
|
||||
|
||||
/*
|
||||
* Fallback BE priority
|
||||
*/
|
||||
#define IOPRIO_NORM (4)
|
||||
|
||||
#endif /* _UAPI_LINUX_IOPRIO_H */
|
||||
@@ -330,6 +330,8 @@
|
||||
#define WCD9XXX_A_ANA_HPH (0x609)
|
||||
#define WCD9XXX_A_CDC_CLSH_CRC (0xC01)
|
||||
#define WCD9XXX_FLYBACK_EN (0x6A4)
|
||||
#define WCD9XXX_FLYBACK_VNEG_CTRL_1 (0x6A5)
|
||||
#define WCD9XXX_FLYBACK_VNEGDAC_CTRL_2 (0x6AF)
|
||||
#define WCD9XXX_RX_BIAS_FLYB_BUFF (0x6C7)
|
||||
#define WCD9XXX_HPH_L_EN (0x6D3)
|
||||
#define WCD9XXX_HPH_R_EN (0x6D6)
|
||||
@@ -341,4 +343,13 @@
|
||||
#define WCD9XXX_CDC_RX2_RX_PATH_CTL (0xB69)
|
||||
#define WCD9XXX_CDC_CLK_RST_CTRL_MCLK_CONTROL (0xD41)
|
||||
#define WCD9XXX_CLASSH_CTRL_CCL_1 (0x69C)
|
||||
|
||||
/* RX Gain control registers of codecs from and above WCD9335 */
|
||||
#define WCD9XXX_CDC_RX1_RX_VOL_CTL (0xB59)
|
||||
#define WCD9XXX_CDC_RX1_RX_VOL_MIX_CTL (0xB5C)
|
||||
#define WCD9XXX_CDC_RX1_RX_PATH_SEC1 (0xB5E)
|
||||
#define WCD9XXX_CDC_RX2_RX_VOL_CTL (0xB6D)
|
||||
#define WCD9XXX_CDC_RX2_RX_VOL_MIX_CTL (0xB70)
|
||||
#define WCD9XXX_CDC_RX2_RX_PATH_SEC1 (0xB72)
|
||||
|
||||
#endif
|
||||
|
||||
@@ -110,8 +110,6 @@ enum cp_mem_usage {
|
||||
*/
|
||||
#define ION_FLAG_POOL_FORCE_ALLOC (1 << 16)
|
||||
|
||||
#define ION_FLAG_POOL_PREFETCH (1 << 27)
|
||||
|
||||
/**
|
||||
* Deprecated! Please use the corresponding ION_FLAG_*
|
||||
*/
|
||||
@@ -176,7 +174,6 @@ struct ion_prefetch_regions {
|
||||
struct ion_prefetch_data {
|
||||
int heap_id;
|
||||
unsigned long len;
|
||||
/* Is unsigned long bad? 32bit compiler vs 64 bit compiler*/
|
||||
struct ion_prefetch_regions *regions;
|
||||
unsigned int nr_regions;
|
||||
};
|
||||
|
||||
@@ -93,6 +93,11 @@
|
||||
*/
|
||||
#define IPA_MBIM_MAX_STREAM_NUM 8
|
||||
|
||||
/**
|
||||
* size of the ipv6 address
|
||||
*/
|
||||
#define IPA_WAN_MSG_IPv6_ADDR_GW_LEN 4
|
||||
|
||||
/**
|
||||
* the attributes of the rule (routing or filtering)
|
||||
*/
|
||||
@@ -432,6 +437,9 @@ enum ipa_rm_resource_name {
|
||||
* @IPA_HW_v2_6: IPA hardware version 2.6
|
||||
* @IPA_HW_v2_6L: IPA hardware version 2.6L
|
||||
* @IPA_HW_v3_0: IPA hardware version 3.0
|
||||
* @IPA_HW_v3_1: IPA hardware version 3.1
|
||||
* @IPA_HW_v3_5: IPA hardware version 3.5
|
||||
* @IPA_HW_v3_5_1: IPA hardware version 3.5.1
|
||||
*/
|
||||
enum ipa_hw_type {
|
||||
IPA_HW_None = 0,
|
||||
@@ -444,6 +452,8 @@ enum ipa_hw_type {
|
||||
IPA_HW_v2_6L = 6,
|
||||
IPA_HW_v3_0 = 10,
|
||||
IPA_HW_v3_1 = 11,
|
||||
IPA_HW_v3_5 = 12,
|
||||
IPA_HW_v3_5_1 = 13,
|
||||
IPA_HW_MAX
|
||||
};
|
||||
|
||||
@@ -1428,12 +1438,15 @@ struct ipa_ecm_msg {
|
||||
* @name: name of the wan interface
|
||||
*
|
||||
* CnE need to pass the name of default wan iface when connected/disconnected.
|
||||
* CNE need to pass the gw info in wlan AP+STA mode.
|
||||
* netmgr need to pass the name of wan eMBMS iface when connected.
|
||||
*/
|
||||
struct ipa_wan_msg {
|
||||
char upstream_ifname[IPA_RESOURCE_NAME_MAX];
|
||||
char tethered_ifname[IPA_RESOURCE_NAME_MAX];
|
||||
enum ipa_ip_type ip;
|
||||
uint32_t ipv4_addr_gw;
|
||||
uint32_t ipv6_addr_gw[IPA_WAN_MSG_IPv6_ADDR_GW_LEN];
|
||||
};
|
||||
|
||||
/**
|
||||
|
||||
@@ -121,6 +121,11 @@
|
||||
#define KGSL_MEMFLAGS_GPUWRITEONLY 0x02000000U
|
||||
#define KGSL_MEMFLAGS_FORCE_32BIT 0x100000000ULL
|
||||
|
||||
/* Flag for binding all the virt range to single phys data */
|
||||
#define KGSL_SPARSE_BIND_MULTIPLE_TO_PHYS 0x400000000ULL
|
||||
#define KGSL_SPARSE_BIND 0x1ULL
|
||||
#define KGSL_SPARSE_UNBIND 0x2ULL
|
||||
|
||||
/* Memory caching hints */
|
||||
#define KGSL_CACHEMODE_MASK 0x0C000000U
|
||||
#define KGSL_CACHEMODE_SHIFT 26
|
||||
@@ -131,6 +136,8 @@
|
||||
#define KGSL_CACHEMODE_WRITEBACK 3
|
||||
|
||||
#define KGSL_MEMFLAGS_USE_CPU_MAP 0x10000000ULL
|
||||
#define KGSL_MEMFLAGS_SPARSE_PHYS 0x20000000ULL
|
||||
#define KGSL_MEMFLAGS_SPARSE_VIRT 0x40000000ULL
|
||||
|
||||
/* Memory types for which allocations are made */
|
||||
#define KGSL_MEMTYPE_MASK 0x0000FF00
|
||||
@@ -308,6 +315,7 @@ enum kgsl_timestamp_type {
|
||||
#define KGSL_PROP_GPMU_VERSION 0x16
|
||||
#define KGSL_PROP_HIGHEST_BANK_BIT 0x17
|
||||
#define KGSL_PROP_DEVICE_BITNESS 0x18
|
||||
#define KGSL_PROP_DEVICE_QDSS_STM 0x19
|
||||
|
||||
struct kgsl_shadowprop {
|
||||
unsigned long gpuaddr;
|
||||
@@ -315,6 +323,11 @@ struct kgsl_shadowprop {
|
||||
unsigned int flags; /* contains KGSL_FLAGS_ values */
|
||||
};
|
||||
|
||||
struct kgsl_qdss_stm_prop {
|
||||
uint64_t gpuaddr;
|
||||
uint64_t size;
|
||||
};
|
||||
|
||||
struct kgsl_version {
|
||||
unsigned int drv_major;
|
||||
unsigned int drv_minor;
|
||||
@@ -1451,4 +1464,96 @@ struct kgsl_gpuobj_set_info {
|
||||
#define IOCTL_KGSL_GPUOBJ_SET_INFO \
|
||||
_IOW(KGSL_IOC_TYPE, 0x4C, struct kgsl_gpuobj_set_info)
|
||||
|
||||
/**
|
||||
* struct kgsl_sparse_phys_alloc - Argument for IOCTL_KGSL_SPARSE_PHYS_ALLOC
|
||||
* @size: Size in bytes to back
|
||||
* @pagesize: Pagesize alignment required
|
||||
* @flags: Flags for this allocation
|
||||
* @id: Returned ID for this allocation
|
||||
*/
|
||||
struct kgsl_sparse_phys_alloc {
|
||||
uint64_t size;
|
||||
uint64_t pagesize;
|
||||
uint64_t flags;
|
||||
unsigned int id;
|
||||
};
|
||||
|
||||
#define IOCTL_KGSL_SPARSE_PHYS_ALLOC \
|
||||
_IOWR(KGSL_IOC_TYPE, 0x50, struct kgsl_sparse_phys_alloc)
|
||||
|
||||
/**
|
||||
* struct kgsl_sparse_phys_free - Argument for IOCTL_KGSL_SPARSE_PHYS_FREE
|
||||
* @id: ID to free
|
||||
*/
|
||||
struct kgsl_sparse_phys_free {
|
||||
unsigned int id;
|
||||
};
|
||||
|
||||
#define IOCTL_KGSL_SPARSE_PHYS_FREE \
|
||||
_IOW(KGSL_IOC_TYPE, 0x51, struct kgsl_sparse_phys_free)
|
||||
|
||||
/**
|
||||
* struct kgsl_sparse_virt_alloc - Argument for IOCTL_KGSL_SPARSE_VIRT_ALLOC
|
||||
* @size: Size in bytes to reserve
|
||||
* @pagesize: Pagesize alignment required
|
||||
* @flags: Flags for this allocation
|
||||
* @id: Returned ID for this allocation
|
||||
* @gpuaddr: Returned GPU address for this allocation
|
||||
*/
|
||||
struct kgsl_sparse_virt_alloc {
|
||||
uint64_t size;
|
||||
uint64_t pagesize;
|
||||
uint64_t flags;
|
||||
uint64_t gpuaddr;
|
||||
unsigned int id;
|
||||
};
|
||||
|
||||
#define IOCTL_KGSL_SPARSE_VIRT_ALLOC \
|
||||
_IOWR(KGSL_IOC_TYPE, 0x52, struct kgsl_sparse_virt_alloc)
|
||||
|
||||
/**
|
||||
* struct kgsl_sparse_virt_free - Argument for IOCTL_KGSL_SPARSE_VIRT_FREE
|
||||
* @id: ID to free
|
||||
*/
|
||||
struct kgsl_sparse_virt_free {
|
||||
unsigned int id;
|
||||
};
|
||||
|
||||
#define IOCTL_KGSL_SPARSE_VIRT_FREE \
|
||||
_IOW(KGSL_IOC_TYPE, 0x53, struct kgsl_sparse_virt_free)
|
||||
|
||||
/**
|
||||
* struct kgsl_sparse_binding_object - Argument for kgsl_sparse_bind
|
||||
* @virtoffset: Offset into the virtual ID
|
||||
* @physoffset: Offset into the physical ID (bind only)
|
||||
* @size: Size in bytes to reserve
|
||||
* @flags: Flags for this kgsl_sparse_binding_object
|
||||
* @id: Physical ID to bind (bind only)
|
||||
*/
|
||||
struct kgsl_sparse_binding_object {
|
||||
uint64_t virtoffset;
|
||||
uint64_t physoffset;
|
||||
uint64_t size;
|
||||
uint64_t flags;
|
||||
unsigned int id;
|
||||
};
|
||||
|
||||
/**
|
||||
* struct kgsl_sparse_bind - Argument for IOCTL_KGSL_SPARSE_BIND
|
||||
* @list: List of kgsl_sparse_bind_objects to bind/unbind
|
||||
* @id: Virtual ID to bind/unbind
|
||||
* @size: Size of kgsl_sparse_bind_object
|
||||
* @count: Number of elements in list
|
||||
*
|
||||
*/
|
||||
struct kgsl_sparse_bind {
|
||||
uint64_t list;
|
||||
unsigned int id;
|
||||
unsigned int size;
|
||||
unsigned int count;
|
||||
};
|
||||
|
||||
#define IOCTL_KGSL_SPARSE_BIND \
|
||||
_IOW(KGSL_IOC_TYPE, 0x54, struct kgsl_sparse_bind)
|
||||
|
||||
#endif /* _MSM_KGSL_H */
|
||||
|
||||
@@ -1172,6 +1172,11 @@ struct mdss_ad_cfg {
|
||||
uint32_t bl_ctrl_mode;
|
||||
};
|
||||
|
||||
struct mdss_ad_bl_cfg {
|
||||
uint32_t bl_min_delta;
|
||||
uint32_t bl_low_limit;
|
||||
};
|
||||
|
||||
/* ops uses standard MDP_PP_* flags */
|
||||
struct mdss_ad_init_cfg {
|
||||
uint32_t ops;
|
||||
@@ -1216,11 +1221,14 @@ enum {
|
||||
mdp_op_calib_dcm_state,
|
||||
mdp_op_max,
|
||||
mdp_op_pa_dither_cfg,
|
||||
mdp_op_ad_bl_cfg,
|
||||
mdp_op_pp_max = 255,
|
||||
};
|
||||
#define mdp_op_pa_dither_cfg mdp_op_pa_dither_cfg
|
||||
#define mdp_op_pp_max mdp_op_pp_max
|
||||
|
||||
#define mdp_op_ad_bl_cfg mdp_op_ad_bl_cfg
|
||||
|
||||
enum {
|
||||
WB_FORMAT_NV12,
|
||||
WB_FORMAT_RGB_565,
|
||||
@@ -1250,6 +1258,7 @@ struct msmfb_mdp_pp {
|
||||
struct mdss_ad_input ad_input;
|
||||
struct mdp_calib_config_buffer calib_buffer;
|
||||
struct mdp_calib_dcm_state calib_dcm;
|
||||
struct mdss_ad_bl_cfg ad_bl_cfg;
|
||||
} data;
|
||||
};
|
||||
|
||||
|
||||
@@ -138,6 +138,15 @@ VALIDATE/COMMIT FLAG CONFIGURATION
|
||||
*/
|
||||
#define MDP_COMMIT_SYNC_FENCE_WAIT 0x04
|
||||
|
||||
/* Flag to enable AVR(Adaptive variable refresh) feature. */
|
||||
#define MDP_COMMIT_AVR_EN 0x08
|
||||
|
||||
/*
|
||||
* Flag to select one shot mode when AVR feature is enabled.
|
||||
* Default mode is continuous mode.
|
||||
*/
|
||||
#define MDP_COMMIT_AVR_ONE_SHOT_MODE 0x10
|
||||
|
||||
/* Flag to enable concurrent writeback for the frame */
|
||||
#define MDP_COMMIT_CWB_EN 0x800
|
||||
|
||||
|
||||
@@ -812,6 +812,15 @@ enum v4l2_mpeg_vidc_extradata {
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI \
|
||||
V4L2_MPEG_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI
|
||||
V4L2_MPEG_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI = 27,
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_PQ_INFO \
|
||||
V4L2_MPEG_VIDC_EXTRADATA_PQ_INFO
|
||||
V4L2_MPEG_VIDC_EXTRADATA_PQ_INFO = 28,
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_VUI_DISPLAY \
|
||||
V4L2_MPEG_VIDC_EXTRADATA_VUI_DISPLAY
|
||||
V4L2_MPEG_VIDC_EXTRADATA_VUI_DISPLAY = 29,
|
||||
#define V4L2_MPEG_VIDC_EXTRADATA_VPX_COLORSPACE \
|
||||
V4L2_MPEG_VIDC_EXTRADATA_VPX_COLORSPACE
|
||||
V4L2_MPEG_VIDC_EXTRADATA_VPX_COLORSPACE = 30,
|
||||
};
|
||||
|
||||
#define V4L2_CID_MPEG_VIDC_SET_PERF_LEVEL (V4L2_CID_MPEG_MSM_VIDC_BASE + 26)
|
||||
@@ -1166,6 +1175,30 @@ enum v4l2_mpeg_vidc_video_lowlatency_mode {
|
||||
#define V4L2_CID_MPEG_VIDEO_MAX_QP_PACKED \
|
||||
(V4L2_CID_MPEG_MSM_VIDC_BASE + 92)
|
||||
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_H264_TRANSFORM_8x8 \
|
||||
(V4L2_CID_MPEG_MSM_VIDC_BASE + 93)
|
||||
enum v4l2_mpeg_vidc_video_h264_transform_8x8 {
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_TRANSFORM_8x8_DISABLE = 0,
|
||||
V4L2_MPEG_VIDC_VIDEO_H264_TRANSFORM_8x8_ENABLE = 1,
|
||||
};
|
||||
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_COLOR_SPACE \
|
||||
(V4L2_CID_MPEG_MSM_VIDC_BASE + 94)
|
||||
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_FULL_RANGE \
|
||||
(V4L2_CID_MPEG_MSM_VIDC_BASE + 95)
|
||||
|
||||
enum v4l2_cid_mpeg_vidc_video_full_range {
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_FULL_RANGE_DISABLE = 0,
|
||||
V4L2_CID_MPEG_VIDC_VIDEO_FULL_RANGE_ENABLE = 1,
|
||||
};
|
||||
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_TRANSFER_CHARS \
|
||||
(V4L2_CID_MPEG_MSM_VIDC_BASE + 96)
|
||||
|
||||
#define V4L2_CID_MPEG_VIDC_VIDEO_MATRIX_COEFFS \
|
||||
(V4L2_CID_MPEG_MSM_VIDC_BASE + 97)
|
||||
|
||||
/* Camera class control IDs */
|
||||
|
||||
#define V4L2_CID_CAMERA_CLASS_BASE (V4L2_CTRL_CLASS_CAMERA | 0x900)
|
||||
|
||||
@@ -639,6 +639,79 @@ struct v4l2_pix_format {
|
||||
#define V4L2_PIX_FMT_SE401 v4l2_fourcc('S', '4', '0', '1') /* se401 janggu compressed rgb */
|
||||
#define V4L2_PIX_FMT_S5C_UYVY_JPG v4l2_fourcc('S', '5', 'C', 'I') /* S5C73M3 interleaved UYVY/JPEG */
|
||||
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_8888 \
|
||||
v4l2_fourcc('R', 'A', '2', '4') /* 32-bit ABGR 8:8:8:8 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_8888 \
|
||||
v4l2_fourcc('A', 'B', '2', '4') /* 32-bit RGBA 8:8:8:8 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_8888 \
|
||||
v4l2_fourcc('X', 'B', '2', '4') /* 32-bit RGBX 8:8:8:8 */
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_8888 \
|
||||
v4l2_fourcc('R', 'X', '2', '4') /* 32-bit XBGR 8:8:8:8 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_5551 \
|
||||
v4l2_fourcc('R', 'A', '1', '5') /* 16-bit RGBA 5:5:5:1 */
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_1555 \
|
||||
v4l2_fourcc('A', 'B', '1', '5') /* 16-bit ABGR 1:5:5:5 */
|
||||
#define V4L2_PIX_FMT_SDE_BGRA_5551 \
|
||||
v4l2_fourcc('B', 'A', '1', '5') /* 16-bit BGRA 5:5:5:1 */
|
||||
#define V4L2_PIX_FMT_SDE_BGRX_5551 \
|
||||
v4l2_fourcc('B', 'X', '1', '5') /* 16-bit BGRX 5:5:5:1 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_5551 \
|
||||
v4l2_fourcc('R', 'X', '1', '5') /* 16-bit RGBX 5:5:5:1 */
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_1555 \
|
||||
v4l2_fourcc('X', 'B', '1', '5') /* 16-bit XBGR 1:5:5:5 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_4444 \
|
||||
v4l2_fourcc('R', 'A', '1', '2') /* 16-bit RGBA 4:4:4:4 */
|
||||
#define V4L2_PIX_FMT_SDE_BGRA_4444 \
|
||||
v4l2_fourcc('b', 'A', '1', '2') /* 16-bit BGRA 4:4:4:4 */
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_4444 \
|
||||
v4l2_fourcc('A', 'B', '1', '2') /* 16-bit ABGR 4:4:4:4 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_4444 \
|
||||
v4l2_fourcc('R', 'X', '1', '2') /* 16-bit RGBX 4:4:4:4 */
|
||||
#define V4L2_PIX_FMT_SDE_BGRX_4444 \
|
||||
v4l2_fourcc('B', 'X', '1', '2') /* 16-bit BGRX 4:4:4:4 */
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_4444 \
|
||||
v4l2_fourcc('X', 'B', '1', '2') /* 16-bit XBGR 4:4:4:4 */
|
||||
#define V4L2_PIX_FMT_SDE_BGR_565 \
|
||||
v4l2_fourcc('B', 'G', '1', '6') /* 16-bit BGR 5:6:5 */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CR_CB_GH2V2 \
|
||||
v4l2_fourcc('Y', 'U', '4', '2') /* Planar YVU 4:2:0 A16 */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H1V2 \
|
||||
v4l2_fourcc('N', 'H', '1', '6') /* Y/CbCr 4:2:2 */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CRCB_H1V2 \
|
||||
v4l2_fourcc('N', 'H', '6', '1') /* Y/CrCb 4:2:2 */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_VENUS \
|
||||
v4l2_fourcc('Q', 'N', 'V', '2') /* Y/CbCr 4:2:0 Venus */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CRCB_H2V2_VENUS \
|
||||
v4l2_fourcc('Q', 'N', 'V', '1') /* Y/CrCb 4:2:0 Venus */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_8888_UBWC \
|
||||
v4l2_fourcc('Q', 'X', 'B', '4') /* RGBX 8:8:8:8 UBWC */
|
||||
#define V4L2_PIX_FMT_SDE_RGB_565_UBWC \
|
||||
v4l2_fourcc('Q', 'R', 'G', '6') /* RGB 5:6:5 UBWC */
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_1010102 \
|
||||
v4l2_fourcc('A', 'B', '3', '0') /* RGBA 10:10:10:2 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_1010102 \
|
||||
v4l2_fourcc('X', 'B', '3', '0') /* RGBX 10:10:10:2 */
|
||||
#define V4L2_PIX_FMT_SDE_ARGB_2101010 \
|
||||
v4l2_fourcc('A', 'R', '3', '0') /* ARGB 2:10:10:10 */
|
||||
#define V4L2_PIX_FMT_SDE_XRGB_2101010 \
|
||||
v4l2_fourcc('X', 'R', '3', '0') /* XRGB 2:10:10:10 */
|
||||
#define V4L2_PIX_FMT_SDE_BGRA_1010102 \
|
||||
v4l2_fourcc('B', 'A', '3', '0') /* BGRA 10:10:10:2 */
|
||||
#define V4L2_PIX_FMT_SDE_BGRX_1010102 \
|
||||
v4l2_fourcc('B', 'X', '3', '0') /* BGRX 10:10:10:2 */
|
||||
#define V4L2_PIX_FMT_SDE_ABGR_2101010 \
|
||||
v4l2_fourcc('R', 'A', '3', '0') /* ABGR 2:10:10:10 */
|
||||
#define V4L2_PIX_FMT_SDE_XBGR_2101010 \
|
||||
v4l2_fourcc('R', 'X', '3', '0') /* XBGR 2:10:10:10 */
|
||||
#define V4L2_PIX_FMT_SDE_RGBA_1010102_UBWC \
|
||||
v4l2_fourcc('Q', 'R', 'B', 'A') /* RGBA 10:10:10:2 UBWC */
|
||||
#define V4L2_PIX_FMT_SDE_RGBX_1010102_UBWC \
|
||||
v4l2_fourcc('Q', 'X', 'B', 'A') /* RGBX 10:10:10:2 UBWC */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_TP10 \
|
||||
v4l2_fourcc('T', 'P', '1', '0') /* Y/CbCr 4:2:0 TP10 */
|
||||
#define V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010 \
|
||||
v4l2_fourcc('P', '0', '1', '0') /* Y/CbCr 4:2:0 P10 */
|
||||
|
||||
/* SDR formats - used only for Software Defined Radio devices */
|
||||
#define V4L2_SDR_FMT_CU8 v4l2_fourcc('C', 'U', '0', '8') /* IQ u8 */
|
||||
#define V4L2_SDR_FMT_CU16LE v4l2_fourcc('C', 'U', '1', '6') /* IQ u16le */
|
||||
|
||||
@@ -35,6 +35,7 @@
|
||||
#define MAX_REGULATOR 5
|
||||
|
||||
#define MSM_V4L2_PIX_FMT_META v4l2_fourcc('M', 'E', 'T', 'A') /* META */
|
||||
#define MSM_V4L2_PIX_FMT_META10 v4l2_fourcc('M', 'E', '1', '0') /* META10 */
|
||||
#define MSM_V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4')
|
||||
/* 14 BGBG.. GRGR.. */
|
||||
#define MSM_V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4')
|
||||
|
||||
@@ -8,59 +8,60 @@
|
||||
/* SDE Rotator pixel format definitions */
|
||||
#define SDE_PIX_FMT_XRGB_8888 V4L2_PIX_FMT_XBGR32
|
||||
#define SDE_PIX_FMT_ARGB_8888 V4L2_PIX_FMT_ABGR32
|
||||
#define SDE_PIX_FMT_ABGR_8888 v4l2_fourcc('R', 'A', '2', '4')
|
||||
#define SDE_PIX_FMT_RGBA_8888 v4l2_fourcc('A', 'B', '2', '4')
|
||||
#define SDE_PIX_FMT_ABGR_8888 V4L2_PIX_FMT_SDE_ABGR_8888
|
||||
#define SDE_PIX_FMT_RGBA_8888 V4L2_PIX_FMT_SDE_RGBA_8888
|
||||
#define SDE_PIX_FMT_BGRA_8888 V4L2_PIX_FMT_ARGB32
|
||||
#define SDE_PIX_FMT_RGBX_8888 v4l2_fourcc('X', 'B', '2', '4')
|
||||
#define SDE_PIX_FMT_RGBX_8888 V4L2_PIX_FMT_SDE_RGBX_8888
|
||||
#define SDE_PIX_FMT_BGRX_8888 V4L2_PIX_FMT_XRGB32
|
||||
#define SDE_PIX_FMT_XBGR_8888 v4l2_fourcc('R', 'X', '2', '4')
|
||||
#define SDE_PIX_FMT_RGBA_5551 v4l2_fourcc('R', 'A', '1', '5')
|
||||
#define SDE_PIX_FMT_XBGR_8888 V4L2_PIX_FMT_SDE_XBGR_8888
|
||||
#define SDE_PIX_FMT_RGBA_5551 V4L2_PIX_FMT_SDE_RGBA_5551
|
||||
#define SDE_PIX_FMT_ARGB_1555 V4L2_PIX_FMT_ARGB555
|
||||
#define SDE_PIX_FMT_ABGR_1555 v4l2_fourcc('A', 'B', '1', '5')
|
||||
#define SDE_PIX_FMT_BGRA_5551 v4l2_fourcc('B', 'A', '1', '5')
|
||||
#define SDE_PIX_FMT_BGRX_5551 v4l2_fourcc('B', 'X', '1', '5')
|
||||
#define SDE_PIX_FMT_RGBX_5551 v4l2_fourcc('R', 'X', '1', '5')
|
||||
#define SDE_PIX_FMT_XBGR_1555 v4l2_fourcc('X', 'B', '1', '5')
|
||||
#define SDE_PIX_FMT_ABGR_1555 V4L2_PIX_FMT_SDE_ABGR_1555
|
||||
#define SDE_PIX_FMT_BGRA_5551 V4L2_PIX_FMT_SDE_BGRA_5551
|
||||
#define SDE_PIX_FMT_BGRX_5551 V4L2_PIX_FMT_SDE_BGRX_5551
|
||||
#define SDE_PIX_FMT_RGBX_5551 V4L2_PIX_FMT_SDE_RGBX_5551
|
||||
#define SDE_PIX_FMT_XBGR_1555 V4L2_PIX_FMT_SDE_XBGR_1555
|
||||
#define SDE_PIX_FMT_XRGB_1555 V4L2_PIX_FMT_XRGB555
|
||||
#define SDE_PIX_FMT_ARGB_4444 V4L2_PIX_FMT_ARGB444
|
||||
#define SDE_PIX_FMT_RGBA_4444 v4l2_fourcc('R', 'A', '1', '2')
|
||||
#define SDE_PIX_FMT_BGRA_4444 v4l2_fourcc('B', 'A', '1', '2')
|
||||
#define SDE_PIX_FMT_ABGR_4444 v4l2_fourcc('A', 'B', '1', '2')
|
||||
#define SDE_PIX_FMT_RGBX_4444 v4l2_fourcc('R', 'X', '1', '2')
|
||||
#define SDE_PIX_FMT_RGBA_4444 V4L2_PIX_FMT_SDE_RGBA_4444
|
||||
#define SDE_PIX_FMT_BGRA_4444 V4L2_PIX_FMT_SDE_BGRA_4444
|
||||
#define SDE_PIX_FMT_ABGR_4444 V4L2_PIX_FMT_SDE_ABGR_4444
|
||||
#define SDE_PIX_FMT_RGBX_4444 V4L2_PIX_FMT_SDE_RGBX_4444
|
||||
#define SDE_PIX_FMT_XRGB_4444 V4L2_PIX_FMT_XRGB444
|
||||
#define SDE_PIX_FMT_BGRX_4444 v4l2_fourcc('B', 'X', '1', '2')
|
||||
#define SDE_PIX_FMT_XBGR_4444 v4l2_fourcc('X', 'B', '1', '2')
|
||||
#define SDE_PIX_FMT_BGRX_4444 V4L2_PIX_FMT_SDE_BGRX_4444
|
||||
#define SDE_PIX_FMT_XBGR_4444 V4L2_PIX_FMT_SDE_XBGR_4444
|
||||
#define SDE_PIX_FMT_RGB_888 V4L2_PIX_FMT_RGB24
|
||||
#define SDE_PIX_FMT_BGR_888 V4L2_PIX_FMT_BGR24
|
||||
#define SDE_PIX_FMT_RGB_565 V4L2_PIX_FMT_RGB565
|
||||
#define SDE_PIX_FMT_BGR_565 v4l2_fourcc('B', 'G', '1', '6')
|
||||
#define SDE_PIX_FMT_BGR_565 V4L2_PIX_FMT_SDE_BGR_565
|
||||
#define SDE_PIX_FMT_Y_CB_CR_H2V2 V4L2_PIX_FMT_YUV420
|
||||
#define SDE_PIX_FMT_Y_CR_CB_H2V2 V4L2_PIX_FMT_YVU420
|
||||
#define SDE_PIX_FMT_Y_CR_CB_GH2V2 v4l2_fourcc('Y', 'U', '4', '2')
|
||||
#define SDE_PIX_FMT_Y_CR_CB_GH2V2 V4L2_PIX_FMT_SDE_Y_CR_CB_GH2V2
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2 V4L2_PIX_FMT_NV12
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V2 V4L2_PIX_FMT_NV21
|
||||
#define SDE_PIX_FMT_Y_CBCR_H1V2 v4l2_fourcc('N', 'H', '1', '6')
|
||||
#define SDE_PIX_FMT_Y_CRCB_H1V2 v4l2_fourcc('N', 'H', '6', '1')
|
||||
#define SDE_PIX_FMT_Y_CBCR_H1V2 V4L2_PIX_FMT_SDE_Y_CBCR_H1V2
|
||||
#define SDE_PIX_FMT_Y_CRCB_H1V2 V4L2_PIX_FMT_SDE_Y_CRCB_H1V2
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V1 V4L2_PIX_FMT_NV16
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V1 V4L2_PIX_FMT_NV61
|
||||
#define SDE_PIX_FMT_YCBYCR_H2V1 V4L2_PIX_FMT_YUYV
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '2')
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V2_VENUS v4l2_fourcc('Q', 'N', 'V', '1')
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_VENUS V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_VENUS
|
||||
#define SDE_PIX_FMT_Y_CRCB_H2V2_VENUS V4L2_PIX_FMT_SDE_Y_CRCB_H2V2_VENUS
|
||||
#define SDE_PIX_FMT_RGBA_8888_UBWC V4L2_PIX_FMT_RGBA8888_UBWC
|
||||
#define SDE_PIX_FMT_RGBX_8888_UBWC v4l2_fourcc('Q', 'X', 'B', '4')
|
||||
#define SDE_PIX_FMT_RGB_565_UBWC v4l2_fourcc('Q', 'R', 'G', '6')
|
||||
#define SDE_PIX_FMT_RGBX_8888_UBWC V4L2_PIX_FMT_SDE_RGBX_8888_UBWC
|
||||
#define SDE_PIX_FMT_RGB_565_UBWC V4L2_PIX_FMT_SDE_RGB_565_UBWC
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_UBWC V4L2_PIX_FMT_NV12_UBWC
|
||||
#define SDE_PIX_FMT_RGBA_1010102 v4l2_fourcc('A', 'B', '3', '0')
|
||||
#define SDE_PIX_FMT_RGBX_1010102 v4l2_fourcc('X', 'B', '3', '0')
|
||||
#define SDE_PIX_FMT_ARGB_2101010 v4l2_fourcc('A', 'R', '3', '0')
|
||||
#define SDE_PIX_FMT_XRGB_2101010 v4l2_fourcc('X', 'R', '3', '0')
|
||||
#define SDE_PIX_FMT_BGRA_1010102 v4l2_fourcc('B', 'A', '3', '0')
|
||||
#define SDE_PIX_FMT_BGRX_1010102 v4l2_fourcc('B', 'X', '3', '0')
|
||||
#define SDE_PIX_FMT_ABGR_2101010 v4l2_fourcc('R', 'A', '3', '0')
|
||||
#define SDE_PIX_FMT_XBGR_2101010 v4l2_fourcc('R', 'X', '3', '0')
|
||||
#define SDE_PIX_FMT_RGBA_1010102_UBWC v4l2_fourcc('Q', 'R', 'B', 'A')
|
||||
#define SDE_PIX_FMT_RGBX_1010102_UBWC v4l2_fourcc('Q', 'X', 'B', 'A')
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_P010 v4l2_fourcc('P', '0', '1', '0')
|
||||
#define SDE_PIX_FMT_RGBA_1010102 V4L2_PIX_FMT_SDE_RGBA_1010102
|
||||
#define SDE_PIX_FMT_RGBX_1010102 V4L2_PIX_FMT_SDE_RGBX_1010102
|
||||
#define SDE_PIX_FMT_ARGB_2101010 V4L2_PIX_FMT_SDE_ARGB_2101010
|
||||
#define SDE_PIX_FMT_XRGB_2101010 V4L2_PIX_FMT_SDE_XRGB_2101010
|
||||
#define SDE_PIX_FMT_BGRA_1010102 V4L2_PIX_FMT_SDE_BGRA_1010102
|
||||
#define SDE_PIX_FMT_BGRX_1010102 V4L2_PIX_FMT_SDE_BGRX_1010102
|
||||
#define SDE_PIX_FMT_ABGR_2101010 V4L2_PIX_FMT_SDE_ABGR_2101010
|
||||
#define SDE_PIX_FMT_XBGR_2101010 V4L2_PIX_FMT_SDE_XBGR_2101010
|
||||
#define SDE_PIX_FMT_RGBA_1010102_UBWC V4L2_PIX_FMT_SDE_RGBA_1010102_UBWC
|
||||
#define SDE_PIX_FMT_RGBX_1010102_UBWC V4L2_PIX_FMT_SDE_RGBX_1010102_UBWC
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_P010 V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_P010
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_TP10 V4L2_PIX_FMT_SDE_Y_CBCR_H2V2_TP10
|
||||
#define SDE_PIX_FMT_Y_CBCR_H2V2_TP10_UBWC V4L2_PIX_FMT_NV12_TP10_UBWC
|
||||
|
||||
/**
|
||||
|
||||
@@ -55,6 +55,18 @@ struct msm_vidc_mpeg2_seqdisp_payload {
|
||||
unsigned int disp_height;
|
||||
};
|
||||
|
||||
struct msm_vidc_vc1_seqdisp_payload {
|
||||
unsigned int prog_seg_format;
|
||||
unsigned int uv_sampl_fmt;
|
||||
unsigned int color_format;
|
||||
unsigned int color_primaries;
|
||||
unsigned int transfer_char;
|
||||
unsigned int matrix_coeffs;
|
||||
unsigned int aspect_ratio;
|
||||
unsigned int aspect_horiz;
|
||||
unsigned int aspect_vert;
|
||||
};
|
||||
|
||||
struct msm_vidc_input_crop_payload {
|
||||
unsigned int size;
|
||||
unsigned int version;
|
||||
@@ -154,6 +166,13 @@ struct msm_vidc_yuv_stats_payload {
|
||||
unsigned int frame_difference;
|
||||
};
|
||||
|
||||
struct msm_vidc_vpx_colorspace_payload {
|
||||
unsigned int color_space;
|
||||
unsigned int yuv_range_flag;
|
||||
unsigned int sumsampling_x;
|
||||
unsigned int sumsampling_y;
|
||||
};
|
||||
|
||||
struct msm_vidc_roi_qp_payload {
|
||||
int upper_qp_offset;
|
||||
int lower_qp_offset;
|
||||
@@ -176,6 +195,23 @@ struct msm_vidc_content_light_level_sei_payload {
|
||||
unsigned int nMaxPicAverageLight;
|
||||
};
|
||||
|
||||
struct msm_vidc_vui_display_info_payload {
|
||||
unsigned int video_signal_present_flag;
|
||||
unsigned int video_format;
|
||||
unsigned int bit_depth_y;
|
||||
unsigned int bit_depth_c;
|
||||
unsigned int video_full_range_flag;
|
||||
unsigned int color_description_present_flag;
|
||||
unsigned int color_primaries;
|
||||
unsigned int transfer_characteristics;
|
||||
unsigned int matrix_coefficients;
|
||||
unsigned int chroma_location_info_present_flag;
|
||||
unsigned int chroma_format_idc;
|
||||
unsigned int separate_color_plane_flag;
|
||||
unsigned int chroma_sample_loc_type_top_field;
|
||||
unsigned int chroma_sample_loc_type_bottom_field;
|
||||
};
|
||||
|
||||
enum msm_vidc_extradata_type {
|
||||
MSM_VIDC_EXTRADATA_NONE = 0x00000000,
|
||||
MSM_VIDC_EXTRADATA_MB_QUANTIZATION = 0x00000001,
|
||||
@@ -199,11 +235,17 @@ enum msm_vidc_extradata_type {
|
||||
#define MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI \
|
||||
MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI
|
||||
MSM_VIDC_EXTRADATA_CONTENT_LIGHT_LEVEL_SEI = 0x00000016,
|
||||
#define MSM_VIDC_EXTRADATA_PQ_INFO \
|
||||
MSM_VIDC_EXTRADATA_PQ_INFO
|
||||
MSM_VIDC_EXTRADATA_PQ_INFO = 0x00000017,
|
||||
MSM_VIDC_EXTRADATA_INPUT_CROP = 0x0700000E,
|
||||
#define MSM_VIDC_EXTRADATA_OUTPUT_CROP \
|
||||
MSM_VIDC_EXTRADATA_OUTPUT_CROP
|
||||
MSM_VIDC_EXTRADATA_OUTPUT_CROP = 0x0700000F,
|
||||
MSM_VIDC_EXTRADATA_DIGITAL_ZOOM = 0x07000010,
|
||||
#define MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO \
|
||||
MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO
|
||||
MSM_VIDC_EXTRADATA_VPX_COLORSPACE_INFO = 0x070000011,
|
||||
MSM_VIDC_EXTRADATA_MULTISLICE_INFO = 0x7F100000,
|
||||
MSM_VIDC_EXTRADATA_NUM_CONCEALED_MB = 0x7F100001,
|
||||
MSM_VIDC_EXTRADATA_INDEX = 0x7F100002,
|
||||
@@ -211,6 +253,9 @@ enum msm_vidc_extradata_type {
|
||||
MSM_VIDC_EXTRADATA_METADATA_LTR = 0x7F100004,
|
||||
MSM_VIDC_EXTRADATA_METADATA_FILLER = 0x7FE00002,
|
||||
MSM_VIDC_EXTRADATA_METADATA_MBI = 0x7F100005,
|
||||
#define MSM_VIDC_EXTRADATA_VUI_DISPLAY_INFO \
|
||||
MSM_VIDC_EXTRADATA_VUI_DISPLAY_INFO
|
||||
MSM_VIDC_EXTRADATA_VUI_DISPLAY_INFO = 0x7F100006,
|
||||
MSM_VIDC_EXTRADATA_YUVSTATS_INFO = 0x7F100007,
|
||||
};
|
||||
enum msm_vidc_interlace_type {
|
||||
@@ -240,12 +285,90 @@ enum msm_vidc_userdata_type {
|
||||
MSM_VIDC_USERDATA_TYPE_BOTTOM_FIELD = 0x3,
|
||||
};
|
||||
|
||||
/* See colour_primaries of ISO/IEC 14496 for significance */
|
||||
enum msm_vidc_h264_color_primaries_values {
|
||||
MSM_VIDC_RESERVED_1 = 0,
|
||||
MSM_VIDC_BT709_5 = 1,
|
||||
MSM_VIDC_UNSPECIFIED = 2,
|
||||
MSM_VIDC_RESERVED_2 = 3,
|
||||
MSM_VIDC_BT470_6_M = 4,
|
||||
MSM_VIDC_BT601_6_625 = 5,
|
||||
MSM_VIDC_BT470_6_BG = MSM_VIDC_BT601_6_625,
|
||||
MSM_VIDC_BT601_6_525 = 6,
|
||||
MSM_VIDC_SMPTE_240M = 7,
|
||||
MSM_VIDC_GENERIC_FILM = 8,
|
||||
MSM_VIDC_BT2020 = 9,
|
||||
};
|
||||
|
||||
enum msm_vidc_vp9_color_primaries_values {
|
||||
MSM_VIDC_CS_UNKNOWN,
|
||||
MSM_VIDC_CS_BT_601,
|
||||
MSM_VIDC_CS_BT_709,
|
||||
MSM_VIDC_CS_SMPTE_170,
|
||||
MSM_VIDC_CS_SMPTE_240,
|
||||
MSM_VIDC_CS_BT_2020,
|
||||
MSM_VIDC_CS_RESERVED,
|
||||
MSM_VIDC_CS_RGB,
|
||||
};
|
||||
|
||||
enum msm_vidc_h264_matrix_coeff_values {
|
||||
MSM_VIDC_MATRIX_RGB = 0,
|
||||
MSM_VIDC_MATRIX_BT_709_5 = 1,
|
||||
MSM_VIDC_MATRIX_UNSPECIFIED = 2,
|
||||
MSM_VIDC_MATRIX_RESERVED = 3,
|
||||
MSM_VIDC_MATRIX_FCC_47 = 4,
|
||||
MSM_VIDC_MATRIX_601_6_625 = 5,
|
||||
MSM_VIDC_MATRIX_BT470_BG = MSM_VIDC_MATRIX_601_6_625,
|
||||
MSM_VIDC_MATRIX_601_6_525 = 6,
|
||||
MSM_VIDC_MATRIX_SMPTE_170M = MSM_VIDC_MATRIX_601_6_525,
|
||||
MSM_VIDC_MATRIX_SMPTE_240M = 7,
|
||||
MSM_VIDC_MATRIX_Y_CG_CO = 8,
|
||||
MSM_VIDC_MATRIX_BT_2020 = 9,
|
||||
MSM_VIDC_MATRIX_BT_2020_CONST = 10,
|
||||
};
|
||||
|
||||
enum msm_vidc_h264_transfer_chars_values {
|
||||
MSM_VIDC_TRANSFER_RESERVED_1 = 0,
|
||||
MSM_VIDC_TRANSFER_BT709_5 = 1,
|
||||
MSM_VIDC_TRANSFER_UNSPECIFIED = 2,
|
||||
MSM_VIDC_TRANSFER_RESERVED_2 = 3,
|
||||
MSM_VIDC_TRANSFER_BT_470_6_M = 4,
|
||||
MSM_VIDC_TRANSFER_BT_470_6_BG = 5,
|
||||
MSM_VIDC_TRANSFER_601_6_625 = 6,
|
||||
MSM_VIDC_TRANSFER_601_6_525 = MSM_VIDC_TRANSFER_601_6_625,
|
||||
MSM_VIDC_TRANSFER_SMPTE_240M = 7,
|
||||
MSM_VIDC_TRANSFER_LINEAR = 8,
|
||||
MSM_VIDC_TRANSFER_LOG_100_1 = 9,
|
||||
MSM_VIDC_TRANSFER_LOG_100_SQRT10_1 = 10,
|
||||
MSM_VIDC_TRANSFER_IEC_61966 = 11,
|
||||
MSM_VIDC_TRANSFER_BT_1361 = 12,
|
||||
MSM_VIDC_TRANSFER_SRGB = 13,
|
||||
MSM_VIDC_TRANSFER_BT_2020_10 = 14,
|
||||
MSM_VIDC_TRANSFER_BT_2020_12 = 15,
|
||||
};
|
||||
|
||||
enum msm_vidc_pixel_depth {
|
||||
MSM_VIDC_BIT_DEPTH_8,
|
||||
MSM_VIDC_BIT_DEPTH_10,
|
||||
MSM_VIDC_BIT_DEPTH_UNSUPPORTED = 0XFFFFFFFF,
|
||||
};
|
||||
|
||||
enum msm_vidc_video_format {
|
||||
MSM_VIDC_COMPONENT,
|
||||
MSM_VIDC_PAL,
|
||||
MSM_VIDC_NTSC,
|
||||
MSM_VIDC_SECAM,
|
||||
MSM_VIDC_MAC,
|
||||
MSM_VIDC_UNSPECIFIED_FORMAT,
|
||||
MSM_VIDC_RESERVED_1_FORMAT,
|
||||
MSM_VIDC_RESERVED_2_FORMAT,
|
||||
};
|
||||
|
||||
enum msm_vidc_color_desc_flag {
|
||||
MSM_VIDC_COLOR_DESC_NOT_PRESENT,
|
||||
MSM_VIDC_COLOR_DESC_PRESENT,
|
||||
};
|
||||
|
||||
/*enum msm_vidc_pic_struct */
|
||||
#define MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED 0x0
|
||||
#define MSM_VIDC_PIC_STRUCT_PROGRESSIVE 0x1
|
||||
|
||||
@@ -6,6 +6,7 @@
|
||||
#define MAX_PLANES_PER_STREAM 3
|
||||
#define MAX_NUM_STREAM 7
|
||||
|
||||
#define ISP_VERSION_48 48
|
||||
#define ISP_VERSION_47 47
|
||||
#define ISP_VERSION_46 46
|
||||
#define ISP_VERSION_44 44
|
||||
@@ -801,6 +802,7 @@ struct msm_isp_ahb_clk_cfg {
|
||||
#define V4L2_PIX_FMT_NV14 v4l2_fourcc('N', 'V', '1', '4')
|
||||
#define V4L2_PIX_FMT_NV41 v4l2_fourcc('N', 'V', '4', '1')
|
||||
#define V4L2_PIX_FMT_META v4l2_fourcc('Q', 'M', 'E', 'T')
|
||||
#define V4L2_PIX_FMT_META10 v4l2_fourcc('Q', 'M', '1', '0')
|
||||
#define V4L2_PIX_FMT_SBGGR14 v4l2_fourcc('B', 'G', '1', '4') /* 14 BGBG.GRGR.*/
|
||||
#define V4L2_PIX_FMT_SGBRG14 v4l2_fourcc('G', 'B', '1', '4') /* 14 GBGB.RGRG.*/
|
||||
#define V4L2_PIX_FMT_SGRBG14 v4l2_fourcc('B', 'A', '1', '4') /* 14 GRGR.BGBG.*/
|
||||
|
||||
57
original-kernel-headers/scsi/ufs/ioctl.h
Normal file
57
original-kernel-headers/scsi/ufs/ioctl.h
Normal file
@@ -0,0 +1,57 @@
|
||||
#ifndef UAPI_UFS_IOCTL_H_
|
||||
#define UAPI_UFS_IOCTL_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/*
|
||||
* IOCTL opcode for ufs queries has the following opcode after
|
||||
* SCSI_IOCTL_GET_PCI
|
||||
*/
|
||||
#define UFS_IOCTL_QUERY 0x5388
|
||||
|
||||
/**
|
||||
* struct ufs_ioctl_query_data - used to transfer data to and from user via ioctl
|
||||
* @opcode: type of data to query (descriptor/attribute/flag)
|
||||
* @idn: id of the data structure
|
||||
* @buf_size: number of allocated bytes/data size on return
|
||||
* @buffer: data location
|
||||
*
|
||||
* Received: buffer and buf_size (available space for transfered data)
|
||||
* Submitted: opcode, idn, length, buf_size
|
||||
*/
|
||||
struct ufs_ioctl_query_data {
|
||||
/*
|
||||
* User should select one of the opcode defined in "enum query_opcode".
|
||||
* Please check include/uapi/scsi/ufs/ufs.h for the definition of it.
|
||||
* Note that only UPIU_QUERY_OPCODE_READ_DESC,
|
||||
* UPIU_QUERY_OPCODE_READ_ATTR & UPIU_QUERY_OPCODE_READ_FLAG are
|
||||
* supported as of now. All other query_opcode would be considered
|
||||
* invalid.
|
||||
* As of now only read query operations are supported.
|
||||
*/
|
||||
__u32 opcode;
|
||||
/*
|
||||
* User should select one of the idn from "enum flag_idn" or "enum
|
||||
* attr_idn" or "enum desc_idn" based on whether opcode above is
|
||||
* attribute, flag or descriptor.
|
||||
* Please check include/uapi/scsi/ufs/ufs.h for the definition of it.
|
||||
*/
|
||||
__u8 idn;
|
||||
/*
|
||||
* User should specify the size of the buffer (buffer[0] below) where
|
||||
* it wants to read the query data (attribute/flag/descriptor).
|
||||
* As we might end up reading less data then what is specified in
|
||||
* buf_size. So we are updating buf_size to what exactly we have read.
|
||||
*/
|
||||
__u16 buf_size;
|
||||
/*
|
||||
* placeholder for the start of the data buffer where kernel will copy
|
||||
* the query data (attribute/flag/descriptor) read from the UFS device
|
||||
* Note:
|
||||
* For Read/Write Attribute you will have to allocate 4 bytes
|
||||
* For Read/Write Flag you will have to allocate 1 byte
|
||||
*/
|
||||
__u8 buffer[0];
|
||||
};
|
||||
|
||||
#endif /* UAPI_UFS_IOCTL_H_ */
|
||||
Reference in New Issue
Block a user