mirror of
https://github.com/Evolution-X-Devices/device_xiaomi_polaris
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* Align to AOSP NFC template config. * Fixes problems where NFC freeze once screen is off after boot. Change-Id: Ia288b2666b8eed5664fbcfcccda511ac9e067c20
614 lines
23 KiB
Plaintext
614 lines
23 KiB
Plaintext
#============================================================================
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# File Name: libnfc-nxp.conf
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#
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# Description:
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# NFC configuration management file
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#
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# Modification History:
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# Revision 1.0 2017/01/04 20:50:20 xiaohua.wang@xiaomi.com
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# Initial draft version for Xiaomi C1 P2 board
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#
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# Revision 1.1 2017/03/01 16:32:09 xiaohua.wang@xiaomi.com
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# Upgrade NFCC firmware version to 11.1.E
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#
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# Revision 1.2 2017/06/30 23:45:41 xiaohua.wang@xiaomi.com
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# Improved notification management of received NCI Mode Set
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#
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# Revision 1.3 firmware version to 11.1.13/14
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# Kevin.hu@nxp.com 2017/09/05 16:06:41
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#=============================================================================
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# FW_VERSION=ALMSL 11.1.13/14
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# DEVICE_MANUFACTURER=Xiaomi
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# DEVICE_MODEL=E1
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# This file is used by NFC NXP NCI HAL(external/libnfc-nci/halimpl/pn5x)
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# and NFC Service Java Native Interface Extensions (packages/apps/Nfc/nci/jni/extns/pn5x)
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###############################################################################
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# Application options
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# Logging Levels
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# NXPLOG_DEFAULT_LOGLEVEL 0x01
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# ANDROID_LOG_DEBUG 0x03
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# ANDROID_LOG_WARN 0x02
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# ANDROID_LOG_ERROR 0x01
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# ANDROID_LOG_SILENT 0x00
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NXPLOG_EXTNS_LOGLEVEL=0x02
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NXPLOG_NCIHAL_LOGLEVEL=0x02
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NXPLOG_NCIX_LOGLEVEL=0x02
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NXPLOG_NCIR_LOGLEVEL=0x02
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NXPLOG_FWDNLD_LOGLEVEL=0x02
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NXPLOG_TML_LOGLEVEL=0x02
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NFC_DEBUG_ENABLED=0x00
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###############################################################################
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# Nfc Device Node name
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NXP_NFC_DEV_NODE="/dev/nq-nci"
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###############################################################################
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# Extension for Mifare reader enable
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MIFARE_READER_ENABLE=0x01
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###############################################################################
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# Vzw Feature enable
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VZW_FEATURE_ENABLE=0x01
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###############################################################################
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# Firmware file type
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# .so file 0x01
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# .bin file 0x02
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NXP_FW_TYPE=0x01
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###############################################################################
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# File name for Firmware
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NXP_FW_NAME="libpn553_fw.so"
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###############################################################################
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# System clock source selection configuration
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# define CLK_SRC_XTAL 1
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# define CLK_SRC_PLL 2
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NXP_SYS_CLK_SRC_SEL=0x01
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###############################################################################
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# System clock frequency selection configuration
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# define CLK_FREQ_13MHZ 1
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# define CLK_FREQ_19_2MHZ 2
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# define CLK_FREQ_24MHZ 3
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# define CLK_FREQ_26MHZ 4
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# define CLK_FREQ_38_4MHZ 5
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# define CLK_FREQ_52MHZ 6
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NXP_SYS_CLK_FREQ_SEL=0x01
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###############################################################################
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# The timeout value to be used for clock request acknowledgment
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# min value = 0x01 to max = 0x06
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NXP_SYS_CLOCK_TO_CFG=0x06
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###############################################################################
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# NXP proprietary settings
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NXP_ACT_PROP_EXTN={2F, 02, 00}
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###############################################################################
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# NFC forum profile settings
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NXP_NFC_PROFILE_EXTN={20, 02, 05, 01, A0, 44, 01, 00}
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###############################################################################
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# NFCC Configuration Control
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# Allow NFCC to manage RF Config 0x01
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# Don't allow NFCC to manage RF Config 0x00
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NXP_NFC_MERGE_RF_PARAMS={20, 02, 04, 01, 85, 01, 01}
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###############################################################################
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# Standby enable settings
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NXP_CORE_STANDBY={2F, 00, 01, 01}
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###############################################################################
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# NXP TVDD configurations settings
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# Allow NFCC to configure External TVDD, two configurations (1 and 2) supported,
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# out of them only one can be configured at a time.
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NXP_EXT_TVDD_CFG=0x02
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###############################################################################
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# config1:SLALM, 3.3V for both RM and CM
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NXP_EXT_TVDD_CFG_1={20, 02, 0F, 01, A0, 0E, 0B, 31, 01, 01, 31, 00, 00, 00, 01, 00, D0, 0C}
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###############################################################################
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# config2: use DCDC in CE, use Tx_Pwr_Req, set CFG2 mode, SLALM,
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# monitoring 5V from DCDC, 3.3V for both RM and CM, DCDCWaitTime=4.2ms
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NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, C2, 00, BA, 1E, 14, 00, D0, 0C}
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###############################################################################
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# config3: use DCDC in CE, use Tx_Pwr_Req, SLALM, monitoring 5V from DCDC,
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# DCDCWaitTime=4.2ms
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NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 40, 0A}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_1={
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20, 02, E7, 1B,
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A0, 0D, 06, 06, 37, 08, 76, 00, 00,
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A0, 0D, 03, 24, 03, 7C,
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A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
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A0, 0D, 06, 04, 35, F4, 05, 70, 02,
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A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
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A0, 0D, 06, 04, 42, F8, 40, FF, FF,
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A0, 0D, 04, 32, 42, F8, 40,
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A0, 0D, 04, 46, 42, 68, 40,
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A0, 0D, 04, 56, 42, 78, 40,
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A0, 0D, 04, 5C, 42, 80, 40,
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A0, 0D, 04, CA, 42, 68, 40,
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A0, 0D, 06, 06, 42, 00, 02, F6, F6,
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A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
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A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
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A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
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A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
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A0, 0D, 06, 34, 44, 66, 08, 00, 00,
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A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 58, 44, 55, 08, 00, 00,
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A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
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A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 06, 44, 04, 04, C4, 00,
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A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
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A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
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A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
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A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
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A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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# Enable DLMA
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NXP_RF_CONF_BLK_2={
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20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 47, 40, 00, 00, 40, 01, 2F, 00, 40, 01, 47, 00, 40, 01, 9C, 00, 40, 01, EF, 00, 00, 03, 7B, 01, 08, 03, 13, 02, 48, 00, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 00, 40, 01, 2F, 00, 40, 01, 47, 00, 40, 01, 9C, 00, 40, 01, EF, 00, 00, 03, 7B, 01, 08, 03, 13, 02, 48, 00, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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# Disable DPC
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NXP_RF_CONF_BLK_3={
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20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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# CE detector/phase
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NXP_RF_CONF_BLK_4={
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20, 02, 21, 04,
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A0, 38, 04, 06, 06, 06, 00,
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A0, 3A, 08, B4, 00, B4, 00, B4, 00, B4, 00,
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A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
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A0, B1, 02, A8, 02
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_5={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_6={
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#}
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###############################################################################
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# Set configuration optimization decision setting
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# Enable = 0x01
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# Disable = 0x00
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NXP_SET_CONFIG_ALWAYS=0x01
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###############################################################################
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# Core configuration extensions
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# A009 - Time-out before standby
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# A0EC - Disable/Enable SWP1 interface
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# A0ED - Disable/Enable SWP2 interface
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# A05E - Send RID automatically in Jewel Reader mode
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# A012 - NFCEE interface 2 configuration
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# A040 - Low Power Card Detector Enable
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# A041 - Low Power Card Detector Threshold
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# A042 - Low Power Card Detector Sampling
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# A043 - Low Power Card Detector Hybrid
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# A0D5 - SWP/DWP desired baudrate
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# A0D8 - Configure the number of Sliding Windows used on DWP
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# A0DD - Retry on SWP2 interface
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# A0F2 - SVDD_PWR_REQ enable
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# A09F - Add ON/OFF guard time for SVDD power management(Step value ~1mSec)
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# A096 - Notify all AIDs
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# A037 - SE DWP system configuration
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NXP_CORE_CONF_EXTN={
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20, 02, 51, 13,
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A0, 09, 02, 90, 01,
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A0, EC, 01, 01,
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A0, ED, 01, 03,
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A0, 5E, 01, 01,
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A0, 12, 01, 02,
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A0, 40, 01, 01,
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A0, 41, 01, 05,
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A0, 43, 01, 04,
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A0, 46, 02, BA, 27,
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A0, 47, 02, BA, 27,
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A0, 81, 01, 01,
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A0, D5, 01, 0A,
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A0, D8, 01, 02,
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A0, DD, 01, 2D,
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A0, F2, 01, 01,
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A0, 9F, 02, 08, 08,
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A0, 96, 01, 01,
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A0, 37, 01, 35,
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A0, 3F, 01, 01
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}
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###############################################################################
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# Core configuration rf field filter settings to enable set to 01 to disable set
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# to 00 last bit
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NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 }
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###############################################################################
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# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
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# to 0x00
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NXP_I2C_FRAGMENTATION_ENABLED=0x00
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###############################################################################
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# Core configuration settings
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NXP_CORE_CONF={
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20, 02, 2E, 0E,
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28, 01, 00,
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21, 01, 00,
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30, 01, 08,
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31, 01, 03,
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32, 01, 60,
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38, 01, 01,
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33, 04, 01, 02, 03, 04,
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54, 01, 06,
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50, 01, 02,
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5B, 01, 00,
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80, 01, 01,
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81, 01, 01,
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82, 01, 0E,
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18, 01, 01
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}
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###############################################################################
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# Mifare Classic Key settings
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# NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5,
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# A0, 52, 06, D3, F7, D3, F7, D3, F7,
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# A0, 53, 06, FF, FF, FF, FF, FF, FF,
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# A0, 54, 06, 00, 00, 00, 00, 00, 00}
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###############################################################################
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# Default SE Options
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# No secure element 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x04
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NXP_DEFAULT_SE=0x01
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###############################################################################
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#Enable SWP full power mode when phone is power off
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NXP_SWP_FULL_PWR_ON=0x00
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###############################################################################
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#### Select the CHIP ####
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# PN547C2 0x01
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# PN65T 0x02
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# PN548AD 0x03
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# PN66T 0x04
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# PN551 0x05
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# PN67T 0x06
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# PN553 0x07
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# PN80T 0x08
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NXP_NFC_CHIP=0x08
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###############################################################################
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# CE when Screen state is locked
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# This setting is for DEFAULT_AID_ROUTE,
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# DEFAULT_DESFIRE_ROUTE and DEFAULT_MIFARE_CLT_ROUTE
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# Disable 0x00
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# Enable 0x01
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NXP_CE_ROUTE_STRICT_DISABLE=0x01
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###############################################################################
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#Timeout in secs to get NFCEE Discover notification
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NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20
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###############################################################################
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NXP_DEFAULT_NFCEE_TIMEOUT=20
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###############################################################################
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# Timeout in secs
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NXP_SWP_RD_START_TIMEOUT=0x0A
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###############################################################################
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# Timeout in secs
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NXP_SWP_RD_TAG_OP_TIMEOUT=0x01
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###############################################################################
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# Set the default AID route Location :
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# This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_AID_ROUTE=0x00
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###############################################################################
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#Set the Mifare Desfire route Location :
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#This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_DESFIRE_ROUTE=0x01
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###############################################################################
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# Set the Mifare CLT route Location :
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# This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_MIFARE_CLT_ROUTE=0x01
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###############################################################################
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# Set the Felica CLT route Location :
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# This settings will be used when application does not set this parameter
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x03
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DEFAULT_FELICA_CLT_ROUTE=0x01
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###############################################################################
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# Set the default AID Power state :
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# This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen Lock
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# bit pos 4 = Screen Off
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DEFAULT_AID_PWR_STATE=0x19
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###############################################################################
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# Set the Mifare Desfire Power state :
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# This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen Lock
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# bit pos 4 = Screen Off
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DEFAULT_DESFIRE_PWR_STATE=0x1B
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###############################################################################
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# Set the Mifare CLT Power state :
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# This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen Lock
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# bit pos 4 = Screen Off
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DEFAULT_MIFARE_CLT_PWR_STATE=0x1B
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###############################################################################
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# Set the Felica CLT Power state :
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# This settings will be used when application does not set this parameter
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# bit pos 0 = Switch On
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# bit pos 1 = Switch Off
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# bit pos 2 = Battery Off
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# bit pos 3 = Screen Lock
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# bit pos 4 = Screen Off
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DEFAULT_FELICA_CLT_PWR_STATE=0x1B
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###############################################################################
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# AID Matching platform options
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# AID_MATCHING_L 0x01
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# AID_MATCHING_K 0x02
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AID_MATCHING_PLATFORM=0x01
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###############################################################################
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# P61 interface options
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# NFC 0x01
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# SPI 0x02
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NXP_P61_LS_DEFAULT_INTERFACE=0x01
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###############################################################################
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# P61 LTSM interface options
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# NFC 0x01
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# SPI 0x02
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NXP_P61_LTSM_DEFAULT_INTERFACE=0x01
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###############################################################################
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# CHINA_TIANJIN_RF_SETTING
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# Enable 0x01
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# Disable 0x00
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NXP_CHINA_TIANJIN_RF_ENABLED=0x01
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###############################################################################
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# SWP_SWITCH_TIMEOUT_SETTING
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# Allowed range of swp timeout setting is 0x00 to 0x3C [0 - 60].
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# Timeout in milliseconds, for example
|
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# No Timeout 0x00
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# 10 millisecond timeout 0x0A
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NXP_SWP_SWITCH_TIMEOUT=0x0A
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|
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###############################################################################
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# P61 interface options for JCOP Download
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# NFC 0x01
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# SPI 0x02
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NXP_P61_JCOP_DEFAULT_INTERFACE=0x01
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|
|
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###############################################################################
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# P61 JCOP OS download options
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# FRAMEWORK API BY APPLICATION 0x00
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# AT BOOT_TIME 0x01
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NXP_JCOPDL_AT_BOOT_ENABLE=0x00
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|
|
|
###############################################################################
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# Loader service version
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# NFC service checks for LS version 2.0 or 2.1
|
|
# LS2.0 0x20
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|
# LS2.1 0x21
|
|
# LS2.2 0x22
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# AT NFC service intialization
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NXP_LOADER_SERVICE_VERSION=0x21
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|
|
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###############################################################################
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# Timeout value in milliseconds for NFCC standby mode.The range is between 5000
|
|
# msec to 20000 msec and zero is to disable.
|
|
NXP_NFCC_STANDBY_TIMEOUT=0
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|
|
|
###############################################################################
|
|
# Dynamic RSSI feature enable
|
|
# Disable 0x00
|
|
# Enable 0x01
|
|
NXP_AGC_DEBUG_ENABLE=0x00
|
|
|
|
###############################################################################
|
|
#Virtual Mode ESE and Wired Mode ongoing delay Wired Mode
|
|
# For Technology routing to ESE Technology Mask = 4
|
|
# For ISO-DEP Protocol routing to ESE Mask = 2
|
|
# It can also take TECH|PROTO = 6
|
|
# To ignore the delay set mask to = 0
|
|
NXP_ESE_WIRED_PRT_MASK=0x00
|
|
|
|
###############################################################################
|
|
# Virtual Mode UICC and Wired Mode ongoing delay Wired Mode
|
|
# For Technology routing to UICC Technology Mask = 4
|
|
# For ISO-DEP Protocol routing to UICC set Mask = 2
|
|
# For Select AID Routing to UICC set Mask = 1
|
|
# It can also take values TECH|PROTO|SELECT_AID = 7 , 6 , 5 ,3 .To ignore delay
|
|
# set mask = 0
|
|
NXP_UICC_WIRED_PRT_MASK=0x00
|
|
|
|
################################################################################
|
|
# RF field true delay Wired Mode
|
|
# delay wired mode = 1
|
|
# allow wired mode = 0
|
|
NXP_WIRED_MODE_RF_FIELD_ENABLE=0x00
|
|
|
|
###############################################################################
|
|
# Config to allow adding aids
|
|
# NFC on/off is required after this config
|
|
# 1 = enabling adding aid to NFCC routing table.
|
|
# 0 = disabling adding aid to NFCC routing table.
|
|
NXP_ENABLE_ADD_AID=0x01
|
|
|
|
###############################################################################
|
|
# JCOP-3.3 continuous process timeout in msec and value should be in Hexadecimal
|
|
# JCOP CP TIMEOUT
|
|
NXP_CP_TIMEOUT={00, 77}
|
|
|
|
###############################################################################
|
|
# Enable/Disable checking default proto SE Id
|
|
# Disable 0x00
|
|
# Enable 0x01
|
|
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
|
|
|
|
###############################################################################
|
|
# NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
|
|
# Enable/Disable block number checks for china transit use case
|
|
# Enable 0x01
|
|
# Disable 0x00
|
|
NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
|
|
|
|
###############################################################################
|
|
# Wired mode resume timeout vaule in wired mode resume feature enable
|
|
# DWP resume time out in ms( 4 bytes hex value and LSB first)
|
|
# example 1000 = 0x03E8
|
|
# exmaple 2000 = 0x07D0
|
|
# example 500 = 0x01F4
|
|
NXP_WIREDMODE_RESUME_TIMEOUT=0x02
|
|
|
|
###############################################################################
|
|
# Power to eSE is controlled by DH or PMU depending on following configurations
|
|
# define DH_PWR_CONTROL 1
|
|
# define PMU_PWR_CONTROL 2
|
|
NXP_ESE_POWER_DH_CONTROL=1
|
|
|
|
###############################################################################
|
|
# Timeout value in milliseconds for wired mode resume after RF field event timeout
|
|
NXP_NFCC_RF_FIELD_EVENT_TIMEOUT=3000
|
|
|
|
###############################################################################
|
|
# NXP PMU Support configuration is sent if PMU_PWR_CONTROL is configured
|
|
# External PMU available in phone ON and phone OFF case if NXP_ESE_POWER_EXT_PMU=1
|
|
# External PMU available only in phone ON case if NXP_ESE_POWER_EXT_PMU=2
|
|
NXP_ESE_POWER_EXT_PMU=2
|
|
|
|
###############################################################################
|
|
# Whether to allow wired mode in desfire and mifare CLT
|
|
# Disable 0x00
|
|
# Enable 0x01
|
|
NXP_ALLOW_WIRED_IN_MIFARE_DESFIRE_CLT=0x00
|
|
|
|
###############################################################################
|
|
# Vendor Specific Proprietary Protocol & Discovery Configuration
|
|
# Set to 0xFF if unsupported
|
|
# byte[0] NCI_PROTOCOL_18092_ACTIVE
|
|
# byte[1] NCI_PROTOCOL_B_PRIME
|
|
# byte[2] NCI_PROTOCOL_DUAL
|
|
# byte[3] NCI_PROTOCOL_15693
|
|
# byte[4] NCI_PROTOCOL_KOVIO
|
|
# byte[5] NCI_PROTOCOL_MIFARE
|
|
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
|
|
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
|
|
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
|
|
NFA_PROPRIETARY_CFG={05:FF:FF:06:81:80:70:FF:FF}
|
|
|
|
#################################################################################
|
|
# Bail out mode
|
|
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
|
|
NFA_POLL_BAIL_OUT_MODE=0x00
|
|
|
|
###############################################################################
|
|
# Default Secure Element route id
|
|
DEFAULT_OFFHOST_ROUTE=0x02
|
|
|
|
############################################################################## #
|
|
# White list of Hosts
|
|
# This values will be the Hosts(NFCEEs) in the HCI Network.
|
|
DEVICE_HOST_WHITE_LIST={80:81:C0}
|
|
|
|
###############################################################################
|
|
# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
|
|
# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
|
|
# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
|
|
# 2 NFA_RW_PRES_CHK_RESET; Deactivate to Sleep, then re-activate
|
|
# 3 NFA_RW_PRES_CHK_RB_CH0; Type-4 tag protocol's ReadBinary command on channel 0
|
|
# 4 NFA_RW_PRES_CHK_RB_CH3; Type-4 tag protocol's ReadBinary command on channel 3
|
|
PRESENCE_CHECK_ALGORITHM=1
|
|
|
|
###############################################################################
|
|
# Configure the NFC Extras to open and use a static pipe. If the value is
|
|
# not set or set to 0, then the default is use a dynamic pipe based on a
|
|
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
|
|
# for each UICC (where F3="UICC0" and F4="UICC1")
|
|
OFF_HOST_ESE_PIPE_ID=0x19
|
|
OFF_HOST_SIM_PIPE_ID=0x20
|
|
|
|
###########################################################################
|
|
# Extended APDU length for ISO_DEP
|
|
ISO_DEP_MAX_TRANSCEIVE=0x0105
|
|
|
|
###############################################################################
|
|
# Restrict routing to first matched rule only.
|
|
# Blacklist enable 0x01
|
|
# Blacklist disable 0x00
|
|
NXP_PROP_BLACKLIST_ROUTING=0x00
|
|
|
|
###############################################################################
|
|
# Send DWP interface reset command as part of SE open
|
|
# Disable 0x00
|
|
# Enable 0x01
|
|
NXP_DWP_INTF_RESET_ENABLE=0x01
|
|
|
|
###############################################################################
|
|
# Timeout value in milliseconds for JCOP OS download to complete
|
|
OS_DOWNLOAD_TIMEOUT_VALUE=60000
|
|
|
|
###############################################################################
|
|
# Timeout value in milliseconds to send response for Felica command received
|
|
NXP_HCEF_CMD_RSP_TIMEOUT_VALUE=5000
|