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@@ -48,35 +48,34 @@ NXP_NFC_DEV_NODE="/dev/nq-nci"
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# Extension for Mifare reader enable
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MIFARE_READER_ENABLE=0x01
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###############################################################################
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# Mifare Reader implementation
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# 0: General implementation
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# 1: Legacy implementation
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LEGACY_MIFARE_READER=0
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###############################################################################
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# Vzw Feature enable
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VZW_FEATURE_ENABLE=0x01
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###############################################################################
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# Firmware file type
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# .so file 0x01
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# .bin file 0x02
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NXP_FW_TYPE=0x01
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###############################################################################
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# File name for Firmware
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NXP_FW_NAME="libpn553_fw.so"
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###############################################################################
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# System clock source selection configuration
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#define CLK_SRC_XTAL 1
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#define CLK_SRC_PLL 2
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# define CLK_SRC_XTAL 1
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# define CLK_SRC_PLL 2
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NXP_SYS_CLK_SRC_SEL=0x01
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###############################################################################
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# System clock frequency selection configuration
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#define CLK_FREQ_13MHZ 1
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#define CLK_FREQ_19_2MHZ 2
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#define CLK_FREQ_24MHZ 3
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#define CLK_FREQ_26MHZ 4
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#define CLK_FREQ_32MHZ 5
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#define CLK_FREQ_38_4MHZ 6
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#define CLK_FREQ_52MHZ 7
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# define CLK_FREQ_13MHZ 1
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# define CLK_FREQ_19_2MHZ 2
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# define CLK_FREQ_24MHZ 3
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# define CLK_FREQ_26MHZ 4
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# define CLK_FREQ_38_4MHZ 5
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# define CLK_FREQ_52MHZ 6
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NXP_SYS_CLK_FREQ_SEL=0x01
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###############################################################################
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@@ -123,10 +122,78 @@ NXP_EXT_TVDD_CFG_2={20, 02, 0F, 01, A0, 0E, 0B, 11, 01, C2, C2, 00, BA, 1E, 14,
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NXP_EXT_TVDD_CFG_3={20, 02, 0B, 02, A0, 66, 01, 01, A0, 0E, 03, 52, 40, 0A}
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###############################################################################
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# Set configuration optimization decision setting
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# Enable = 0x01
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# Disable = 0x00
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NXP_SET_CONFIG_ALWAYS=0x01
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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NXP_RF_CONF_BLK_1={
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20, 02, E7, 1B,
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A0, 0D, 06, 06, 37, 08, 76, 00, 00,
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A0, 0D, 03, 24, 03, 7C,
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A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
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A0, 0D, 06, 04, 35, F4, 05, 70, 02,
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A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
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A0, 0D, 06, 04, 42, F8, 40, FF, FF,
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A0, 0D, 04, 32, 42, F8, 40,
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A0, 0D, 04, 46, 42, 68, 40,
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A0, 0D, 04, 56, 42, 78, 40,
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A0, 0D, 04, 5C, 42, 80, 40,
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A0, 0D, 04, CA, 42, 68, 40,
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A0, 0D, 06, 06, 42, 00, 02, F6, F6,
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A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
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A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
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A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
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A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
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A0, 0D, 06, 34, 44, 66, 08, 00, 00,
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A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 58, 44, 55, 08, 00, 00,
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A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
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A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
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A0, 0D, 06, 06, 44, 04, 04, C4, 00,
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A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
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A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
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A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
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A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
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A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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# Enable DLMA
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NXP_RF_CONF_BLK_2={
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20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 47, 40, 00, 00, 40, 01, 2F, 00, 40, 01, 47, 00, 40, 01, 9C, 00, 40, 01, EF, 00, 00, 03, 7B, 01, 08, 03, 13, 02, 48, 00, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 00, 40, 01, 2F, 00, 40, 01, 47, 00, 40, 01, 9C, 00, 40, 01, EF, 00, 00, 03, 7B, 01, 08, 03, 13, 02, 48, 00, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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# Disable DPC
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NXP_RF_CONF_BLK_3={
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20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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# CE detector/phase
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NXP_RF_CONF_BLK_4={
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20, 02, 21, 04,
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A0, 38, 04, 06, 06, 06, 00,
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A0, 3A, 08, B4, 00, B4, 00, B4, 00, B4, 00,
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A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
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A0, B1, 02, A8, 02
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}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_5={
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#}
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###############################################################################
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# NXP RF configuration ALM/PLM settings
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# This section needs to be updated with the correct values based on the platform
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#NXP_RF_CONF_BLK_6={
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#}
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###############################################################################
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# Set configuration optimization decision setting
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@@ -135,14 +202,76 @@ NXP_SET_CONFIG_ALWAYS=0x01
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NXP_SET_CONFIG_ALWAYS=0x01
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###############################################################################
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# Core configuration rf field filter settings to enable set to 01 to disable set to 00 last bit
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# NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 01}
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# NXP_CORE_RF_FIELD={ 2F, 32, 01, 01}
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# Core configuration extensions
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# A009 - Time-out before standby
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# A0EC - Disable/Enable SWP1 interface
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# A0ED - Disable/Enable SWP2 interface
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# A05E - Send RID automatically in Jewel Reader mode
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# A012 - NFCEE interface 2 configuration
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# A040 - Low Power Card Detector Enable
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# A041 - Low Power Card Detector Threshold
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# A042 - Low Power Card Detector Sampling
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# A043 - Low Power Card Detector Hybrid
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# A0D5 - SWP/DWP desired baudrate
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# A0D8 - Configure the number of Sliding Windows used on DWP
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# A0DD - Retry on SWP2 interface
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# A0F2 - SVDD_PWR_REQ enable
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# A09F - Add ON/OFF guard time for SVDD power management(Step value ~1mSec)
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# A096 - Notify all AIDs
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# A037 - SE DWP system configuration
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NXP_CORE_CONF_EXTN={
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20, 02, 51, 13,
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A0, 09, 02, 90, 01,
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A0, EC, 01, 01,
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A0, ED, 01, 03,
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A0, 5E, 01, 01,
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A0, 12, 01, 02,
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A0, 40, 01, 01,
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A0, 41, 01, 05,
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A0, 43, 01, 04,
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A0, 46, 02, BA, 27,
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A0, 47, 02, BA, 27,
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A0, 81, 01, 01,
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A0, D5, 01, 0A,
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A0, D8, 01, 02,
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A0, DD, 01, 2D,
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A0, F2, 01, 01,
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A0, 9F, 02, 08, 08,
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A0, 96, 01, 01,
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A0, 37, 01, 35,
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A0, 3F, 01, 01
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}
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###############################################################################
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# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set to 0x00
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# Core configuration rf field filter settings to enable set to 01 to disable set
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# to 00 last bit
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NXP_CORE_RF_FIELD={ 20, 02, 05, 01, A0, 62, 01, 00 }
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###############################################################################
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# To enable i2c fragmentation set i2c fragmentation enable 0x01 to disable set
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# to 0x00
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NXP_I2C_FRAGMENTATION_ENABLED=0x00
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###############################################################################
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# Core configuration settings
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NXP_CORE_CONF={
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20, 02, 2E, 0E,
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28, 01, 00,
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21, 01, 00,
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30, 01, 08,
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31, 01, 03,
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32, 01, 60,
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38, 01, 01,
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33, 04, 01, 02, 03, 04,
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54, 01, 06,
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50, 01, 02,
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5B, 01, 00,
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80, 01, 01,
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81, 01, 01,
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82, 01, 0E,
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18, 01, 01
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}
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###############################################################################
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# Mifare Classic Key settings
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# NXP_CORE_MFCKEY_SETTING={20, 02, 25,04, A0, 51, 06, A0, A1, A2, A3, A4, A5,
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@@ -151,19 +280,15 @@ NXP_I2C_FRAGMENTATION_ENABLED=0x00
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# A0, 54, 06, 00, 00, 00, 00, 00, 00}
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###############################################################################
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# Force ESE to only listen to the following technology(s).
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# The bits are defined as tNFA_TECHNOLOGY_MASK in nfa_api.h.
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# Default is NFA_TECHNOLOGY_MASK_A | NFA_TECHNOLOGY_MASK_B | NFA_TECHNOLOGY_MASK_F
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NXP_ESE_LISTEN_TECH_MASK=0x07
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# Default SE Options
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# No secure element 0x00
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# eSE 0x01
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# UICC 0x02
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# UICC2 0x04
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NXP_DEFAULT_SE=0x01
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###############################################################################
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#set autonomous mode
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# disable autonomous 0x00
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# enable autonomous 0x01
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NXP_CORE_SCRN_OFF_AUTONOMOUS_ENABLE=0x00
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###############################################################################
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# Enable SWP full power mode when phone is power off
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#Enable SWP full power mode when phone is power off
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NXP_SWP_FULL_PWR_ON=0x00
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###############################################################################
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@@ -187,58 +312,54 @@ NXP_NFC_CHIP=0x08
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NXP_CE_ROUTE_STRICT_DISABLE=0x01
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###############################################################################
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# Timeout in secs to get NFCEE Discover notification
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#Timeout in secs to get NFCEE Discover notification
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NXP_DEFAULT_NFCEE_DISC_TIMEOUT=20
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###############################################################################
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NXP_DEFAULT_NFCEE_TIMEOUT=0x06
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NXP_DEFAULT_NFCEE_TIMEOUT=20
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###############################################################################
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# Timeout in secs
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NXP_SWP_RD_TAG_OP_TIMEOUT=0x20
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NXP_SWP_RD_START_TIMEOUT=0x0A
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###############################################################################
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# Timeout in secs
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NXP_SWP_RD_TAG_OP_TIMEOUT=0x01
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###############################################################################
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# Set the default AID route Location :
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# This settings will be used when application does not set this parameter
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# host 0x00
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# eSE 0x01
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# UICC 0x02
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DEFAULT_AID_ROUTE=0x01
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###############################################################################
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# Configure the default NfcA/IsoDep techology and protocol route. Can be
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# either a secure element (e.g. 0xF4) or the host (0x00)
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# host 0x00
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# eSE 0x01
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|
|
|
|
# UICC 0x02
|
|
|
|
|
DEFAULT_ISODEP_ROUTE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Configure the single default SE to use. The default is to use the first
|
|
|
|
|
# SE that is detected by the stack. This value might be used when the phone
|
|
|
|
|
# supports multiple SE (e.g. 0xC0 and 0x80) but you want to force it to use
|
|
|
|
|
# one of them (e.g. 0xC0).
|
|
|
|
|
# host 0x00
|
|
|
|
|
# eSE 0x01
|
|
|
|
|
# UICC 0x02
|
|
|
|
|
DEFAULT_OFFHOST_ROUTE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Configure the single default SE to use. The default is to use the first
|
|
|
|
|
# SE that is detected by the stack. This value might be used when the phone
|
|
|
|
|
# supports multiple SE (e.g. 0xF3 and 0xF4) but you want to force it to use
|
|
|
|
|
# one of them (e.g. 0xF4).
|
|
|
|
|
# host 0x00
|
|
|
|
|
# eSE 0x01
|
|
|
|
|
# UICC 0x02
|
|
|
|
|
DEFAULT_TECH_ABF_ROUTE=0x01
|
|
|
|
|
# eSE 0x01
|
|
|
|
|
# UICC 0x02
|
|
|
|
|
# UICC2 0x03
|
|
|
|
|
DEFAULT_AID_ROUTE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
#Set the default Felica T3T System Code OffHost route Location :
|
|
|
|
|
#Set the Mifare Desfire route Location :
|
|
|
|
|
#This settings will be used when application does not set this parameter
|
|
|
|
|
# host 0x00
|
|
|
|
|
# eSE 0xC0
|
|
|
|
|
DEFAULT_SYS_CODE_ROUTE=0xC0
|
|
|
|
|
# eSE 0x01
|
|
|
|
|
# UICC 0x02
|
|
|
|
|
# UICC2 0x03
|
|
|
|
|
DEFAULT_DESFIRE_ROUTE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Set the Mifare CLT route Location :
|
|
|
|
|
# This settings will be used when application does not set this parameter
|
|
|
|
|
# host 0x00
|
|
|
|
|
# eSE 0x01
|
|
|
|
|
# UICC 0x02
|
|
|
|
|
# UICC2 0x03
|
|
|
|
|
DEFAULT_MIFARE_CLT_ROUTE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Set the Felica CLT route Location :
|
|
|
|
|
# This settings will be used when application does not set this parameter
|
|
|
|
|
# eSE 0x01
|
|
|
|
|
# UICC 0x02
|
|
|
|
|
# UICC2 0x03
|
|
|
|
|
DEFAULT_FELICA_CLT_ROUTE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Set the default AID Power state :
|
|
|
|
|
@@ -246,8 +367,8 @@ DEFAULT_SYS_CODE_ROUTE=0xC0
|
|
|
|
|
# bit pos 0 = Switch On
|
|
|
|
|
# bit pos 1 = Switch Off
|
|
|
|
|
# bit pos 2 = Battery Off
|
|
|
|
|
# bit pos 3 = Screen Off
|
|
|
|
|
# bit pos 4 = Screen Lock
|
|
|
|
|
# bit pos 3 = Screen Lock
|
|
|
|
|
# bit pos 4 = Screen Off
|
|
|
|
|
DEFAULT_AID_PWR_STATE=0x19
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
@@ -256,9 +377,9 @@ DEFAULT_AID_PWR_STATE=0x19
|
|
|
|
|
# bit pos 0 = Switch On
|
|
|
|
|
# bit pos 1 = Switch Off
|
|
|
|
|
# bit pos 2 = Battery Off
|
|
|
|
|
# bit pos 3 = Screen Off
|
|
|
|
|
# bit pos 4 = Screen Lock
|
|
|
|
|
DEFAULT_ISODEP_PWR_STATE=0x1B
|
|
|
|
|
# bit pos 3 = Screen Lock
|
|
|
|
|
# bit pos 4 = Screen Off
|
|
|
|
|
DEFAULT_DESFIRE_PWR_STATE=0x1B
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Set the Mifare CLT Power state :
|
|
|
|
|
@@ -266,42 +387,19 @@ DEFAULT_ISODEP_PWR_STATE=0x1B
|
|
|
|
|
# bit pos 0 = Switch On
|
|
|
|
|
# bit pos 1 = Switch Off
|
|
|
|
|
# bit pos 2 = Battery Off
|
|
|
|
|
# bit pos 3 = Screen Off
|
|
|
|
|
# bit pos 4 = Screen Lock
|
|
|
|
|
DEFAULT_OFFHOST_PWR_STATE=0x1B
|
|
|
|
|
# bit pos 3 = Screen Lock
|
|
|
|
|
# bit pos 4 = Screen Off
|
|
|
|
|
DEFAULT_MIFARE_CLT_PWR_STATE=0x1B
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Set Tech A,B,F Power state :
|
|
|
|
|
# Set the Felica CLT Power state :
|
|
|
|
|
# This settings will be used when application does not set this parameter
|
|
|
|
|
# bit pos 0 = Switch On
|
|
|
|
|
# bit pos 1 = Switch Off
|
|
|
|
|
# bit pos 2 = Battery Off
|
|
|
|
|
# bit pos 3 = Screen Off
|
|
|
|
|
# bit pos 4 = Screen Lock
|
|
|
|
|
DEFAULT_TECH_ABF_PWR_STATE=0x1B
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
#Set the SYS_CODE Power state :
|
|
|
|
|
#This settings will be used when application does not set this parameter
|
|
|
|
|
# bit pos 0 = Switch On
|
|
|
|
|
# bit pos 1 = Switch Off
|
|
|
|
|
# bit pos 2 = Battery Off
|
|
|
|
|
# bit pos 3 = Screen Off
|
|
|
|
|
# bit pos 4 = Screen Lock
|
|
|
|
|
DEFAULT_SYS_CODE_PWR_STATE=0x1B
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Configure the NFC Extras to open and use a static pipe. If the value is
|
|
|
|
|
# not set or set to 0, then the default is use a dynamic pipe based on a
|
|
|
|
|
# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
|
|
|
|
|
# for each UICC (where F3="UICC0" and F4="UICC1")
|
|
|
|
|
OFF_HOST_ESE_PIPE_ID=0x19
|
|
|
|
|
OFF_HOST_SIM_PIPE_ID=0x0A
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Bail out mode
|
|
|
|
|
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
|
|
|
|
|
NFA_POLL_BAIL_OUT_MODE=0x01
|
|
|
|
|
# bit pos 3 = Screen Lock
|
|
|
|
|
# bit pos 4 = Screen Off
|
|
|
|
|
DEFAULT_FELICA_CLT_PWR_STATE=0x1B
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# AID Matching platform options
|
|
|
|
|
@@ -309,6 +407,18 @@ NFA_POLL_BAIL_OUT_MODE=0x01
|
|
|
|
|
# AID_MATCHING_K 0x02
|
|
|
|
|
AID_MATCHING_PLATFORM=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# P61 interface options
|
|
|
|
|
# NFC 0x01
|
|
|
|
|
# SPI 0x02
|
|
|
|
|
NXP_P61_LS_DEFAULT_INTERFACE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# P61 LTSM interface options
|
|
|
|
|
# NFC 0x01
|
|
|
|
|
# SPI 0x02
|
|
|
|
|
NXP_P61_LTSM_DEFAULT_INTERFACE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# CHINA_TIANJIN_RF_SETTING
|
|
|
|
|
# Enable 0x01
|
|
|
|
|
@@ -324,11 +434,16 @@ NXP_CHINA_TIANJIN_RF_ENABLED=0x01
|
|
|
|
|
NXP_SWP_SWITCH_TIMEOUT=0x0A
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Interface options for JCOP Download
|
|
|
|
|
# Disabled 0x00
|
|
|
|
|
# P61 interface options for JCOP Download
|
|
|
|
|
# NFC 0x01
|
|
|
|
|
# SPI 0x02
|
|
|
|
|
NXP_ESE_JCOP_DEFAULT_INTERFACE=0x00
|
|
|
|
|
NXP_P61_JCOP_DEFAULT_INTERFACE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# P61 JCOP OS download options
|
|
|
|
|
# FRAMEWORK API BY APPLICATION 0x00
|
|
|
|
|
# AT BOOT_TIME 0x01
|
|
|
|
|
NXP_JCOPDL_AT_BOOT_ENABLE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Loader service version
|
|
|
|
|
@@ -351,7 +466,7 @@ NXP_NFCC_STANDBY_TIMEOUT=0
|
|
|
|
|
NXP_AGC_DEBUG_ENABLE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Virtual Mode ESE and Wired Mode ongoing delay Wired Mode
|
|
|
|
|
#Virtual Mode ESE and Wired Mode ongoing delay Wired Mode
|
|
|
|
|
# For Technology routing to ESE Technology Mask = 4
|
|
|
|
|
# For ISO-DEP Protocol routing to ESE Mask = 2
|
|
|
|
|
# It can also take TECH|PROTO = 6
|
|
|
|
|
@@ -363,8 +478,8 @@ NXP_ESE_WIRED_PRT_MASK=0x00
|
|
|
|
|
# For Technology routing to UICC Technology Mask = 4
|
|
|
|
|
# For ISO-DEP Protocol routing to UICC set Mask = 2
|
|
|
|
|
# For Select AID Routing to UICC set Mask = 1
|
|
|
|
|
# It can also take values TECH|PROTO|SELECT_AID = 7 , 6 , 5 , 3.
|
|
|
|
|
# To ignore delay set mask = 0
|
|
|
|
|
# It can also take values TECH|PROTO|SELECT_AID = 7 , 6 , 5 ,3 .To ignore delay
|
|
|
|
|
# set mask = 0
|
|
|
|
|
NXP_UICC_WIRED_PRT_MASK=0x00
|
|
|
|
|
|
|
|
|
|
################################################################################
|
|
|
|
|
@@ -381,7 +496,7 @@ NXP_WIRED_MODE_RF_FIELD_ENABLE=0x00
|
|
|
|
|
NXP_ENABLE_ADD_AID=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# JCOP-3.3 continuous process timeout in msec and value should be in Hexadecimal.
|
|
|
|
|
# JCOP-3.3 continuous process timeout in msec and value should be in Hexadecimal
|
|
|
|
|
# JCOP CP TIMEOUT
|
|
|
|
|
NXP_CP_TIMEOUT={00, 77}
|
|
|
|
|
|
|
|
|
|
@@ -391,20 +506,6 @@ NXP_CP_TIMEOUT={00, 77}
|
|
|
|
|
# Enable 0x01
|
|
|
|
|
NXP_CHECK_DEFAULT_PROTO_SE_ID=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# SVDD sync off Delay in ms it can be max 20 ms
|
|
|
|
|
# If out of range timeout used, default delay of 10ms will be set
|
|
|
|
|
NXP_SVDD_SYNC_OFF_DELAY=10
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
#NXP_CN_TRANSIT_CMA_BYPASSMODE_ENABLE
|
|
|
|
|
#Enable this config it prevents EMVCo PICC compliancy and Mifare backward compatibility works
|
|
|
|
|
#Disable this config EMVCo PICC compliancy works and Mifare backward compatibility will not work
|
|
|
|
|
#Default config is Disable
|
|
|
|
|
#Enable 0x01
|
|
|
|
|
#Disable 0x00
|
|
|
|
|
NXP_CN_TRANSIT_CMA_BYPASSMODE_ENABLE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE
|
|
|
|
|
# Enable/Disable block number checks for china transit use case
|
|
|
|
|
@@ -412,27 +513,13 @@ NXP_CN_TRANSIT_CMA_BYPASSMODE_ENABLE=0x00
|
|
|
|
|
# Disable 0x00
|
|
|
|
|
NXP_CN_TRANSIT_BLK_NUM_CHECK_ENABLE=0x01
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
#Enable NXP NCI runtime parser library
|
|
|
|
|
#Enable 0x01
|
|
|
|
|
#Disable 0x00
|
|
|
|
|
NXP_NCI_PARSER_LIBRARY=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
#This config will enable different level of Rf transaction debugs based on the
|
|
|
|
|
#following values provided. Decoded information will be printed in adb logcat
|
|
|
|
|
#Debug Mode Levels
|
|
|
|
|
#Disable Debug 0x00
|
|
|
|
|
#L1 Debug 0x01
|
|
|
|
|
#L2 Debug 0x02
|
|
|
|
|
#L1 & L2 Debug 0x03
|
|
|
|
|
#L1 & L2 & RSSI 0x04
|
|
|
|
|
#L1 & L2 & Felica 0x05
|
|
|
|
|
#NXP_CORE_PROP_SYSTEM_DEBUG=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Wired mode resume timeout vaule in wired mode resume feature enable
|
|
|
|
|
NXP_WIREDMODE_RESUME_TIMEOUT = 0x02
|
|
|
|
|
# DWP resume time out in ms( 4 bytes hex value and LSB first)
|
|
|
|
|
# example 1000 = 0x03E8
|
|
|
|
|
# exmaple 2000 = 0x07D0
|
|
|
|
|
# example 500 = 0x01F4
|
|
|
|
|
NXP_WIREDMODE_RESUME_TIMEOUT=0x02
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Power to eSE is controlled by DH or PMU depending on following configurations
|
|
|
|
|
@@ -456,41 +543,6 @@ NXP_ESE_POWER_EXT_PMU=2
|
|
|
|
|
# Enable 0x01
|
|
|
|
|
NXP_ALLOW_WIRED_IN_MIFARE_DESFIRE_CLT=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Enable/Disable Block Route feature.
|
|
|
|
|
# Block Route will restrict routing to first matched rule
|
|
|
|
|
# Block Route enable 0x01
|
|
|
|
|
# Block Route disable 0x00
|
|
|
|
|
AID_BLOCK_ROUTE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Send DWP interface reset command as part of SE open
|
|
|
|
|
# Disable 0x00
|
|
|
|
|
# Enable 0x01
|
|
|
|
|
NXP_DWP_INTF_RESET_ENABLE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Timeout value in milliseconds for JCOP OS download to complete
|
|
|
|
|
OS_DOWNLOAD_TIMEOUT_VALUE=60000
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Timeout value in milliseconds to send response for Felica command received
|
|
|
|
|
NXP_HCEF_CMD_RSP_TIMEOUT_VALUE=5000
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Maximum WTX requests entertained by MW
|
|
|
|
|
NXP_WM_MAX_WTX_COUNT=50
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# HAL library path for selftest
|
|
|
|
|
NXP_HAL_PATH="/vendor/lib64/hw/nfc_nci.pn54x.so"
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Enable or Disable RF_STATUS_UPDATE to EseHal module
|
|
|
|
|
# Disable 0x00
|
|
|
|
|
# Enable 0x01
|
|
|
|
|
RF_STATUS_UPDATE_ENABLE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
# Vendor Specific Proprietary Protocol & Discovery Configuration
|
|
|
|
|
# Set to 0xFF if unsupported
|
|
|
|
|
@@ -503,39 +555,59 @@ RF_STATUS_UPDATE_ENABLE=0x00
|
|
|
|
|
# byte[6] NCI_DISCOVERY_TYPE_POLL_KOVIO
|
|
|
|
|
# byte[7] NCI_DISCOVERY_TYPE_POLL_B_PRIME
|
|
|
|
|
# byte[8] NCI_DISCOVERY_TYPE_LISTEN_B_PRIME
|
|
|
|
|
NFA_PROPRIETARY_CFG={05, FF, FF, 06, 81, 80, 70, FF, FF}
|
|
|
|
|
NFA_PROPRIETARY_CFG={05:FF:FF:06:81:80:70:FF:FF}
|
|
|
|
|
|
|
|
|
|
#################################################################################
|
|
|
|
|
# Bail out mode
|
|
|
|
|
# If set to 1, NFCC is using bail out mode for either Type A or Type B poll.
|
|
|
|
|
NFA_POLL_BAIL_OUT_MODE=0x00
|
|
|
|
|
|
|
|
|
|
###############################################################################
|
|
|
|
|
#White list of Hosts
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#This values will be the Hosts(NFCEEs) in the HCI Network.
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DEVICE_HOST_WHITE_LIST={C0, 02}
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# Default Secure Element route id
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DEFAULT_OFFHOST_ROUTE=0x02
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############################################################################## #
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# White list of Hosts
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# This values will be the Hosts(NFCEEs) in the HCI Network.
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DEVICE_HOST_WHITE_LIST={80:81:C0}
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###############################################################################
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# Choose the presence-check algorithm for type-4 tag. If not defined, the default value is 1.
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# 0 NFA_RW_PRES_CHK_DEFAULT; Let stack selects an algorithm
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# 1 NFA_RW_PRES_CHK_I_BLOCK; ISO-DEP protocol's empty I-block
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# 2 NFA_RW_PRES_CHK_ISO_DEP_NAK; Type - 4 tag protocol iso-dep nak presence check
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PRESENCE_CHECK_ALGORITHM=2
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# 2 NFA_RW_PRES_CHK_RESET; Deactivate to Sleep, then re-activate
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# 3 NFA_RW_PRES_CHK_RB_CH0; Type-4 tag protocol's ReadBinary command on channel 0
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# 4 NFA_RW_PRES_CHK_RB_CH3; Type-4 tag protocol's ReadBinary command on channel 3
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PRESENCE_CHECK_ALGORITHM=1
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###############################################################################
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# Configure the NFC Extras to open and use a static pipe. If the value is
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# not set or set to 0, then the default is use a dynamic pipe based on a
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# destination gate (see NFA_HCI_DEFAULT_DEST_GATE). Note there is a value
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# for each UICC (where F3="UICC0" and F4="UICC1")
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OFF_HOST_ESE_PIPE_ID=0x19
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OFF_HOST_SIM_PIPE_ID=0x20
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###########################################################################
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# Extended APDU length for ISO_DEP
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ISO_DEP_MAX_TRANSCEIVE=0xFEFF
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ISO_DEP_MAX_TRANSCEIVE=0x0105
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###############################################################################
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# CORE_SET_CONF_CMD to reset Prop Emvco Flag
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NXP_PROP_RESET_EMVCO_CMD={20, 02, 05, 01, A0, 44, 01, 00}
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# Restrict routing to first matched rule only.
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# Blacklist enable 0x01
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# Blacklist disable 0x00
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NXP_PROP_BLACKLIST_ROUTING=0x00
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###############################################################################
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# Disable Mifare CLT for JCOP4.1
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# Enable 0x01
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# Send DWP interface reset command as part of SE open
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# Disable 0x00
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#NXP_MF_CLT_JCOP_CFG=0x01
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# Enable 0x01
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NXP_DWP_INTF_RESET_ENABLE=0x01
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###############################################################################
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# NFCC POLLING CONFIGURATION
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# 0 -> NFC Default
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# 1 -> EMVCO Default
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# 3 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = Removal process
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# 5 -> EMVCO Cert Polling, DISC_IDLE = Removal process , DISC DEACTIVATE = POWER_OFF
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# 7 -> EMVCO Polling, DISC_IDLE = POWER_OFF, DISC DEACTIVATE = POWER_OFF
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NFA_CONFIG_FORMAT=1
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# Timeout value in milliseconds for JCOP OS download to complete
|
|
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|
|
OS_DOWNLOAD_TIMEOUT_VALUE=60000
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###############################################################################
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# Timeout value in milliseconds to send response for Felica command received
|
|
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|
|
NXP_HCEF_CMD_RSP_TIMEOUT_VALUE=5000
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