ARM: dts: msm: Remove core-voltage-level for khaje

Remove core-voltage-level and also macro USB3_DP_DP_PHY_PD_CTL
and USB3_DP_COM_SWI_CTRL as it is not supported.

Change-Id: I83e3a73eb4a219c6acec7362d866671bc2500f5f
This commit is contained in:
Swetha Chikkaboraiah
2022-06-01 13:44:33 +05:30
parent 1b0cd12661
commit 0a91837933

View File

@@ -130,7 +130,6 @@
core-supply = <&L18A>;
qcom,vdd-voltage-level = <0 880000 880000>;
qcom,core-voltage-level = <0 1232000 1260000>;
clocks = <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
<&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
@@ -156,13 +155,11 @@
USB3_DP_PCS_SW_RESET
USB3_DP_PCS_START_CONTROL
0xffff /* USB3_PHY_PCS_MISC_TYPEC_CTRL */
0x2a18 /* USB3_DP_DP_PHY_PD_CTL */
USB3_DP_COM_POWER_DOWN_CTRL
USB3_DP_COM_SW_RESET
USB3_DP_COM_RESET_OVRD_CTRL
USB3_DP_COM_PHY_MODE_CTRL
USB3_DP_COM_TYPEC_CTRL
USB3_DP_COM_SWI_CTRL
USB3_DP_PCS_CLAMP_ENABLE>;
qcom,qmp-phy-init-seq =