ARM: dts: msm: Add changes for USB enablement on monaco

Add required changes for USB enablement on monoco.

Change-Id: I3dba861cb23137e61c3b1f641544fa44d084a631
This commit is contained in:
Vijayavardhan Vennapusa
2022-07-19 16:33:16 +05:30
parent d786b3e88a
commit 129b6fc186
2 changed files with 6 additions and 16 deletions

View File

@@ -8,13 +8,9 @@
reg = <0x4e00000 0x100000>;
reg-names = "core_base";
iommus = <&apps_smmu 0x120 0x0>;
qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x50000000 0x60000000>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
dma-ranges;
interrupts = <GIC_SPI 302 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
@@ -34,7 +30,6 @@
USB3_GDSC-supply = <&gcc_usb20_prim_gdsc>;
dpdm-supply = <&usb2_phy0>;
qcom,usb-charger;
extcon = <&eud>;
qcom,core-clk-rate = <60000000>;
@@ -45,11 +40,7 @@
<&system_noc MASTER_USB3 &config_noc SLAVE_IPA_CFG>,
<&bimc MASTER_AMPSS_M0 &config_noc SLAVE_USB3>;
qcom,interconnect-values-svs = /* SVS Votes */
<30000 70000>,
<0 2400>,
<0 40000>;
qcom,pm-qos-latency = <2>;
qcom,num-gsi-evt-buffs = <0x3>;
qcom,gsi-reg-offset =
<0x0fc /* GSI_GENERAL_CFG */
@@ -58,15 +49,17 @@
0x130 /* GSI_RING_BASE_ADDR_L */
0x144 /* GSI_RING_BASE_ADDR_H */
0x1a4>; /* GSI_IF_STS */
qcom,dwc-usb3-msm-tx-fifo-size = <10488>;
dwc3@4e00000 {
compatible = "snps,dwc3";
reg = <0x4e00000 0xcd00>;
iommus = <&apps_smmu 0x120 0x0>;
qcom,iommu-dma = "atomic";
qcom,iommu-dma-addr-pool = <0x50000000 0x60000000>;
interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>;
usb-phy = <&usb2_phy0>, <&usb_nop_phy>;
tx-fifo-resize;
linux,sysdev_is_parent;
snps,disable-clk-gating;
snps,is-utmi-l1-suspend;
snps,dis-u1-entry-quirk;
@@ -76,7 +69,6 @@
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x0>;
maximum-speed = "high-speed";
max-num-endpoints = /bits/ 8 <16>;
dr_mode = "otg";
};

View File

@@ -1282,8 +1282,6 @@
};
&usb0 {
extcon = <&pm5100_charger>, <&eud>;
#io-channel-cells = <1>;
io-channels= <&pm5100_charger PSY_IIO_USB_REAL_TYPE>;
io-channel-names = "chg_type";