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https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
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video: dts: Add support for Kalama platform
Add device tree files for Kalama platform. Change-Id: Ia2891ed26e11902fcb43e268f02310d69a89df7c
This commit is contained in:
Mihir Ganu
6
Kbuild
6
Kbuild
@@ -1,5 +1,11 @@
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ifeq ($(CONFIG_ARCH_WAIPIO), y)
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dtbo-y += waipio-vidc.dtbo
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endif
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ifeq ($(CONFIG_ARCH_KALAMA), y)
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dtbo-y += kalama-vidc.dtbo
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endif
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always-y := $(dtb-y) $(dtbo-y)
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subdir-y := $(dts-dirs)
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15
kalama-vidc.dts
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15
kalama-vidc.dts
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@@ -0,0 +1,15 @@
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/dts-v1/;
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/plugin/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/qcom,gcc-kalama.h>
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#include <dt-bindings/interconnect/qcom,kalama.h>
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#include <dt-bindings/clock/qcom,videocc-kalama.h>
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#include "kalama-vidc.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. Kalama";
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compatible = "qcom,kalama";
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qcom,msm-id = <519 0x10000>;
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qcom,board-id = <0 0>;
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};
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118
kalama-vidc.dtsi
Normal file
118
kalama-vidc.dtsi
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@@ -0,0 +1,118 @@
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&soc {
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msm_vidc: qcom,vidc@aa00000 {
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compatible = "qcom,msm-vidc", "qcom,msm-vidc-kalama", "qcom,msm-vidc-iris3";
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status = "disabled";
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reg = <0x0aa00000 0xF0000>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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memory-region = <&video_mem>;
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pas-id = <9>;
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/* IOMMU Config */
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#address-cells = <1>;
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#size-cells = <1>;
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/* LLCC Cache */
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cache-slice-names = "vidsc0";
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/* Supply */
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iris-ctl-supply = <&video_cc_mvs0c_gdsc>;
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vcodec-supply = <&video_cc_mvs0_gdsc>;
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/* Clocks */
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clock-names = "gcc_video_axi0",
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"core_clk", "vcodec_clk", "video_cc_mvs0_clk_src";
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clock-ids = <GCC_VIDEO_AXI0_CLK VIDEO_CC_MVS0C_CLK
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VIDEO_CC_MVS0_CLK VIDEO_CC_MVS0_CLK_SRC>;
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clocks = <&gcc GCC_VIDEO_AXI0_CLK>,
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<&videocc VIDEO_CC_MVS0C_CLK>,
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<&videocc VIDEO_CC_MVS0_CLK>,
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<&videocc VIDEO_CC_MVS0_CLK_SRC>;
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qcom,proxy-clock-names = "gcc_video_axi0",
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"core_clk", "vcodec_clk", "video_cc_mvs0_clk_src";
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/* Mask: Bit0: Clock Scaling, Bit1: Mem Retention*/
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qcom,clock-configs = <0x0 0x0 0x0 0x1>;
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qcom,allowed-clock-rates = <239999999 338000000
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366000000 444000000>;
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resets = <&gcc GCC_VIDEO_AXI0_CLK_ARES>,
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<&videocc VIDEO_CC_MVS0C_CLK_ARES>;
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reset-names = "video_axi_reset", "video_core_reset";
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qcom,reg-presets = <0xB0088 0x0 0x11>;
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/* Video Firmware ELF image name */
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vidc,firmware-name = "vpu30_4v";
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/* Bus Interconnects */
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interconnect-names = "venus-cnoc", "venus-ddr", "venus-llcc";
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interconnects = <&gem_noc MASTER_APPSS_PROC
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&config_noc SLAVE_VENUS_CFG>,
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<&mc_virt MASTER_LLCC
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&mc_virt SLAVE_EBI1>,
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<&mmss_noc MASTER_VIDEO
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&gem_noc SLAVE_LLCC>;
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/* Bus BW range (low, high) for each bus */
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qcom,bus-range-kbps = <1000 1000
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1000 15000000
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1000 15000000>;
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/* MMUs */
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non_secure_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_ns_pixel";
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iommus = <&apps_smmu 0x2187 0x0400>;
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qcom,iommu-dma-addr-pool = <0x00100000 0xdff00000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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virtual-addr-pool = <0x00100000 0xdff00000>;
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dma-coherent;
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};
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non_secure_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_ns";
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iommus = <&apps_smmu 0x2180 0x0400>;
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qcom,iommu-dma-addr-pool = <0x25800000 0xba800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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virtual-addr-pool = <0x25800000 0xba800000>;
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dma-coherent;
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};
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secure_non_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_non_pixel";
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iommus = <&apps_smmu 0x2184 0x0400>;
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qcom,iommu-dma-addr-pool = <0x01000000 0x24800000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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qcom,iommu-vmid = <0xB>; /* VMID_CP_NON_PIXEL */
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virtual-addr-pool = <0x01000000 0x24800000>;
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qcom,secure-context-bank;
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};
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secure_bitstream_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_bitstream";
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iommus = <&apps_smmu 0x2181 0x0404>;
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qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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qcom,iommu-vmid = <0x9>; /* VMID_CP_BITSTREAM */
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virtual-addr-pool = <0x00500000 0xdfb00000>;
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qcom,secure-context-bank;
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};
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secure_pixel_cb {
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compatible = "qcom,msm-vidc,context-bank";
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label = "venus_sec_pixel";
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iommus = <&apps_smmu 0x2183 0x0400>;
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qcom,iommu-dma-addr-pool = <0x00500000 0xdfb00000>;
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qcom,iommu-faults = "non-fatal";
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qcom,iommu-pagetable = "LLC";
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qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
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virtual-addr-pool = <0x00500000 0xdfb00000>;
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qcom,secure-context-bank;
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};
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};
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};
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