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Merge "Revert "dt-bindings: subsystem_sleep_stats: Add new compatible to get AOSD sleep stats""

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qctecmdr
2022-07-08 16:28:50 -07:00
committed by Gerrit - the friendly Code Review server
parent abbf2ff141 f14600fc62
commit 2d69e36ea7
3 changed files with 7 additions and 23 deletions
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13
bindings/soc/qcom/soc-sleep-stats.yaml
View File

@@ -21,11 +21,10 @@ properties:
enum:
- qcom,rpmh-sleep-stats-legacy
- qcom,rpmh-sleep-stats
- qcom,rpmh-sleep-stats-v2
- qcom,rpm-sleep-stats
reg:
maxItems: 2
maxItems: 1
ss-name:
$ref: /schemas/types.yaml#/definitions/string
@@ -76,16 +75,6 @@ examples:
mboxes = <&qmp_aop 0>;
ddr-freq-update;
};
# Example of rpmh sleep stats that supports to get AOSS sleep stats
- |
rpmh-sleep-stats@c3f0000 {
compatible = "qcom,rpmh-sleep-stats-v2";
reg = <0 0xc3f0000 0 0x400>, <0 0xb261400 0 0x100>;
ss-name = "modem", "adsp", "adsp_island",
"cdsp", "slpi", "slpi_island",
"apss";
mboxes = <&qmp_aop 0>;
};
# Example of legacy rpmh sleep stats
- |
rpmh-sleep-stats@c3f0000 {

9
bindings/soc/qcom/subsystem-sleep-stats.yaml
View File

@@ -21,10 +21,10 @@ properties:
compatible:
Usage: required
Value type: <string>
Definition: Should be "qcom,subsystem-sleep-stats", "qcom,subsystem-sleep-stats-v2".
Definition: Should be "qcom,subsystem-sleep-stats".
reg:
maxItems: 2
maxItems: 1
ddr-freq-update:
Usage: optional
@@ -43,8 +43,3 @@ example:
reg = <0xc3f0000 0 0x400>;
ddr-freq-update;
};
- |
subsystem-sleep-stats {
compatible = "qcom,subsystem-sleep-stats-v2";
reg = <0xc3f0000 0 0x400>, <0xb261400 0 0x100>;
};

8
qcom/kalama.dtsi
View File

@@ -2624,8 +2624,8 @@
};
soc-sleep-stats@c3f0000 {
compatible = "qcom,rpmh-sleep-stats-v2";
reg = <0xc3f0000 0x400>, <0xb261400 0x100>;
compatible = "qcom,rpmh-sleep-stats";
reg = <0xc3f0000 0x400>;
ss-name = "modem", "adsp", "adsp_island",
"cdsp", "apss";
mboxes = <&qmp_aop 0>;
@@ -2639,8 +2639,8 @@
};
subsystem-sleep-stats@c3f0000 {
compatible = "qcom,subsystem-sleep-stats-v2";
reg = <0xc3f0000 0x400>, <0xb261400 0x100>;
compatible = "qcom,subsystem-sleep-stats";
reg = <0xc3f0000 0x400>;
ddr-freq-update;
};