Merge "ARM: dts: qcom: Enable CPU cooling device for kalama"

This commit is contained in:
qctecmdr
2022-01-25 21:00:42 -08:00
committed by Gerrit - the friendly Code Review server
3 changed files with 1137 additions and 0 deletions

View File

@@ -179,6 +179,18 @@
status = "nok";
};
&tsens0 {
status = "disabled";
};
&tsens1 {
status = "disabled";
};
&tsens2 {
status = "disabled";
};
&bwmon_ddr {
qcom,hw-timer-hz = <192000>;
};

1116
qcom/kalama-thermal.dtsi Normal file

File diff suppressed because it is too large Load Diff

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@@ -68,6 +68,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
compatible = "arm,arch-cache";
@@ -93,6 +94,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
#cooling-cells = <2>;
next-level-cache = <&L2_1>;
L2_1: l2-cache {
compatible = "arm,arch-cache";
@@ -113,6 +115,7 @@
qcom,freq-domain = <&cpufreq_hw 0>;
capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <100>;
#cooling-cells = <2>;
next-level-cache = <&L2_1>;
};
@@ -128,6 +131,7 @@
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1792>;
dynamic-power-coefficient = <270>;
#cooling-cells = <2>;
next-level-cache = <&L2_3>;
L2_3: l2-cache {
compatible = "arm,arch-cache";
@@ -148,6 +152,7 @@
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1792>;
dynamic-power-coefficient = <270>;
#cooling-cells = <2>;
next-level-cache = <&L2_4>;
L2_4: l2-cache {
compatible = "arm,arch-cache";
@@ -169,6 +174,7 @@
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1792>;
dynamic-power-coefficient = <270>;
#cooling-cells = <2>;
next-level-cache = <&L2_5>;
L2_5: l2-cache {
compatible = "arm,arch-cache";
@@ -189,6 +195,7 @@
qcom,freq-domain = <&cpufreq_hw 1>;
capacity-dmips-mhz = <1792>;
dynamic-power-coefficient = <270>;
#cooling-cells = <2>;
next-level-cache = <&L2_6>;
L2_6: l2-cache {
compatible = "arm,arch-cache";
@@ -209,6 +216,7 @@
qcom,freq-domain = <&cpufreq_hw 2>;
capacity-dmips-mhz = <1894>;
dynamic-power-coefficient = <588>;
#cooling-cells = <2>;
next-level-cache = <&L2_7>;
L2_7: l2-cache {
compatible = "arm,arch-cache";
@@ -3496,6 +3504,7 @@
#include "kalama-eva.dtsi"
#include "kalama-pcie.dtsi"
#include "msm-rdbg.dtsi"
#include "kalama-thermal.dtsi"
&qupv3_se7_2uart {
status = "ok";