mirror of
https://github.com/Evolution-X-Devices/kernel_oneplus_sm8550-devicetrees
synced 2026-02-01 09:49:52 +00:00
ARM: dts: msm: Update the pcie clk related properties
max-clock-frequency-hz is no longer used with new method of parsing the PCIe clk frequencies. Use clock-frequency property instead. Also add missing property clock-suppressible to indicate which clk is suppressible. Change-Id: I42e3860fcebc11a1fe1bbd05b702b3327863f03a
This commit is contained in:
@@ -373,9 +373,11 @@
|
||||
"gcc_ddrss_pcie_sf_qtb_clk",
|
||||
"pcie_aggre_noc_axi_clk", "pcie_pipe_clk_mux",
|
||||
"pcie_pipe_clk_ext_src", "pcie_phy_aux_clk";
|
||||
max-clock-frequency-hz = <0>, <0>, <19200000>, <0>, <0>, <0>,
|
||||
<0>, <0>, <100000000>, <0>, <0>, <0>,
|
||||
<0>, <0>;
|
||||
clock-frequency = <0>, <0>, <19200000>, <0>, <0>, <0>, <0>,
|
||||
<0>, <100000000>, <0>, <0>, <0>, <0>, <0>;
|
||||
|
||||
clock-suppressible = <0>, <0>, <0>, <0>, <0>, <0>, <1>, <0>,
|
||||
<0>, <0>, <0>, <0>, <0>, <0>;
|
||||
|
||||
resets = <&gcc GCC_PCIE_1_BCR>,
|
||||
<&gcc GCC_PCIE_1_PHY_BCR>;
|
||||
|
||||
Reference in New Issue
Block a user